1 /***************************************************************************
3 * Copyright (C) 2010 by David Brownell
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the
17 * Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19 ***************************************************************************/
23 * Utilities to support ARM "Serial Wire Debug" (SWD), a low pin-count debug
24 * link protocol used in cases where JTAG is not wanted. This is coupled to
25 * recent versions of ARM's "CoreSight" debug framework. This specific code
26 * is a transport level interface, with "target/arm_adi_v5.[hc]" code
27 * understanding operation semantics, shared with the JTAG transport.
29 * Single-DAP support only.
31 * for details, see "ARM IHI 0031A"
32 * ARM Debug Interface v5 Architecture Specification
33 * especially section 5.3 for SWD protocol
35 * On many chips (most current Cortex-M3 parts) SWD is a run-time alternative
36 * to JTAG. Boards may support one or both. There are also SWD-only chips,
37 * (using SW-DP not SWJ-DP).
39 * Even boards that also support JTAG can benefit from SWD support, because
40 * usually there's no way to access the SWO trace view mechanism in JTAG mode.
41 * That is, trace access may require SWD support.
50 #include "arm_adi_v5.h"
51 #include <helper/time_support.h>
53 #include <transport/transport.h>
54 #include <jtag/interface.h>
58 /* YUK! - but this is currently a global.... */
59 extern struct jtag_interface
*jtag_interface
;
61 static int swd_queue_dp_read(struct adiv5_dap
*dap
, unsigned reg
,
64 /* REVISIT status return vs ack ... */
65 const struct swd_driver
*swd
= jtag_interface
->swd
;
68 return swd
->read_reg(swd_cmd(true, false, reg
), data
);
71 static int swd_queue_idcode_read(struct adiv5_dap
*dap
,
72 uint8_t *ack
, uint32_t *data
)
74 int status
= swd_queue_dp_read(dap
, DP_IDCODE
, data
);
82 static int (swd_queue_dp_write
)(struct adiv5_dap
*dap
, unsigned reg
,
85 /* REVISIT status return vs ack ... */
86 const struct swd_driver
*swd
= jtag_interface
->swd
;
89 return swd
->write_reg(swd_cmd(false, false, reg
), data
);
93 static int (swd_queue_ap_read
)(struct adiv5_dap
*dap
, unsigned reg
,
96 /* REVISIT APSEL ... */
97 /* REVISIT status return ... */
98 const struct swd_driver
*swd
= jtag_interface
->swd
;
101 return swd
->read_reg(swd_cmd(true, true, reg
), data
);
104 static int (swd_queue_ap_write
)(struct adiv5_dap
*dap
, unsigned reg
,
107 /* REVISIT APSEL ... */
108 /* REVISIT status return ... */
109 const struct swd_driver
*swd
= jtag_interface
->swd
;
112 return swd
->write_reg(swd_cmd(false, true, reg
), data
);
115 static int (swd_queue_ap_abort
)(struct adiv5_dap
*dap
, uint8_t *ack
)
120 /** Executes all queued DAP operations. */
121 static int swd_run(struct adiv5_dap
*dap
)
123 /* for now the SWD interface hard-wires a zero-size queue. */
125 /* FIXME but we still need to check and scrub
126 * any hardware errors ...
131 const struct dap_ops swd_dap_ops
= {
134 .queue_idcode_read
= swd_queue_idcode_read
,
135 .queue_dp_read
= swd_queue_dp_read
,
136 .queue_dp_write
= swd_queue_dp_write
,
137 .queue_ap_read
= swd_queue_ap_read
,
138 .queue_ap_write
= swd_queue_ap_write
,
139 .queue_ap_abort
= swd_queue_ap_abort
,
144 * This represents the bits which must be sent out on TMS/SWDIO to
145 * switch a DAP implemented using an SWJ-DP module into SWD mode.
146 * These bits are stored (and transmitted) LSB-first.
148 * See the DAP-Lite specification, section 2.2.5 for information
149 * about making the debug link select SWD or JTAG. (Similar info
150 * is in a few other ARM documents.)
152 static const uint8_t jtag2swd_bitseq
[] = {
153 /* More than 50 TCK/SWCLK cycles with TMS/SWDIO high,
154 * putting both JTAG and SWD logic into reset state.
156 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
157 /* Switching sequence enables SWD and disables JTAG
158 * NOTE: bits in the DP's IDCODE may expose the need for
159 * an old/obsolete/deprecated sequence (0xb6 0xed).
162 /* More than 50 TCK/SWCLK cycles with TMS/SWDIO high,
163 * putting both JTAG and SWD logic into reset state.
165 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
169 * Put the debug link into SWD mode, if the target supports it.
170 * The link's initial mode may be either JTAG (for example,
171 * with SWJ-DP after reset) or SWD.
173 * @param target Enters SWD mode (if possible).
175 * Note that targets using the JTAG-DP do not support SWD, and that
176 * some targets which could otherwise support it may have have been
177 * configured to disable SWD signaling
179 * @return ERROR_OK or else a fault code.
181 int dap_to_swd(struct target
*target
)
183 struct arm
*arm
= target_to_arm(target
);
186 LOG_DEBUG("Enter SWD mode");
188 /* REVISIT it's ugly to need to make calls to a "jtag"
189 * subsystem if the link may not be in JTAG mode...
192 retval
= jtag_add_tms_seq(8 * sizeof(jtag2swd_bitseq
),
193 jtag2swd_bitseq
, TAP_INVALID
);
194 if (retval
== ERROR_OK
)
195 retval
= jtag_execute_queue();
197 /* set up the DAP's ops vector for SWD mode. */
198 arm
->dap
->ops
= &swd_dap_ops
;
203 COMMAND_HANDLER(handle_swd_wcr
)
206 struct target
*target
= get_current_target(CMD_CTX
);
207 struct arm
*arm
= target_to_arm(target
);
208 struct adiv5_dap
*dap
= arm
->dap
;
210 unsigned trn
, scale
= 0;
213 /* no-args: just dump state */
215 /*retval = swd_queue_dp_read(dap, DP_WCR, &wcr); */
216 retval
= dap_queue_dp_read(dap
, DP_WCR
, &wcr
);
217 if (retval
== ERROR_OK
)
219 if (retval
!= ERROR_OK
) {
220 LOG_ERROR("can't read WCR?");
224 command_print(CMD_CTX
,
225 "turnaround=%" PRIu32
", prescale=%" PRIu32
,
227 WCR_TO_PRESCALE(wcr
));
230 case 2: /* TRN and prescale */
231 COMMAND_PARSE_NUMBER(uint
, CMD_ARGV
[1], scale
);
233 LOG_ERROR("prescale %d is too big", scale
);
238 case 1: /* TRN only */
239 COMMAND_PARSE_NUMBER(uint
, CMD_ARGV
[0], trn
);
240 if (trn
< 1 || trn
> 4) {
241 LOG_ERROR("turnaround %d is invalid", trn
);
245 wcr
= ((trn
- 1) << 8) | scale
;
248 * then, re-init adapter with new TRN
250 LOG_ERROR("can't yet modify WCR");
253 default: /* too many arguments */
254 return ERROR_COMMAND_SYNTAX_ERROR
;
258 static const struct command_registration swd_commands
[] = {
261 * Set up SWD and JTAG targets identically, unless/until
262 * infrastructure improves ... meanwhile, ignore all
263 * JTAG-specific stuff like IR length for SWD.
265 * REVISIT can we verify "just one SWD DAP" here/early?
268 .jim_handler
= jim_jtag_newtap
,
269 .mode
= COMMAND_CONFIG
,
270 .help
= "declare a new SWD DAP"
274 .handler
= handle_swd_wcr
,
276 .help
= "display or update DAP's WCR register",
277 .usage
= "turnaround (1..4), prescale (0..7)",
280 /* REVISIT -- add a command for SWV trace on/off */
281 COMMAND_REGISTRATION_DONE
284 static const struct command_registration swd_handlers
[] = {
288 .help
= "SWD command group",
289 .chain
= swd_commands
,
291 COMMAND_REGISTRATION_DONE
294 static int swd_select(struct command_context
*ctx
)
298 retval
= register_commands(ctx
, NULL
, swd_handlers
);
300 if (retval
!= ERROR_OK
)
303 const struct swd_driver
*swd
= jtag_interface
->swd
;
305 /* be sure driver is in SWD mode; start
306 * with hardware default TRN (1), it can be changed later
308 if (!swd
|| !swd
->read_reg
|| !swd
->write_reg
|| !swd
->init
) {
309 LOG_DEBUG("no SWD driver?");
313 retval
= swd
->init(1);
314 if (retval
!= ERROR_OK
) {
315 LOG_DEBUG("can't init SWD driver");
319 /* force DAP into SWD mode (not JTAG) */
320 /*retval = dap_to_swd(target);*/
322 if (ctx
->current_target
) {
323 /* force DAP into SWD mode (not JTAG) */
324 struct target
*target
= get_current_target(ctx
);
325 retval
= dap_to_swd(target
);
331 static int swd_init(struct command_context
*ctx
)
333 struct target
*target
= get_current_target(ctx
);
334 struct arm
*arm
= target_to_arm(target
);
335 struct adiv5_dap
*dap
= arm
->dap
;
339 /* Force the DAP's ops vector for SWD mode.
340 * messy - is there a better way? */
341 arm
->dap
->ops
= &swd_dap_ops
;
343 /* FIXME validate transport config ... is the
344 * configured DAP present (check IDCODE)?
345 * Is *only* one DAP configured?
350 /* Note, debugport_init() does setup too */
354 status
= swd_queue_idcode_read(dap
, &ack
, &idcode
);
356 if (status
== ERROR_OK
)
357 LOG_INFO("SWD IDCODE %#8.8" PRIx32
, idcode
);
363 static struct transport swd_transport
= {
365 .select
= swd_select
,
369 static void swd_constructor(void) __attribute__((constructor
));
370 static void swd_constructor(void)
372 transport_register(&swd_transport
);
375 /** Returns true if the current debug session
376 * is using SWD as its transport.
378 bool transport_is_swd(void)
380 return get_current_transport() == &swd_transport
;