1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 /***************************************************************************
4 * Copyright (C) 2010 by Peter Korsgaard <jacmet@sunsite.dk> *
5 * Heavily based on s3c2412.c by Ben Dooks <ben@fluff.org> *
6 ***************************************************************************/
13 /* s3c64xx uses another base address for the nand controller than 24xx */
15 #define S3C2410_NFREG(x) ((x) + 0x70200000)
17 NAND_DEVICE_COMMAND_HANDLER(s3c6400_nand_device_command
)
19 struct s3c24xx_nand_controller
*info
;
20 CALL_S3C24XX_DEVICE_COMMAND(nand
, &info
);
22 /* fill in the address fields for the core device */
23 info
->cmd
= S3C2440_NFCMD
;
24 info
->addr
= S3C2440_NFADDR
;
25 info
->data
= S3C2440_NFDATA
;
26 info
->nfstat
= S3C2412_NFSTAT
;
31 static int s3c6400_init(struct nand_device
*nand
)
33 struct target
*target
= nand
->target
;
35 target_write_u32(target
, S3C2410_NFCONF
,
36 S3C2440_NFCONF_TACLS(3) |
37 S3C2440_NFCONF_TWRPH0(7) |
38 S3C2440_NFCONF_TWRPH1(7) | 4);
40 target_write_u32(target
, S3C2440_NFCONT
,
41 S3C2412_NFCONT_INIT_MAIN_ECC
|
42 S3C2440_NFCONT_ENABLE
);
47 struct nand_flash_controller s3c6400_nand_controller
= {
49 .nand_device_command
= &s3c6400_nand_device_command
,
50 .init
= &s3c6400_init
,
51 .reset
= &s3c24xx_reset
,
52 .command
= &s3c24xx_command
,
53 .address
= &s3c24xx_address
,
54 .write_data
= &s3c24xx_write_data
,
55 .read_data
= &s3c24xx_read_data
,
56 .write_page
= s3c24xx_write_page
,
57 .read_page
= s3c24xx_read_page
,
58 .write_block_data
= &s3c2440_write_block_data
,
59 .read_block_data
= &s3c2440_read_block_data
,
60 .nand_ready
= &s3c2440_nand_ready
,