1 # script for Nuvoton MuMicro Cortex-M0 Series
3 # Adapt based on what transport is active.
4 source [find target/swj-dp.tcl]
7 if { [info exists CHIPNAME] } {
8 set _CHIPNAME $CHIPNAME
13 # SWD DP-ID Nuvoton NuMicro Cortex-M0 has SWD Transport only.
14 if { [info exists CPUDAPID] } {
15 set _CPUDAPID $CPUDAPID
17 set _CPUDAPID 0x0BB11477
20 # Work-area is a space in RAM used for flash programming
22 if { [info exists WORKAREASIZE] } {
23 set _WORKAREASIZE $WORKAREASIZE
25 set _WORKAREASIZE 0x800
29 # Debug Adapter Target Settings
30 swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUDAPID
31 set _TARGETNAME $_CHIPNAME.cpu
32 target create $_TARGETNAME cortex_m -chain-position $_TARGETNAME
34 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
36 # flash bank <name> numicro <base> <size(autodetect,set to 0)> 0 0 <target#>
37 #set _FLASHNAME $_CHIPNAME.flash
38 #flash bank $_FLASHNAME numicro 0 $_FLASHSIZE 0 0 $_TARGETNAME
39 # flash size will be probed
40 set _FLASHNAME $_CHIPNAME.flash_aprom
41 flash bank $_FLASHNAME numicro 0x00000000 0 0 0 $_TARGETNAME
42 set _FLASHNAME $_CHIPNAME.flash_data
43 flash bank $_FLASHNAME numicro 0x0001F000 0 0 0 $_TARGETNAME
44 set _FLASHNAME $_CHIPNAME.flash_ldrom
45 flash bank $_FLASHNAME numicro 0x00100000 0 0 0 $_TARGETNAME
46 set _FLASHNAME $_CHIPNAME.flash_config
47 flash bank $_FLASHNAME numicro 0x00300000 0 0 0 $_TARGETNAME
49 # set default SWCLK frequency
52 # set default srst setting "none"
55 # HLA doesn't have cortex_m commands
57 # if srst is not fitted use SYSRESETREQ to
58 # perform a soft reset
59 cortex_m reset_config sysresetreq