src/target/dsp563xx_once.h

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2
   3 /***************************************************************************
   4  *   Copyright (C) 2009 by Mathias Kuester                                 *
   5  *   mkdorg@users.sourceforge.net                                          *
   6  ***************************************************************************/
   7
   8 #ifndef OPENOCD_TARGET_DSP563XX_ONCE_H
   9 #define OPENOCD_TARGET_DSP563XX_ONCE_H
  10
  11 #include <jtag/jtag.h>
  12
  13 #ifdef HAVE_CONFIG_H
  14 #include "config.h"
  15 #endif
  16
  17 #define DSP563XX_ONCE_OCR_EX    (1<<5)
  18 #define DSP563XX_ONCE_OCR_GO    (1<<6)
  19 #define DSP563XX_ONCE_OCR_RW    (1<<7)
  20
  21 #define DSP563XX_ONCE_OSCR_OS1  (1<<7)
  22 #define DSP563XX_ONCE_OSCR_OS0  (1<<6)
  23 #define DSP563XX_ONCE_OSCR_HIT  (1<<5)
  24 #define DSP563XX_ONCE_OSCR_TO   (1<<4)
  25 #define DSP563XX_ONCE_OSCR_MBO  (1<<3)
  26 #define DSP563XX_ONCE_OSCR_SWO  (1<<2)
  27 #define DSP563XX_ONCE_OSCR_IME  (1<<1)
  28 #define DSP563XX_ONCE_OSCR_TME  (1<<0)
  29
  30 #define DSP563XX_ONCE_OSCR_NORMAL_M     (0)
  31 #define DSP563XX_ONCE_OSCR_STOPWAIT_M   (DSP563XX_ONCE_OSCR_OS0)
  32 #define DSP563XX_ONCE_OSCR_BUSY_M       (DSP563XX_ONCE_OSCR_OS1)
  33 #define DSP563XX_ONCE_OSCR_DEBUG_M      (DSP563XX_ONCE_OSCR_OS0|DSP563XX_ONCE_OSCR_OS1)
  34
  35 #define DSP563XX_ONCE_OSCR      0x000   /* status/ctrl reg. */
  36 #define DSP563XX_ONCE_OMBC      0x001   /* memory breakp. reg. */
  37 #define DSP563XX_ONCE_OBCR      0x002   /* breakp. ctrl reg */
  38 #define DSP563XX_ONCE_OMLR0     0x005   /* memory limit reg */
  39 #define DSP563XX_ONCE_OMLR1     0x006   /* memory limit reg */
  40 #define DSP563XX_ONCE_OGDBR     0x009   /* gdb reg */
  41 #define DSP563XX_ONCE_OPDBR     0x00A   /* pdb reg */
  42 #define DSP563XX_ONCE_OPILR     0x00B   /* pil reg */
  43 #define DSP563XX_ONCE_PDBGOTO   0x00C   /* pdb to go reg */
  44 #define DSP563XX_ONCE_OTC       0x00D   /* trace cnt */
  45 #define DSP563XX_ONCE_TAGB      0x00E   /* tags buffer */
  46 #define DSP563XX_ONCE_OPABFR    0x00F   /* pab fetch reg */
  47 #define DSP563XX_ONCE_OPABDR    0x010   /* pab decode reg */
  48 #define DSP563XX_ONCE_OPABEX    0x011   /* pab exec reg */
  49 #define DSP563XX_ONCE_OPABF11   0x012   /* trace buffer/inc ptr */
  50 #define DSP563XX_ONCE_NOREG     0x01F   /* no register selected */
  51
  52 struct once_reg {
  53         const uint8_t num;
  54         const uint8_t addr;
  55         const uint8_t len;
  56         const char *name;
  57         uint32_t reg;
  58 };
  59
  60 /** */
  61 int dsp563xx_once_request_debug(struct jtag_tap *tap, int reset_state);
  62 /** */
  63 int dsp563xx_once_target_status(struct jtag_tap *tap);
  64
  65 /** once read registers */
  66 int dsp563xx_once_read_register(struct jtag_tap *tap, int flush, struct once_reg *regs, int len);
  67 /** once read register */
  68 int dsp563xx_once_reg_read_ex(struct jtag_tap *tap, int flush, uint8_t reg, uint8_t len, uint32_t *data);
  69 /** once read register */
  70 int dsp563xx_once_reg_read(struct jtag_tap *tap, int flush, uint8_t reg, uint32_t *data);
  71 /** once write register */
  72 int dsp563xx_once_reg_write(struct jtag_tap *tap, int flush, uint8_t reg, uint32_t data);
  73 /** single word instruction */
  74 int dsp563xx_once_execute_sw_ir(struct jtag_tap *tap, int flush, uint32_t opcode);
  75 /** double word instruction */
  76 int dsp563xx_once_execute_dw_ir(struct jtag_tap *tap, int flush, uint32_t opcode, uint32_t operand);
  77
  78 #endif /* OPENOCD_TARGET_DSP563XX_ONCE_H */