- updated docs for ft2232_vid_pid command
[openocd.git] / src / flash / at91sam7.h
blobecb5670145328e9cdb739ec9c5e6cb48e1fd9e20
1 /***************************************************************************
2 * Copyright (C) 2006 by Magnus Lundin *
3 * lundin@mlu.mine.nu *
4 * *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
9 * *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
14 * *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
20 #ifndef AT91SAM7_H
21 #define AT91SAM7_H
23 #include "flash.h"
24 #include "target.h"
26 typedef struct at91sam7_flash_bank_s
28 u32 working_area;
29 u32 working_area_size;
31 /* chip id register */
32 u32 cidr;
33 u16 cidr_ext;
34 u16 cidr_nvptyp;
35 u16 cidr_arch;
36 u16 cidr_sramsiz;
37 u16 cidr_nvpsiz;
38 u16 cidr_nvpsiz2;
39 u16 cidr_eproc;
40 u16 cidr_version;
41 char * target_name;
43 /* flash geometry */
44 u16 num_pages;
45 u16 pagesize;
46 u16 pages_in_lockregion;
47 u8 num_erase_regions;
48 u8 num_planes;
49 u32 *erase_region_info;
51 /* nv memory bits */
52 u16 num_lockbits;
53 u16 lockbits[4];
54 u16 num_nvmbits;
55 u16 nvmbits;
56 u8 securitybit;
57 u8 flashmode[4]; /* 0: not init, 1: fmcn for nvbits (1uS), 2: fmcn for flash (1.5uS) */
59 /* main clock status */
60 u8 mck_valid;
61 u32 mck_freq;
63 } at91sam7_flash_bank_t;
65 /* AT91SAM7 control registers */
66 #define DBGU_CIDR 0xFFFFF240
67 #define CKGR_MCFR 0xFFFFFC24
68 #define CKGR_MCFR_MAINRDY 0x10000
69 #define CKGR_PLLR 0xFFFFFC2c
70 #define CKGR_PLLR_DIV 0xff
71 #define CKGR_PLLR_MUL 0x07ff0000
72 #define PMC_MCKR 0xFFFFFC30
73 #define PMC_MCKR_CSS 0x03
74 #define PMC_MCKR_PRES 0x1c
76 /* Flash Controller Commands */
77 #define WP 0x01
78 #define SLB 0x02
79 #define WPL 0x03
80 #define CLB 0x04
81 #define EA 0x08
82 #define SGPB 0x0B
83 #define CGPB 0x0D
84 #define SSB 0x0F
86 /* MC_FSR bit definitions */
87 #define MC_FSR_FRDY 1
88 #define MC_FSR_EOL 2
90 /* AT91SAM7 constants */
91 #define RC_FREQ 32000
93 /* FLASH_TIMING_MODES */
94 #define FMR_TIMING_NONE 0
95 #define FMR_TIMING_NVBITS 1
96 #define FMR_TIMING_FLASH 2
98 #endif /* AT91SAM7_H */