Add RISC-V support.
[openocd.git] / src / flash / nand / s3c2410.c
blob57b51b48ca8029cc2323af9ae9925d0f26bd1051
1 /***************************************************************************
2 * Copyright (C) 2007, 2008 by Ben Dooks *
3 * ben@fluff.org *
4 * *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
9 * *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
14 * *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program. If not, see <http://www.gnu.org/licenses/>. *
17 ***************************************************************************/
20 * S3C2410 OpenOCD NAND Flash controller support.
22 * Many thanks to Simtec Electronics for sponsoring this work.
25 #ifdef HAVE_CONFIG_H
26 #include "config.h"
27 #endif
29 #include "s3c24xx.h"
31 NAND_DEVICE_COMMAND_HANDLER(s3c2410_nand_device_command)
33 struct s3c24xx_nand_controller *info;
34 CALL_S3C24XX_DEVICE_COMMAND(nand, &info);
36 /* fill in the address fields for the core device */
37 info->cmd = S3C2410_NFCMD;
38 info->addr = S3C2410_NFADDR;
39 info->data = S3C2410_NFDATA;
40 info->nfstat = S3C2410_NFSTAT;
42 return ERROR_OK;
45 static int s3c2410_init(struct nand_device *nand)
47 struct target *target = nand->target;
49 target_write_u32(target, S3C2410_NFCONF,
50 S3C2410_NFCONF_EN | S3C2410_NFCONF_TACLS(3) |
51 S3C2410_NFCONF_TWRPH0(5) | S3C2410_NFCONF_TWRPH1(3));
53 return ERROR_OK;
56 static int s3c2410_write_data(struct nand_device *nand, uint16_t data)
58 struct target *target = nand->target;
60 if (target->state != TARGET_HALTED) {
61 LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
62 return ERROR_NAND_OPERATION_FAILED;
65 target_write_u32(target, S3C2410_NFDATA, data);
66 return ERROR_OK;
69 static int s3c2410_read_data(struct nand_device *nand, void *data)
71 struct target *target = nand->target;
73 if (target->state != TARGET_HALTED) {
74 LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
75 return ERROR_NAND_OPERATION_FAILED;
78 target_read_u8(target, S3C2410_NFDATA, data);
79 return ERROR_OK;
82 static int s3c2410_nand_ready(struct nand_device *nand, int timeout)
84 struct target *target = nand->target;
85 uint8_t status;
87 if (target->state != TARGET_HALTED) {
88 LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
89 return ERROR_NAND_OPERATION_FAILED;
92 do {
93 target_read_u8(target, S3C2410_NFSTAT, &status);
95 if (status & S3C2410_NFSTAT_BUSY)
96 return 1;
98 alive_sleep(1);
99 } while (timeout-- > 0);
101 return 0;
104 struct nand_flash_controller s3c2410_nand_controller = {
105 .name = "s3c2410",
106 .nand_device_command = &s3c2410_nand_device_command,
107 .init = &s3c2410_init,
108 .reset = &s3c24xx_reset,
109 .command = &s3c24xx_command,
110 .address = &s3c24xx_address,
111 .write_data = &s3c2410_write_data,
112 .read_data = &s3c2410_read_data,
113 .write_page = s3c24xx_write_page,
114 .read_page = s3c24xx_read_page,
115 .nand_ready = &s3c2410_nand_ready,