1 # SPDX-License-Identifier: GPL-2.0-or-later
3 # Copyright (C) 2023 Synopsys, Inc.
4 # Artemiy Volkov <artemiy@synopsys.com>
6 # Adapted from tcl/target/snps_hsdk.cfg.
9 # HS Development Kit SoC.
11 # Contains quad-core ARC HS47D.
14 source [find cpu/arc/hs.tcl]
17 set _dbgbase [expr {$_coreid << 13}]
19 # CHIPNAME will be used to choose core family (600, 700 or EM). As far as
20 # OpenOCD is concerned EM and HS are identical.
24 proc setup_cpu {core_index expected_id} {
29 set _TARGETNAME $_CHIPNAME.cpu$core_index
30 jtag newtap $_CHIPNAME cpu$core_index -irlen 4 -ircapture 0x1 -expected-id $expected_id
32 target create $_TARGETNAME arcv2 -chain-position $_TARGETNAME
33 $_TARGETNAME configure -coreid $_coreid
34 $_TARGETNAME configure -dbgbase $_dbgbase
35 $_TARGETNAME configure -event reset-assert "arc_hs_reset $_TARGETNAME"
39 $_TARGETNAME arc cache l2 auto 1
41 set _coreid [expr {$_coreid + 1}]
42 set _dbgbase [expr {$_coreid << 13}]
45 # OpenOCD discovers JTAG TAPs in reverse order.
47 setup_cpu 4 0x100c54b1
48 setup_cpu 3 0x100854b1
49 setup_cpu 2 0x100454b1
50 setup_cpu 1 0x100054b1