1 # SPDX-License-Identifier: GPL-2.0-or-later
3 # script for Nuvoton MuMicro Cortex-M4 Series
5 source [find target/swj-dp.tcl]
8 if { [info exists CHIPNAME] } {
9 set _CHIPNAME $CHIPNAME
14 # SWD DP-ID Nuvoton NuMicro Cortex-M4 has SWD Transport only.
15 if { [info exists CPUDAPID] } {
16 set _CPUDAPID $CPUDAPID
18 set _CPUDAPID 0x2BA01477
21 # Work-area is a space in RAM used for flash programming
23 if { [info exists WORKAREASIZE] } {
24 set _WORKAREASIZE $WORKAREASIZE
26 set _WORKAREASIZE 0x4000
30 # Debug Adapter Target Settings
31 swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUDAPID
32 dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
33 set _TARGETNAME $_CHIPNAME.cpu
34 target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap
36 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
38 # flash bank <name> numicro <base> <size(autodetect,set to 0)> 0 0 <target#>
39 #set _FLASHNAME $_CHIPNAME.flash
40 #flash bank $_FLASHNAME numicro 0 $_FLASHSIZE 0 0 $_TARGETNAME
41 # flash size will be probed
42 set _FLASHNAME $_CHIPNAME.flash_aprom
43 flash bank $_FLASHNAME numicro 0x00000000 0 0 0 $_TARGETNAME
44 set _FLASHNAME $_CHIPNAME.flash_data
45 flash bank $_FLASHNAME numicro 0x0001F000 0 0 0 $_TARGETNAME
46 set _FLASHNAME $_CHIPNAME.flash_ldrom
47 flash bank $_FLASHNAME numicro 0x00100000 0 0 0 $_TARGETNAME
48 set _FLASHNAME $_CHIPNAME.flash_config
49 flash bank $_FLASHNAME numicro 0x00300000 0 0 0 $_TARGETNAME
51 # set default SWCLK frequency
54 # set default srst setting "none"
57 # HLA doesn't have cortex_m commands
59 # if srst is not fitted use SYSRESETREQ to
60 # perform a soft reset
61 cortex_m reset_config sysresetreq