1 # SPDX-License-Identifier: GPL-2.0-or-later
4 # Target configuration for the Silicon Labs EM357 chips
8 # em357 family supports JTAG and SWD transports
10 source [find target/swj-dp.tcl]
12 if { [info exists CHIPNAME] } {
13 set _CHIPNAME $CHIPNAME
18 # Work-area is a space in RAM used for flash programming
20 if { [info exists WORKAREASIZE] } {
21 set _WORKAREASIZE $WORKAREASIZE
23 set _WORKAREASIZE 0x1000
26 if { [info exists CPUTAPID] } {
27 set _CPUTAPID $CPUTAPID
30 set _CPUTAPID 0x3ba00477
32 set _CPUTAPID 0x1ba00477
36 if { [info exists BSTAPID] } {
39 set _BSTAPID 0x069a962b
42 if { [info exists CHIPNAME] } {
43 set _CHIPNAME $CHIPNAME
48 if { [info exists FLASHSIZE] } {
49 set _FLASHSIZE $FLASHSIZE
51 set _FLASHSIZE 0x30000
54 swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
55 dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
57 jtag newtap $_CHIPNAME bs -irlen 4 -expected-id $_BSTAPID -ircapture 0xe -irmask 0xf
60 set _TARGETNAME $_CHIPNAME.cpu
61 target create $_TARGETNAME cortex_m -endian little -dap $_CHIPNAME.dap
63 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
65 set _FLASHNAME $_CHIPNAME.flash
66 flash bank $_FLASHNAME em357 0x08000000 $_FLASHSIZE 0 0 $_TARGETNAME
69 # according to errata, we need to use vectreset rather than sysresetreq to avoid lockup
70 # There is a bug in the chip, which means that when using external debuggers the chip
71 # may lock up in certain CPU clock modes. Affected modes are operating the CPU at
72 # 24MHz derived from the 24MHz crystal, or 12MHz derived from the high frequency RC
73 # oscillator. If an external debugger tool asserts SYSRESETREQ, the chip will lock up and
74 # require a pin reset or power cycle.
76 # for details, refer to:
77 # http://www.silabs.com/Support%20Documents/TechnicalDocs/EM35x-Errata.pdf
78 cortex_m reset_config vectreset