1 # SPDX-License-Identifier: GPL-2.0-or-later
3 # script for Nuvoton NPCX Cortex-M4 Series
5 # Adapt based on what transport is active.
6 source [find target/swj-dp.tcl]
9 if { [info exists CHIPNAME] } {
10 set _CHIPNAME $CHIPNAME
15 # SWD DAP ID of Nuvoton NPCX Cortex-M4.
16 if { [info exists CPUDAPID ] } {
17 set _CPUDAPID $CPUDAPID
19 set _CPUDAPID 0x4BA00477
22 # Work-area is a space in RAM used for flash programming
24 if { [info exists WORKAREASIZE] } {
25 set _WORKAREASIZE $WORKAREASIZE
27 set _WORKAREASIZE 0x8000
30 if { [info exists FIUNAME]} {
36 # Debug Adapter Target Settings
37 swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUDAPID
38 dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
39 set _TARGETNAME $_CHIPNAME.cpu
40 target create $_TARGETNAME cortex_m -endian little -dap $_CHIPNAME.dap
42 $_TARGETNAME configure -work-area-phys 0x200c0000 -work-area-size $_WORKAREASIZE -work-area-backup 0
44 # Initial JTAG/SWD speed
45 # For safety purposes, set for the lowest cpu clock configuration
46 # 4MHz / 6 = 666KHz, so use 600KHz for it
49 # For safety purposes, set for the lowest cpu clock configuration
50 $_TARGETNAME configure -event reset-start {adapter speed 600}
52 # use sysresetreq to perform a system reset
53 cortex_m reset_config sysresetreq
56 set _FLASHNAME $_CHIPNAME.flash
57 flash bank $_FLASHNAME npcx 0x64000000 0 0 0 $_TARGETNAME $_FIUNAME