1 # SPDX-License-Identifier: GPL-2.0-or-later
3 # Maxim Integrated MAX3263X OpenOCD target configuration file
4 # www.maximintegrated.com
9 # reset pin configuration
10 reset_config srst_only
13 jtag newtap max3263x cpu -irlen 4 -irmask 0xf -expected-id 0x4ba00477 -ignore-version
14 jtag newtap maxtest tap -irlen 4 -irmask 0xf -ircapture 0x1 -expected-id 0x07f76197 -ignore-version
16 swd newdap max3263x cpu -irlen 4 -irmask 0xf -expected-id 0x2ba01477 -ignore-version
19 dap create max3263x.dap -chain-position max3263x.cpu
21 # target configuration
22 target create max3263x.cpu cortex_m -dap max3263x.dap
23 max3263x.cpu configure -work-area-phys 0x20005000 -work-area-size 0x2000
25 # Config Command: flash bank name driver base size chip_width bus_width target [driver_options]
26 # flash bank <name> max32xxx <base> <size> 0 0 <target> <flc base> <sector> <clk> <burst>
27 # max3263x flash base address 0x00000000
28 # max3263x flash size 0x200000 (2MB)
29 # max3263x FLC base address 0x40002000
30 # max3263x sector (page) size 0x2000 (8kB)
31 # max3263x clock speed 96 (MHz)
32 flash bank max3263x.flash max32xxx 0x00000000 0x200000 0 0 max3263x.cpu 0x40002000 0x2000 96