1 # SPDX-License-Identifier: GPL-2.0-or-later
4 # NXP i.MX7ULP: Cortex-A7 + Cortex-M4
7 if { [info exists CHIPNAME] } {
8 set _CHIPNAME $CHIPNAME
13 # CoreSight Debug Access Port
14 if { [info exists DAP_TAPID] } {
15 set _DAP_TAPID $DAP_TAPID
17 # TAPID is from FreeScale!
18 set _DAP_TAPID 0x188e101d
21 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x01 -irmask 0x0f \
22 -expected-id $_DAP_TAPID
24 dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
27 target create $_CHIPNAME.cpu_a7 cortex_a -dap $_CHIPNAME.dap \
28 -coreid 0 -dbgbase 0x80030000
31 # Boots by default so don't defer examination
32 target create $_CHIPNAME.cpu_m4 cortex_m -dap $_CHIPNAME.dap -ap-num 3
35 target create $_CHIPNAME.ahb mem_ap -dap $_CHIPNAME.dap -ap-num 0
37 # Default is Cortex-A7
38 targets $_CHIPNAME.cpu_a7