1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 /***************************************************************************
4 * Copyright (C) 2005 by Dominic Rath *
5 * Dominic.Rath@gmx.de *
6 ***************************************************************************/
8 #ifndef OPENOCD_TARGET_ARM920T_H
9 #define OPENOCD_TARGET_ARM920T_H
12 #include "armv4_5_mmu.h"
14 #define ARM920T_COMMON_MAGIC 0xa920a920U
16 struct arm920t_common
{
17 unsigned int common_magic
;
19 struct arm7_9_common arm7_9_common
;
20 struct armv4_5_mmu_common armv4_5_mmu
;
21 uint32_t cp15_control_reg
;
29 static inline struct arm920t_common
*target_to_arm920(struct target
*target
)
31 return container_of(target
->arch_info
, struct arm920t_common
, arm7_9_common
.arm
);
34 struct arm920t_cache_line
{
39 struct arm920t_tlb_entry
{
45 int arm920t_arch_state(struct target
*target
);
46 int arm920t_soft_reset_halt(struct target
*target
);
47 int arm920t_read_memory(struct target
*target
,
48 target_addr_t address
, uint32_t size
, uint32_t count
, uint8_t *buffer
);
49 int arm920t_write_memory(struct target
*target
,
50 target_addr_t address
, uint32_t size
, uint32_t count
, const uint8_t *buffer
);
51 int arm920t_post_debug_entry(struct target
*target
);
52 void arm920t_pre_restore_context(struct target
*target
);
53 int arm920t_get_ttb(struct target
*target
, uint32_t *result
);
54 int arm920t_disable_mmu_caches(struct target
*target
,
55 int mmu
, int d_u_cache
, int i_cache
);
56 int arm920t_enable_mmu_caches(struct target
*target
,
57 int mmu
, int d_u_cache
, int i_cache
);
59 extern const struct command_registration arm920t_command_handlers
[];
61 #endif /* OPENOCD_TARGET_ARM920T_H */