1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 /***************************************************************************
4 * Copyright (C) 2005, 2007 by Dominic Rath *
5 * Dominic.Rath@gmx.de *
6 * Copyright (C) 2010 Spencer Oliver *
7 * spen@spen-soft.co.uk *
8 ***************************************************************************/
18 /* input parameters - */
19 /* R0 = source address */
20 /* R1 = destination address */
21 /* R2 = number of writes */
22 /* R3 = flash write command */
23 /* R4 = constant to mask DQ7 bits (also used for Dq5 with shift) */
24 /* output parameters - */
25 /* R5 = 0x80 ok 0x00 bad */
26 /* temp registers - */
27 /* R6 = value read from flash to test status */
28 /* R7 = holding register */
29 /* unlock registers - */
30 /* R8 = unlock1_addr */
31 /* R9 = unlock1_cmd */
32 /* R10 = unlock2_addr */
33 /* R11 = unlock2_cmd */
46 beq cont
/* b if DQ7 == Data7 */
47 ands
r6, r6, r4, lsr
#2
48 beq busy
/* b if DQ5 low */
52 beq cont
/* b if DQ7 == Data7 */
53 mov
r5, #0 /* 0x0 - return 0x00, error */
56 subs
r2, r2, #1 /* 0x1 */
58 add r1, r1, #2 /* 0x2 */
62 mov
r5, #128 /* 0x80 */