1 # SPDX-License-Identifier: GPL-2.0-or-later
2 # Cadence virtual debug interface
3 # Arm Cortex m4 through DAP
5 source [find interface/vdebug.cfg]
8 set _MEMSTART 0x00000000
11 # vdebug select transport
12 transport select dapdirect_swd
16 # BFM hierarchical path and input clk period
17 vdebug bfm_path tbench.u_vd_swdp_bfm 20ns
19 # DMA Memories to access backdoor (up to 4)
20 vdebug mem_path tbench.u_mcu.u_sys.u_rom.rom $_MEMSTART $_MEMSIZE
22 source [find target/swj-dp.tcl]
24 swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf
26 source [find target/vd_cortex_m.cfg]