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adi_v5_jtag: extend memaccess_tck to every AP access
[openocd.git] / src / target / adi_v5_jtag.c
blob67ad0b1e93cff8bc4c986be45970497785246df3
1 /***************************************************************************
2 * Copyright (C) 2006 by Magnus Lundin
3 * lundin@mlu.mine.nu
4 *
5 * Copyright (C) 2008 by Spencer Oliver
6 * spen@spen-soft.co.uk
7 *
8 * Copyright (C) 2009 by Oyvind Harboe
9 * oyvind.harboe@zylin.com
10 *
11 * Copyright (C) 2009-2010 by David Brownell
12 *
13 * Copyright (C) 2020-2021, Ampere Computing LLC *
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program. If not, see <http://www.gnu.org/licenses/>.
27 ***************************************************************************/
28
29 /**
30 * @file
31 * This file implements JTAG transport support for cores implementing
32 the ARM Debug Interface version 5 (ADIv5) and version 6 (ADIv6).
33 */
34
35 #ifdef HAVE_CONFIG_H
36 #include "config.h"
37 #endif
38
39 #include "arm.h"
40 #include "arm_adi_v5.h"
41 #include <helper/time_support.h>
42 #include <helper/list.h>
43 #include <jtag/swd.h>
44
45 /*#define DEBUG_WAIT*/
46
47 /* JTAG instructions/registers for JTAG-DP and SWJ-DP */
48 #define JTAG_DP_ABORT 0xF8
49 #define JTAG_DP_DPACC 0xFA
50 #define JTAG_DP_APACC 0xFB
51 #define JTAG_DP_IDCODE 0xFE
52
53 /* three-bit ACK values for DPACC and APACC reads */
54 #define JTAG_ACK_WAIT 0x1 /* ADIv5 and ADIv6 */
55 #define JTAG_ACK_OK_FAULT 0x2 /* ADIv5 */
56 #define JTAG_ACK_FAULT 0x2 /* ADIv6 */
57 #define JTAG_ACK_OK 0x4 /* ADIV6 */
58
59 static int jtag_ap_q_abort(struct adiv5_dap *dap, uint8_t *ack);
60
61 #ifdef DEBUG_WAIT
62 static const char *dap_reg_name(struct adiv5_dap *dap, uint8_t instr, uint16_t reg_addr)
63 {
64 char *reg_name = "UNK";
65
66 if (instr == JTAG_DP_DPACC) {
67 switch (reg_addr) {
68 case DP_ABORT:
69 reg_name = "ABORT";
70 break;
71 case DP_CTRL_STAT:
72 reg_name = "CTRL/STAT";
73 break;
74 case DP_SELECT:
75 reg_name = "SELECT";
76 break;
77 case DP_RDBUFF:
78 reg_name = "RDBUFF";
79 break;
80 case DP_DLCR:
81 reg_name = "DLCR";
82 break;
83 default:
84 reg_name = "UNK";
85 break;
86 }
87 }
88
89 if (instr == JTAG_DP_APACC) {
90 if (reg_addr == MEM_AP_REG_CSW(dap))
91 reg_name = "CSW";
92 else if (reg_addr == MEM_AP_REG_TAR(dap))
93 reg_name = "TAR";
94 else if (reg_addr == MEM_AP_REG_TAR64(dap))
95 reg_name = "TAR64";
96 else if (reg_addr == MEM_AP_REG_DRW(dap))
97 reg_name = "DRW";
98 else if (reg_addr == MEM_AP_REG_BD0(dap))
99 reg_name = "BD0";
100 else if (reg_addr == MEM_AP_REG_BD1(dap))
101 reg_name = "BD1";
102 else if (reg_addr == MEM_AP_REG_BD2(dap))
103 reg_name = "BD2";
104 else if (reg_addr == MEM_AP_REG_BD3(dap))
105 reg_name = "BD3";
106 else if (reg_addr == MEM_AP_REG_CFG(dap))
107 reg_name = "CFG";
108 else if (reg_addr == MEM_AP_REG_BASE(dap))
109 reg_name = "BASE";
110 else if (reg_addr == MEM_AP_REG_BASE64(dap))
111 reg_name = "BASE64";
112 else if (reg_addr == AP_REG_IDR(dap))
113 reg_name = "IDR";
114 else
115 reg_name = "UNK";
116 }
117
118 return reg_name;
119 }
120 #endif
121
122 struct dap_cmd {
123 struct list_head lh;
124 uint8_t instr;
125 uint16_t reg_addr;
126 uint8_t rnw;
127 uint8_t *invalue;
128 uint8_t ack;
129 uint32_t memaccess_tck;
130 uint64_t dp_select;
131
132 struct scan_field fields[2];
133 uint8_t out_addr_buf;
134 uint8_t invalue_buf[4];
135 uint8_t outvalue_buf[4];
136 };
137
138 #define MAX_DAP_COMMAND_NUM 65536
139
140 struct dap_cmd_pool {
141 struct list_head lh;
142 struct dap_cmd cmd;
143 };
144
145 static void log_dap_cmd(struct adiv5_dap *dap, const char *header, struct dap_cmd *el)
146 {
147 #ifdef DEBUG_WAIT
148 const char *ack;
149 switch (el->ack) {
150 case JTAG_ACK_WAIT: /* ADIv5 and ADIv6 */
151 ack = "WAIT";
152 break;
153 case JTAG_ACK_OK_FAULT: /* ADIv5, same value as JTAG_ACK_FAULT */
154 /* case JTAG_ACK_FAULT: */ /* ADIv6 */
155 if (is_adiv6(dap))
156 ack = "FAULT";
157 else
158 ack = "OK";
159 break;
160 case JTAG_ACK_OK: /* ADIv6 */
161 if (is_adiv6(dap)) {
162 ack = "OK";
163 break;
164 }
165 /* fall-through */
166 default:
167 ack = "INVAL";
168 break;
169 }
170 LOG_DEBUG("%s: %2s %6s %5s 0x%08x 0x%08x %2s", header,
171 el->instr == JTAG_DP_APACC ? "AP" : "DP",
172 dap_reg_name(dap, el->instr, el->reg_addr),
173 el->rnw == DPAP_READ ? "READ" : "WRITE",
174 buf_get_u32(el->outvalue_buf, 0, 32),
175 buf_get_u32(el->invalue, 0, 32),
176 ack);
177 #endif
178 }
179
180 static int jtag_limit_queue_size(struct adiv5_dap *dap)
181 {
182 if (dap->cmd_pool_size < MAX_DAP_COMMAND_NUM)
183 return ERROR_OK;
184
185 return dap_run(dap);
186 }
187
188 static struct dap_cmd *dap_cmd_new(struct adiv5_dap *dap, uint8_t instr,
189 uint16_t reg_addr, uint8_t rnw,
190 uint8_t *outvalue, uint8_t *invalue,
191 uint32_t memaccess_tck)
192 {
193
194 struct dap_cmd_pool *pool = NULL;
195
196 if (list_empty(&dap->cmd_pool)) {
197 pool = calloc(1, sizeof(struct dap_cmd_pool));
198 if (!pool)
199 return NULL;
200 } else {
201 pool = list_first_entry(&dap->cmd_pool, struct dap_cmd_pool, lh);
202 list_del(&pool->lh);
203 }
204
205 INIT_LIST_HEAD(&pool->lh);
206 dap->cmd_pool_size++;
207
208 struct dap_cmd *cmd = &pool->cmd;
209 INIT_LIST_HEAD(&cmd->lh);
210 cmd->instr = instr;
211 cmd->reg_addr = reg_addr;
212 cmd->rnw = rnw;
213 if (outvalue)
214 memcpy(cmd->outvalue_buf, outvalue, 4);
215 cmd->invalue = (invalue) ? invalue : cmd->invalue_buf;
216 cmd->memaccess_tck = memaccess_tck;
217
218 return cmd;
219 }
220
221 static void dap_cmd_release(struct adiv5_dap *dap, struct dap_cmd *cmd)
222 {
223 struct dap_cmd_pool *pool = container_of(cmd, struct dap_cmd_pool, cmd);
224 if (dap->cmd_pool_size > MAX_DAP_COMMAND_NUM)
225 free(pool);
226 else
227 list_add(&pool->lh, &dap->cmd_pool);
228
229 dap->cmd_pool_size--;
230 }
231
232 static void flush_journal(struct adiv5_dap *dap, struct list_head *lh)
233 {
234 struct dap_cmd *el, *tmp;
235
236 list_for_each_entry_safe(el, tmp, lh, lh) {
237 list_del(&el->lh);
238 dap_cmd_release(dap, el);
239 }
240 }
241
242 static void jtag_quit(struct adiv5_dap *dap)
243 {
244 struct dap_cmd_pool *el, *tmp;
245 struct list_head *lh = &dap->cmd_pool;
246
247 list_for_each_entry_safe(el, tmp, lh, lh) {
248 list_del(&el->lh);
249 free(el);
250 }
251 }
252
253 /***************************************************************************
254 *
255 * DPACC and APACC scanchain access through JTAG-DP (or SWJ-DP)
256 *
257 ***************************************************************************/
258
259 static int adi_jtag_dp_scan_cmd(struct adiv5_dap *dap, struct dap_cmd *cmd, uint8_t *ack)
260 {
261 struct jtag_tap *tap = dap->tap;
262 int retval;
263
264 retval = arm_jtag_set_instr(tap, cmd->instr, NULL, TAP_IDLE);
265 if (retval != ERROR_OK)
266 return retval;
267
268 /* Scan out a read or write operation using some DP or AP register.
269 * For APACC access with any sticky error flag set, this is discarded.
270 */
271 cmd->fields[0].num_bits = 3;
272 buf_set_u32(&cmd->out_addr_buf, 0, 3, ((cmd->reg_addr >> 1) & 0x6) | (cmd->rnw & 0x1));
273 cmd->fields[0].out_value = &cmd->out_addr_buf;
274 cmd->fields[0].in_value = (ack) ? ack : &cmd->ack;
275
276 /* NOTE: if we receive JTAG_ACK_WAIT, the previous operation did not
277 * complete; data we write is discarded, data we read is unpredictable.
278 * When overrun detect is active, STICKYORUN is set.
279 */
280
281 cmd->fields[1].num_bits = 32;
282 cmd->fields[1].out_value = cmd->outvalue_buf;
283 cmd->fields[1].in_value = cmd->invalue;
284
285 jtag_add_dr_scan(tap, 2, cmd->fields, TAP_IDLE);
286
287 /* Add specified number of tck clocks after starting AP register
288 * access or memory bus access, giving the hardware time to complete
289 * the access.
290 * They provide more time for the (MEM) AP to complete the read ...
291 * See "Minimum Response Time" for JTAG-DP, in the ADIv5/ADIv6 spec.
292 */
293 if (cmd->instr == JTAG_DP_APACC && cmd->memaccess_tck != 0)
294 jtag_add_runtest(cmd->memaccess_tck, TAP_IDLE);
295
296 return ERROR_OK;
297 }
298
299 static int adi_jtag_dp_scan_cmd_sync(struct adiv5_dap *dap, struct dap_cmd *cmd, uint8_t *ack)
300 {
301 int retval;
302
303 retval = adi_jtag_dp_scan_cmd(dap, cmd, ack);
304 if (retval != ERROR_OK)
305 return retval;
306
307 return jtag_execute_queue();
308 }
309
310 /**
311 * Scan DPACC or APACC using target ordered uint8_t buffers. No endianness
312 * conversions are performed. See section 4.4.3 of the ADIv5/ADIv6 spec, which
313 * discusses operations which access these registers.
314 *
315 * Note that only one scan is performed. If rnw is set, a separate scan
316 * will be needed to collect the data which was read; the "invalue" collects
317 * the posted result of a preceding operation, not the current one.
318 *
319 * @param dap the DAP
320 * @param instr JTAG_DP_APACC (AP access) or JTAG_DP_DPACC (DP access)
321 * @param reg_addr two significant bits; A[3:2]; for APACC access, the
322 * SELECT register has more addressing bits.
323 * @param rnw false iff outvalue will be written to the DP or AP
324 * @param outvalue points to a 32-bit (little-endian) integer
325 * @param invalue NULL, or points to a 32-bit (little-endian) integer
326 * @param ack points to where the three bit JTAG_ACK_* code will be stored
327 * @param memaccess_tck number of idle cycles to add after AP access
328 */
329
330 static int adi_jtag_dp_scan(struct adiv5_dap *dap,
331 uint8_t instr, uint16_t reg_addr, uint8_t rnw,
332 uint8_t *outvalue, uint8_t *invalue,
333 uint32_t memaccess_tck, uint8_t *ack)
334 {
335 struct dap_cmd *cmd;
336 int retval;
337
338 cmd = dap_cmd_new(dap, instr, reg_addr, rnw, outvalue, invalue, memaccess_tck);
339 if (cmd)
340 cmd->dp_select = dap->select;
341 else
342 return ERROR_JTAG_DEVICE_ERROR;
343
344 retval = adi_jtag_dp_scan_cmd(dap, cmd, ack);
345 if (retval == ERROR_OK)
346 list_add_tail(&cmd->lh, &dap->cmd_journal);
347
348 return retval;
349 }
350
351 /**
352 * Scan DPACC or APACC out and in from host ordered uint32_t buffers.
353 * This is exactly like adi_jtag_dp_scan(), except that endianness
354 * conversions are performed (so the types of invalue and outvalue
355 * must be different).
356 */
357 static int adi_jtag_dp_scan_u32(struct adiv5_dap *dap,
358 uint8_t instr, uint16_t reg_addr, uint8_t rnw,
359 uint32_t outvalue, uint32_t *invalue,
360 uint32_t memaccess_tck, uint8_t *ack)
361 {
362 uint8_t out_value_buf[4];
363 int retval;
364 uint64_t sel = (reg_addr >> 4) & 0xf;
365
366 /* No need to change SELECT or RDBUFF as they are not banked */
367 if (instr == JTAG_DP_DPACC && reg_addr != DP_SELECT && reg_addr != DP_RDBUFF &&
368 sel != (dap->select & 0xf)) {
369 if (dap->select != DP_SELECT_INVALID)
370 sel |= dap->select & ~0xfull;
371 dap->select = sel;
372 LOG_DEBUG("DP BANKSEL: %x", (uint32_t)sel);
373 buf_set_u32(out_value_buf, 0, 32, (uint32_t)sel);
374 retval = adi_jtag_dp_scan(dap, JTAG_DP_DPACC,
375 DP_SELECT, DPAP_WRITE, out_value_buf, NULL, 0, NULL);
376 if (retval != ERROR_OK)
377 return retval;
378 }
379 buf_set_u32(out_value_buf, 0, 32, outvalue);
380
381 retval = adi_jtag_dp_scan(dap, instr, reg_addr, rnw,
382 out_value_buf, (uint8_t *)invalue, memaccess_tck, ack);
383 if (retval != ERROR_OK)
384 return retval;
385
386 if (invalue)
387 jtag_add_callback(arm_le_to_h_u32,
388 (jtag_callback_data_t) invalue);
389
390 return retval;
391 }
392
393 static int adi_jtag_finish_read(struct adiv5_dap *dap)
394 {
395 int retval = ERROR_OK;
396
397 if (dap->last_read) {
398 retval = adi_jtag_dp_scan_u32(dap, JTAG_DP_DPACC,
399 DP_RDBUFF, DPAP_READ, 0, dap->last_read, 0, NULL);
400 dap->last_read = NULL;
401 }
402
403 return retval;
404 }
405
406 static int adi_jtag_scan_inout_check_u32(struct adiv5_dap *dap,
407 uint8_t instr, uint16_t reg_addr, uint8_t rnw,
408 uint32_t outvalue, uint32_t *invalue, uint32_t memaccess_tck)
409 {
410 int retval;
411
412 /* Issue the read or write */
413 retval = adi_jtag_dp_scan_u32(dap, instr, reg_addr,
414 rnw, outvalue, NULL, memaccess_tck, NULL);
415 if (retval != ERROR_OK)
416 return retval;
417
418 /* For reads, collect posted value; RDBUFF has no other effect.
419 * Assumes read gets acked with OK/FAULT, and CTRL_STAT says "OK".
420 */
421 if ((rnw == DPAP_READ) && (invalue)) {
422 retval = adi_jtag_dp_scan_u32(dap, JTAG_DP_DPACC,
423 DP_RDBUFF, DPAP_READ, 0, invalue, 0, NULL);
424 if (retval != ERROR_OK)
425 return retval;
426 }
427
428 return jtag_execute_queue();
429 }
430
431 static int jtagdp_overrun_check(struct adiv5_dap *dap)
432 {
433 int retval;
434 struct dap_cmd *el, *tmp, *prev = NULL;
435 int found_wait = 0;
436 int64_t time_now;
437 LIST_HEAD(replay_list);
438
439 /* make sure all queued transactions are complete */
440 retval = jtag_execute_queue();
441 if (retval != ERROR_OK)
442 goto done;
443
444 /* skip all completed transactions up to the first WAIT */
445 list_for_each_entry(el, &dap->cmd_journal, lh) {
446 /*
447 * JTAG_ACK_OK_FAULT (ADIv5) and JTAG_ACK_FAULT (ADIv6) are equal so
448 * the following statement is checking to see if an acknowledgment of
449 * OK or FAULT is generated for ADIv5 or ADIv6
450 */
451 if (el->ack == JTAG_ACK_OK_FAULT || (is_adiv6(dap) && el->ack == JTAG_ACK_OK)) {
452 log_dap_cmd(dap, "LOG", el);
453 } else if (el->ack == JTAG_ACK_WAIT) {
454 found_wait = 1;
455 break;
456 } else {
457 LOG_ERROR("Invalid ACK (%1x) in DAP response", el->ack);
458 log_dap_cmd(dap, "ERR", el);
459 retval = ERROR_JTAG_DEVICE_ERROR;
460 goto done;
461 }
462 }
463
464 /*
465 * If we found a stalled transaction and a previous transaction
466 * exists, check if it's a READ access.
467 */
468 if (found_wait && el != list_first_entry(&dap->cmd_journal, struct dap_cmd, lh)) {
469 prev = list_entry(el->lh.prev, struct dap_cmd, lh);
470 if (prev->rnw == DPAP_READ) {
471 log_dap_cmd(dap, "PND", prev);
472 /* search for the next OK transaction, it contains
473 * the result of the previous READ */
474 tmp = el;
475 list_for_each_entry_from(tmp, &dap->cmd_journal, lh) {
476 /* The following check covers OK and FAULT ACKs for both ADIv5 and ADIv6 */
477 if (tmp->ack == JTAG_ACK_OK_FAULT || (is_adiv6(dap) && tmp->ack == JTAG_ACK_OK)) {
478 /* recover the read value */
479 log_dap_cmd(dap, "FND", tmp);
480 if (el->invalue != el->invalue_buf) {
481 uint32_t invalue = le_to_h_u32(tmp->invalue);
482 memcpy(el->invalue, &invalue, sizeof(uint32_t));
483 }
484 prev = NULL;
485 break;
486 }
487 }
488
489 if (prev) {
490 log_dap_cmd(dap, "LST", el);
491
492 /*
493 * At this point we're sure that no previous
494 * transaction completed and the DAP/AP is still
495 * in busy state. We know that the next "OK" scan
496 * will return the READ result we need to recover.
497 * To complete the READ, we just keep polling RDBUFF
498 * until the WAIT condition clears
499 */
500 tmp = dap_cmd_new(dap, JTAG_DP_DPACC,
501 DP_RDBUFF, DPAP_READ, NULL, NULL, 0);
502 if (!tmp) {
503 retval = ERROR_JTAG_DEVICE_ERROR;
504 goto done;
505 }
506 /* synchronously retry the command until it succeeds */
507 time_now = timeval_ms();
508 do {
509 retval = adi_jtag_dp_scan_cmd_sync(dap, tmp, NULL);
510 if (retval != ERROR_OK)
511 break;
512 /* The following check covers OK and FAULT ACKs for both ADIv5 and ADIv6 */
513 if (tmp->ack == JTAG_ACK_OK_FAULT || (is_adiv6(dap) && tmp->ack == JTAG_ACK_OK)) {
514 log_dap_cmd(dap, "FND", tmp);
515 if (el->invalue != el->invalue_buf) {
516 uint32_t invalue = le_to_h_u32(tmp->invalue);
517 memcpy(el->invalue, &invalue, sizeof(uint32_t));
518 }
519 break;
520 }
521 if (tmp->ack != JTAG_ACK_WAIT) {
522 LOG_ERROR("Invalid ACK (%1x) in DAP response", tmp->ack);
523 log_dap_cmd(dap, "ERR", tmp);
524 retval = ERROR_JTAG_DEVICE_ERROR;
525 break;
526 }
527
528 } while (timeval_ms() - time_now < 1000);
529
530 if (retval == ERROR_OK) {
531 /* timeout happened */
532 if (tmp->ack == JTAG_ACK_WAIT) {
533 LOG_ERROR("Timeout during WAIT recovery");
534 dap->select = DP_SELECT_INVALID;
535 jtag_ap_q_abort(dap, NULL);
536 /* clear the sticky overrun condition */
537 adi_jtag_scan_inout_check_u32(dap, JTAG_DP_DPACC,
538 DP_CTRL_STAT, DPAP_WRITE,
539 dap->dp_ctrl_stat | SSTICKYORUN, NULL, 0);
540 retval = ERROR_JTAG_DEVICE_ERROR;
541 }
542 }
543
544 /* we're done with this command, release it */
545 dap_cmd_release(dap, tmp);
546
547 if (retval != ERROR_OK)
548 goto done;
549
550 }
551 /* make el->invalue point to the default invalue
552 * so that we can safely retry it without clobbering
553 * the result we just recovered */
554 el->invalue = el->invalue_buf;
555 }
556 }
557
558 /* move all remaining transactions over to the replay list */
559 list_for_each_entry_safe_from(el, tmp, &dap->cmd_journal, lh) {
560 log_dap_cmd(dap, "REP", el);
561 list_move_tail(&el->lh, &replay_list);
562 }
563
564 /* we're done with the journal, flush it */
565 flush_journal(dap, &dap->cmd_journal);
566
567 /* check for overrun condition in the last batch of transactions */
568 if (found_wait) {
569 LOG_INFO("DAP transaction stalled (WAIT) - slowing down and resending");
570 /* clear the sticky overrun condition */
571 retval = adi_jtag_scan_inout_check_u32(dap, JTAG_DP_DPACC,
572 DP_CTRL_STAT, DPAP_WRITE,
573 dap->dp_ctrl_stat | SSTICKYORUN, NULL, 0);
574 if (retval != ERROR_OK)
575 goto done;
576
577 /* restore SELECT register first */
578 if (!list_empty(&replay_list)) {
579 el = list_first_entry(&replay_list, struct dap_cmd, lh);
580 tmp = dap_cmd_new(dap, JTAG_DP_DPACC,
581 DP_SELECT, DPAP_WRITE, (uint8_t *)&el->dp_select, NULL, 0);
582 if (!tmp) {
583 retval = ERROR_JTAG_DEVICE_ERROR;
584 goto done;
585 }
586 list_add(&tmp->lh, &replay_list);
587
588 dap->select = DP_SELECT_INVALID;
589 }
590
591 list_for_each_entry_safe(el, tmp, &replay_list, lh) {
592 time_now = timeval_ms();
593 do {
594 retval = adi_jtag_dp_scan_cmd_sync(dap, el, NULL);
595 if (retval != ERROR_OK)
596 break;
597 log_dap_cmd(dap, "REC", el);
598 if (el->ack == JTAG_ACK_OK_FAULT || (is_adiv6(dap) && el->ack == JTAG_ACK_OK)) {
599 if (el->invalue != el->invalue_buf) {
600 uint32_t invalue = le_to_h_u32(el->invalue);
601 memcpy(el->invalue, &invalue, sizeof(uint32_t));
602 }
603 break;
604 }
605 if (el->ack != JTAG_ACK_WAIT) {
606 LOG_ERROR("Invalid ACK (%1x) in DAP response", el->ack);
607 log_dap_cmd(dap, "ERR", el);
608 retval = ERROR_JTAG_DEVICE_ERROR;
609 break;
610 }
611 LOG_DEBUG("DAP transaction stalled during replay (WAIT) - resending");
612 /* clear the sticky overrun condition */
613 retval = adi_jtag_scan_inout_check_u32(dap, JTAG_DP_DPACC,
614 DP_CTRL_STAT, DPAP_WRITE,
615 dap->dp_ctrl_stat | SSTICKYORUN, NULL, 0);
616 if (retval != ERROR_OK)
617 break;
618 } while (timeval_ms() - time_now < 1000);
619
620 if (retval == ERROR_OK) {
621 if (el->ack == JTAG_ACK_WAIT) {
622 LOG_ERROR("Timeout during WAIT recovery");
623 dap->select = DP_SELECT_INVALID;
624 jtag_ap_q_abort(dap, NULL);
625 /* clear the sticky overrun condition */
626 adi_jtag_scan_inout_check_u32(dap, JTAG_DP_DPACC,
627 DP_CTRL_STAT, DPAP_WRITE,
628 dap->dp_ctrl_stat | SSTICKYORUN, NULL, 0);
629 retval = ERROR_JTAG_DEVICE_ERROR;
630 break;
631 }
632 } else
633 break;
634 }
635 }
636
637 done:
638 flush_journal(dap, &replay_list);
639 flush_journal(dap, &dap->cmd_journal);
640 return retval;
641 }
642
643 static int jtagdp_transaction_endcheck(struct adiv5_dap *dap)
644 {
645 int retval;
646 uint32_t ctrlstat, pwrmask;
647
648 /* too expensive to call keep_alive() here */
649
650 /* Post CTRL/STAT read; discard any previous posted read value
651 * but collect its ACK status.
652 */
653 retval = adi_jtag_scan_inout_check_u32(dap, JTAG_DP_DPACC,
654 DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat, 0);
655 if (retval != ERROR_OK)
656 goto done;
657
658 /* REVISIT also STICKYCMP, for pushed comparisons (nyet used) */
659
660 /* Check for STICKYERR */
661 if (ctrlstat & SSTICKYERR) {
662 LOG_DEBUG("jtag-dp: CTRL/STAT 0x%" PRIx32, ctrlstat);
663 /* Check power to debug regions */
664 pwrmask = CDBGPWRUPREQ | CDBGPWRUPACK | CSYSPWRUPREQ;
665 if (!dap->ignore_syspwrupack)
666 pwrmask |= CSYSPWRUPACK;
667 if ((ctrlstat & pwrmask) != pwrmask) {
668 LOG_ERROR("Debug regions are unpowered, an unexpected reset might have happened");
669 dap->do_reconnect = true;
670 }
671
672 if (ctrlstat & SSTICKYERR)
673 LOG_ERROR("JTAG-DP STICKY ERROR");
674 if (ctrlstat & SSTICKYORUN)
675 LOG_DEBUG("JTAG-DP STICKY OVERRUN");
676
677 /* Clear Sticky Error and Sticky Overrun Bits */
678 retval = adi_jtag_scan_inout_check_u32(dap, JTAG_DP_DPACC,
679 DP_CTRL_STAT, DPAP_WRITE,
680 dap->dp_ctrl_stat | SSTICKYERR | SSTICKYORUN, NULL, 0);
681 if (retval != ERROR_OK)
682 goto done;
683
684 retval = ERROR_JTAG_DEVICE_ERROR;
685 }
686
687 done:
688 flush_journal(dap, &dap->cmd_journal);
689 return retval;
690 }
691
692 /*--------------------------------------------------------------------------*/
693
694 static int jtag_connect(struct adiv5_dap *dap)
695 {
696 dap->do_reconnect = false;
697 return dap_dp_init(dap);
698 }
699
700 static int jtag_check_reconnect(struct adiv5_dap *dap)
701 {
702 if (dap->do_reconnect)
703 return jtag_connect(dap);
704
705 return ERROR_OK;
706 }
707
708 static int jtag_send_sequence(struct adiv5_dap *dap, enum swd_special_seq seq)
709 {
710 int retval;
711
712 switch (seq) {
713 case JTAG_TO_SWD:
714 retval = jtag_add_tms_seq(swd_seq_jtag_to_swd_len,
715 swd_seq_jtag_to_swd, TAP_INVALID);
716 break;
717 case SWD_TO_JTAG:
718 retval = jtag_add_tms_seq(swd_seq_swd_to_jtag_len,
719 swd_seq_swd_to_jtag, TAP_RESET);
720 break;
721 default:
722 LOG_ERROR("Sequence %d not supported", seq);
723 return ERROR_FAIL;
724 }
725 if (retval == ERROR_OK)
726 retval = jtag_execute_queue();
727 return retval;
728 }
729
730 static int jtag_dp_q_read(struct adiv5_dap *dap, unsigned reg,
731 uint32_t *data)
732 {
733 int retval = jtag_limit_queue_size(dap);
734 if (retval != ERROR_OK)
735 return retval;
736
737 retval = adi_jtag_dp_scan_u32(dap, JTAG_DP_DPACC, reg,
738 DPAP_READ, 0, dap->last_read, 0, NULL);
739 dap->last_read = data;
740 return retval;
741 }
742
743 static int jtag_dp_q_write(struct adiv5_dap *dap, unsigned reg,
744 uint32_t data)
745 {
746 int retval = jtag_limit_queue_size(dap);
747 if (retval != ERROR_OK)
748 return retval;
749
750 retval = adi_jtag_dp_scan_u32(dap, JTAG_DP_DPACC,
751 reg, DPAP_WRITE, data, dap->last_read, 0, NULL);
752 dap->last_read = NULL;
753 return retval;
754 }
755
756 /** Select the AP register bank matching bits 7:4 of reg. */
757 static int jtag_ap_q_bankselect(struct adiv5_ap *ap, unsigned reg)
758 {
759 int retval;
760 struct adiv5_dap *dap = ap->dap;
761 uint64_t sel;
762
763 if (is_adiv6(dap)) {
764 sel = ap->ap_num | (reg & 0x00000FF0);
765 if (sel == (dap->select & ~0xfull))
766 return ERROR_OK;
767
768 if (dap->select != DP_SELECT_INVALID)
769 sel |= dap->select & 0xf;
770 dap->select = sel;
771 LOG_DEBUG("AP BANKSEL: %" PRIx64, sel);
772
773 retval = jtag_dp_q_write(dap, DP_SELECT, (uint32_t)sel);
774 if (retval != ERROR_OK)
775 return retval;
776
777 if (dap->asize > 32)
778 return jtag_dp_q_write(dap, DP_SELECT1, (uint32_t)(sel >> 32));
779 return ERROR_OK;
780 }
781
782 /* ADIv5 */
783 sel = (ap->ap_num << 24) | (reg & 0x000000F0);
784
785 if (sel == dap->select)
786 return ERROR_OK;
787
788 dap->select = sel;
789
790 return jtag_dp_q_write(dap, DP_SELECT, (uint32_t)sel);
791 }
792
793 static int jtag_ap_q_read(struct adiv5_ap *ap, unsigned reg,
794 uint32_t *data)
795 {
796 int retval = jtag_limit_queue_size(ap->dap);
797 if (retval != ERROR_OK)
798 return retval;
799
800 retval = jtag_check_reconnect(ap->dap);
801 if (retval != ERROR_OK)
802 return retval;
803
804 retval = jtag_ap_q_bankselect(ap, reg);
805 if (retval != ERROR_OK)
806 return retval;
807
808 retval = adi_jtag_dp_scan_u32(ap->dap, JTAG_DP_APACC, reg,
809 DPAP_READ, 0, ap->dap->last_read, ap->memaccess_tck, NULL);
810 ap->dap->last_read = data;
811
812 return retval;
813 }
814
815 static int jtag_ap_q_write(struct adiv5_ap *ap, unsigned reg,
816 uint32_t data)
817 {
818 int retval = jtag_limit_queue_size(ap->dap);
819 if (retval != ERROR_OK)
820 return retval;
821
822 retval = jtag_check_reconnect(ap->dap);
823 if (retval != ERROR_OK)
824 return retval;
825
826 retval = jtag_ap_q_bankselect(ap, reg);
827 if (retval != ERROR_OK)
828 return retval;
829
830 retval = adi_jtag_dp_scan_u32(ap->dap, JTAG_DP_APACC, reg,
831 DPAP_WRITE, data, ap->dap->last_read, ap->memaccess_tck, NULL);
832 ap->dap->last_read = NULL;
833 return retval;
834 }
835
836 static int jtag_ap_q_abort(struct adiv5_dap *dap, uint8_t *ack)
837 {
838 /* for JTAG, this is the only valid ABORT register operation */
839 int retval = adi_jtag_dp_scan_u32(dap, JTAG_DP_ABORT,
840 0, DPAP_WRITE, 1, NULL, 0, NULL);
841 if (retval != ERROR_OK)
842 return retval;
843
844 return jtag_execute_queue();
845 }
846
847 static int jtag_dp_run(struct adiv5_dap *dap)
848 {
849 int retval;
850 int retval2 = ERROR_OK;
851
852 retval = adi_jtag_finish_read(dap);
853 if (retval != ERROR_OK)
854 goto done;
855 retval2 = jtagdp_overrun_check(dap);
856 retval = jtagdp_transaction_endcheck(dap);
857
858 done:
859 return (retval2 != ERROR_OK) ? retval2 : retval;
860 }
861
862 static int jtag_dp_sync(struct adiv5_dap *dap)
863 {
864 return jtagdp_overrun_check(dap);
865 }
866
867 /* FIXME don't export ... just initialize as
868 * part of DAP setup
869 */
870 const struct dap_ops jtag_dp_ops = {
871 .connect = jtag_connect,
872 .send_sequence = jtag_send_sequence,
873 .queue_dp_read = jtag_dp_q_read,
874 .queue_dp_write = jtag_dp_q_write,
875 .queue_ap_read = jtag_ap_q_read,
876 .queue_ap_write = jtag_ap_q_write,
877 .queue_ap_abort = jtag_ap_q_abort,
878 .run = jtag_dp_run,
879 .sync = jtag_dp_sync,
880 .quit = jtag_quit,
881 };
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