1 # script for Nuvoton MuMicro Cortex-M0 Series
3 # Adapt based on what transport is active.
4 source [find target/swj-dp.tcl]
7 if { [info exists CHIPNAME] } {
8 set _CHIPNAME $CHIPNAME
13 # SWD DP-ID Nuvoton NuMicro Cortex-M0 has SWD Transport only.
14 if { [info exists CPUDAPID] } {
15 set _CPUDAPID $CPUDAPID
17 set _CPUDAPID 0x0BB11477
20 # Work-area is a space in RAM used for flash programming
22 if { [info exists WORKAREASIZE] } {
23 set _WORKAREASIZE $WORKAREASIZE
25 set _WORKAREASIZE 0x800
29 # Debug Adapter Target Settings
30 swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUDAPID
31 dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
32 set _TARGETNAME $_CHIPNAME.cpu
33 target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap
35 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
37 # flash bank <name> numicro <base> <size(autodetect,set to 0)> 0 0 <target#>
38 #set _FLASHNAME $_CHIPNAME.flash
39 #flash bank $_FLASHNAME numicro 0 $_FLASHSIZE 0 0 $_TARGETNAME
40 # flash size will be probed
41 set _FLASHNAME $_CHIPNAME.flash_aprom
42 flash bank $_FLASHNAME numicro 0x00000000 0 0 0 $_TARGETNAME
43 set _FLASHNAME $_CHIPNAME.flash_data
44 flash bank $_FLASHNAME numicro 0x0001F000 0 0 0 $_TARGETNAME
45 set _FLASHNAME $_CHIPNAME.flash_ldrom
46 flash bank $_FLASHNAME numicro 0x00100000 0 0 0 $_TARGETNAME
47 set _FLASHNAME $_CHIPNAME.flash_config
48 flash bank $_FLASHNAME numicro 0x00300000 0 0 0 $_TARGETNAME
50 # set default SWCLK frequency
53 # set default srst setting "none"
56 # HLA doesn't have cortex_m commands
58 # if srst is not fitted use SYSRESETREQ to
59 # perform a soft reset
60 cortex_m reset_config sysresetreq