1 # Hisilicon Hi6220 Target
3 if { [info exists CHIPNAME] } {
4 set _CHIPNAME $CHIPNAME
12 if { [info exists DAP_TAPID] } {
13 set _DAP_TAPID $DAP_TAPID
15 set _DAP_TAPID 0x4ba00477
18 # declare the one JTAG tap to access the DAP
19 jtag newtap $_CHIPNAME tap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID -ignore-version
22 dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.tap
24 # declare the 8 main application cores
25 set _TARGETNAME $_CHIPNAME.cpu
28 set $_TARGETNAME.cti(0) 0x80198000
29 set $_TARGETNAME.cti(1) 0x80199000
30 set $_TARGETNAME.cti(2) 0x8019A000
31 set $_TARGETNAME.cti(3) 0x8019B000
32 set $_TARGETNAME.cti(4) 0x801D8000
33 set $_TARGETNAME.cti(5) 0x801D9000
34 set $_TARGETNAME.cti(6) 0x801DA000
35 set $_TARGETNAME.cti(7) 0x801DB000
38 for { set _core 0 } { $_core < $_cores } { incr _core 1 } {
40 cti create cti$_core -dap $_CHIPNAME.dap -baseaddr [set $_TARGETNAME.cti($_core)] -ap-num 0
42 set _command "target create ${_TARGETNAME}$_core aarch64 \
43 -dap $_CHIPNAME.dap -coreid $_core -cti cti$_core"
46 # non-boot core examination may fail
47 set _command "$_command -defer-examine"
48 set _smp_command "$_smp_command ${_TARGETNAME}$_core"
50 # uncomment when "hawt" rtos is merged
51 # set _command "$_command -rtos hawt"
52 set _smp_command "target smp ${_TARGETNAME}$_core"
60 cti create cti.sys -dap $_CHIPNAME.dap -ap-num 0 -baseaddr 0x80003000
62 # declare the auxiliary Cortex-M3 core on AP #2 (runs mcuimage.bin)
63 target create ${_TARGETNAME}.m3 cortex_m -dap $_CHIPNAME.dap -ap-num 2 -defer-examine
65 # declare the auxiliary Cortex-A7 core
66 target create ${_TARGETNAME}.a7 cortex_a -dap $_CHIPNAME.dap -dbgbase 0x80210000 -defer-examine