1 # SPDX-License-Identifier: GPL-2.0-or-later
3 source [find target/at91sam7a2.cfg]
5 # delays needed to get stable reads of cpu state
9 # board uses pullup and connects only srst
10 reset_config srst_open_drain
12 # srst is connected to NRESET of CPU and fully resets everything...
13 reset_config srst_only srst_pulls_trst
16 $_TARGETNAME configure -event reset-start {
20 $_TARGETNAME configure -event reset-init {
21 # init script from http://www.mikrocontroller.net/topic/107462
23 # AMC (advanced memory controller)
26 # AMC_CS0 - FLASH 1MB (0x40000000-0x400FFFFF) + DM9000E (0x40100000)
27 mww 0xFFE00000 0x40003EBD
29 # AMC_CS1 - RAM low 2MB (0x40400000-0x405FFFFF)
30 mww 0xFFE00004 0x404030A9
32 # AMC_CS2 - RAM high 2MB (0x40800000-0x405FFFFF)
33 #mww 0xFFE00008 0x404030A9
35 mww 0xFFE00008 0x408030A9
38 mww 0xFFE00024 0x00000004
41 mww 0xFFE00020 0x00000001
46 # the following base addresses from the original script did not correspond to those from datasheet
47 # changed bases from 0xFF000000 to 0xFFF00000
49 # disable watchdog, to prevent unwanted resets
50 mww 0xFFFA0068 0x00000000
51 echo "disabled watchdog"
56 mww 0xFFFEC004 0x18070004
58 # PLL = 10 ==> Coreclock = 6Mhz*10/2 = 30 Mhz
59 mww 0xFFFEC010 0x762D800A
62 mww 0xFFFEC000 0x23050004
69 $_TARGETNAME arm7_9 dcc_downloads enable
70 $_TARGETNAME arm7_9 fast_memory_access enable
72 # remap: ram at 0, flash at 0x40000000, like reset-init above does
73 $_TARGETNAME configure -work-area-phys 0x00000000 -work-area-size 0x4000 -work-area-backup 1
74 flash bank onboard.flash cfi 0x40000000 0x00100000 2 2 at91sam7a2.cpu
76 # boot: ram at 0x300000, flash at 0x0, useful if board is in funny configuration
77 #$_TARGETNAME configure -work-area-phys 0x00300000 -work-area-size 0x4000 -work-area-backup 1
78 #flash bank onboard1.flash cfi 0x00000000 0x00100000 2 2 at91sam7a2.cpu