1 // SPDX-License-Identifier: GPL-2.0-or-later
3 /***************************************************************************
4 * Copyright (C) 2022 by Daniel Anselmi *
6 ***************************************************************************/
14 #include "lattice_cmd.h"
16 #define LSC_ENABLE_X 0x74
17 #define LSC_REFRESH 0x79
18 #define LSC_DEVICE_CTRL 0x7D
20 int lattice_certus_read_status(struct jtag_tap
*tap
, uint64_t *status
, uint64_t out
)
22 return lattice_read_u64_register(tap
, LSC_READ_STATUS
, status
, out
);
25 int lattice_certus_read_usercode(struct jtag_tap
*tap
, uint32_t *usercode
, uint32_t out
)
27 return lattice_read_u32_register(tap
, READ_USERCODE
, usercode
, out
, false);
30 int lattice_certus_write_usercode(struct lattice_pld_device
*lattice_device
, uint32_t usercode
)
32 LOG_ERROR("Not supported to write usercode on certus devices");
36 static int lattice_certus_enable_transparent_mode(struct jtag_tap
*tap
)
38 struct scan_field field
;
40 int retval
= lattice_set_instr(tap
, LSC_ENABLE_X
, TAP_IDLE
);
41 if (retval
!= ERROR_OK
)
46 field
.out_value
= &buffer
;
47 field
.in_value
= NULL
;
48 jtag_add_dr_scan(tap
, 1, &field
, TAP_IDLE
);
49 jtag_add_runtest(2, TAP_IDLE
);
51 return jtag_execute_queue();
54 static int lattice_certus_erase_device(struct lattice_pld_device
*lattice_device
)
56 struct jtag_tap
*tap
= lattice_device
->tap
;
60 int retval
= lattice_set_instr(tap
, LSC_DEVICE_CTRL
, TAP_IRPAUSE
);
61 if (retval
!= ERROR_OK
)
64 struct scan_field field
;
67 field
.out_value
= &buffer
;
68 field
.in_value
= NULL
;
69 jtag_add_dr_scan(tap
, 1, &field
, TAP_IDLE
);
70 jtag_add_runtest(2, TAP_IDLE
);
71 retval
= jtag_execute_queue();
72 if (retval
!= ERROR_OK
)
75 retval
= lattice_set_instr(tap
, LSC_DEVICE_CTRL
, TAP_IDLE
);
76 if (retval
!= ERROR_OK
)
80 field
.out_value
= &buffer
;
81 jtag_add_dr_scan(tap
, 1, &field
, TAP_IDLE
);
82 jtag_add_runtest(2, TAP_IDLE
);
83 retval
= jtag_execute_queue();
84 if (retval
!= ERROR_OK
)
87 retval
= lattice_set_instr(tap
, ISC_ERASE
, TAP_IDLE
);
88 if (retval
!= ERROR_OK
)
92 field
.out_value
= &buffer
;
93 jtag_add_dr_scan(tap
, 1, &field
, TAP_IDLE
);
94 jtag_add_runtest(100, TAP_IDLE
);
96 retval
= jtag_execute_queue();
97 if (retval
!= ERROR_OK
)
100 /* check done is cleared and fail is cleared */
101 const uint64_t status_done_flag
= 0x100;
102 const uint64_t status_fail_flag
= 0x2000;
103 return lattice_verify_status_register_u64(lattice_device
, 0x0, 0x0, status_done_flag
| status_fail_flag
);
106 static int lattice_certus_enable_programming(struct jtag_tap
*tap
)
108 struct scan_field field
;
110 int retval
= lattice_set_instr(tap
, LSC_REFRESH
, TAP_IDLE
);
111 if (retval
!= ERROR_OK
)
113 jtag_add_runtest(2, TAP_IDLE
);
114 retval
= jtag_execute_queue();
115 if (retval
!= ERROR_OK
)
118 retval
= lattice_set_instr(tap
, ISC_ENABLE
, TAP_IDLE
);
119 if (retval
!= ERROR_OK
)
123 field
.out_value
= &buffer
;
124 jtag_add_dr_scan(tap
, 1, &field
, TAP_IDLE
);
125 jtag_add_runtest(2, TAP_IDLE
);
126 return jtag_execute_queue();
129 static int lattice_certus_init_address(struct jtag_tap
*tap
)
131 int retval
= lattice_set_instr(tap
, LSC_INIT_ADDRESS
, TAP_IDLE
);
132 if (retval
!= ERROR_OK
)
134 jtag_add_runtest(2, TAP_IDLE
);
135 return jtag_execute_queue();
138 static int lattice_certus_exit_programming_mode(struct jtag_tap
*tap
)
140 int retval
= lattice_set_instr(tap
, ISC_DISABLE
, TAP_IDLE
);
141 if (retval
!= ERROR_OK
)
143 jtag_add_runtest(2, TAP_IDLE
);
144 retval
= lattice_set_instr(tap
, BYPASS
, TAP_IDLE
);
145 if (retval
!= ERROR_OK
)
147 jtag_add_runtest(100, TAP_IDLE
);
148 return jtag_execute_queue();
151 static int lattice_certus_program_config_map(struct jtag_tap
*tap
, struct lattice_bit_file
*bit_file
)
153 struct scan_field field
;
155 int retval
= lattice_set_instr(tap
, LSC_BITSTREAM_BURST
, TAP_IDLE
);
156 if (retval
!= ERROR_OK
)
159 field
.num_bits
= (bit_file
->raw_bit
.length
- bit_file
->offset
) * 8;
160 field
.out_value
= bit_file
->raw_bit
.data
+ bit_file
->offset
;
161 field
.in_value
= NULL
;
162 jtag_add_dr_scan(tap
, 1, &field
, TAP_IDLE
);
164 return jtag_execute_queue();
167 int lattice_certus_load(struct lattice_pld_device
*lattice_device
, struct lattice_bit_file
*bit_file
)
169 struct jtag_tap
*tap
= lattice_device
->tap
;
173 int retval
= lattice_preload(lattice_device
);
174 if (retval
!= ERROR_OK
)
177 /* check password protection is disabled */
178 const uint64_t status_pwd_protection
= 0x20000;
179 retval
= lattice_verify_status_register_u64(lattice_device
, 0x0, 0x0, status_pwd_protection
);
180 if (retval
!= ERROR_OK
) {
181 LOG_ERROR("Password protection is set");
185 retval
= lattice_certus_enable_transparent_mode(tap
);
186 if (retval
!= ERROR_OK
)
189 /* Check the SRAM Erase Lock */
190 const uint64_t status_otp
= 0x40;
191 retval
= lattice_verify_status_register_u64(lattice_device
, 0x0, status_otp
, status_otp
);
192 if (retval
!= ERROR_OK
) {
193 LOG_ERROR("NV User Feature Sector OTP is Set");
197 /* Check the SRAM Lock */
198 const uint64_t status_write_protected
= 0x400;
199 retval
= lattice_verify_status_register_u64(lattice_device
, 0x0, 0x0, status_write_protected
);
200 if (retval
!= ERROR_OK
) {
201 LOG_ERROR("NV User Feature Sector OTP is Set");
205 retval
= lattice_certus_enable_programming(tap
);
206 if (retval
!= ERROR_OK
) {
207 LOG_ERROR("failed to enable programming mode");
211 retval
= lattice_certus_erase_device(lattice_device
);
212 if (retval
!= ERROR_OK
) {
213 LOG_ERROR("erasing device failed");
217 retval
= lattice_certus_init_address(tap
);
218 if (retval
!= ERROR_OK
)
221 retval
= lattice_certus_program_config_map(tap
, bit_file
);
222 if (retval
!= ERROR_OK
)
224 const uint32_t expected
= 0x100; // done
225 const uint32_t mask
= expected
|
226 0x3000 | // Busy Flag and Fail Flag
227 0xf000000; // BSE Error
228 retval
= lattice_verify_status_register_u64(lattice_device
, 0x0, 0x100, mask
);
229 if (retval
!= ERROR_OK
)
232 return lattice_certus_exit_programming_mode(tap
);