1 # SPDX-License-Identifier: GPL-2.0-or-later
4 # script for Atmel SAMD, SAMR, SAML or SAMC, a Cortex-M0 chip
8 # samdXX devices only support SWD transports.
10 source [find target/swj-dp.tcl]
12 if { [info exists CHIPNAME] } {
13 set _CHIPNAME $CHIPNAME
15 set _CHIPNAME at91samd
18 if { [info exists ENDIAN] } {
24 # Work-area is a space in RAM used for flash programming
26 if { [info exists WORKAREASIZE] } {
27 set _WORKAREASIZE $WORKAREASIZE
29 set _WORKAREASIZE 0x800
32 if { [info exists CPUTAPID] } {
33 set _CPUTAPID $CPUTAPID
35 set _CPUTAPID 0x4ba00477
38 swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
39 dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
41 set _TARGETNAME $_CHIPNAME.cpu
42 target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap
44 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
46 # SAMD DSU will hold the CPU in reset if TCK is low when RESET_N
47 # deasserts (see datasheet Atmel-42181E–SAM-D21_Datasheet–02/2015, section 12.6.2)
49 # dsu_reset_deassert configures whether we want to run or halt out of reset,
50 # then instruct the DSU to let us out of reset.
51 $_TARGETNAME configure -event reset-deassert-post {
52 at91samd dsu_reset_deassert
55 # SRST (wired to RESET_N) resets debug circuitry
56 # srst_pulls_trst is not configured here to avoid an error raised in reset halt
57 reset_config srst_gates_jtag
59 # Do not use a reset button with other SWD adapter than Atmel's EDBG.
60 # DSU usually locks MCU in reset state until you issue a reset command
63 # SAMD runs at SYSCLK = 1 MHz divided from RC oscillator after reset.
64 # Other members of family usually use SYSCLK = 4 MHz after reset.
65 # Datasheet does not specify SYSCLK to SWD clock ratio.
66 # Usually used SYSCLK/6 is slow, testing shows that debugging can
67 # work @ SYSCLK/2 but your mileage may vary.
68 # This limit is most probably imposed by incorrectly handled SWD WAIT
69 # on some SWD adapters.
73 # Atmel's EDBG (on-board cmsis-dap adapter of Xplained kits) works
74 # without problem at maximal clock speed. Atmel recommends
75 # adapter speed less than 10 * CPU clock.
79 # if srst is not fitted use SYSRESETREQ to
80 # perform a soft reset
81 cortex_m reset_config sysresetreq
84 set _FLASHNAME $_CHIPNAME.flash
85 flash bank $_FLASHNAME at91samd 0x00000000 0 1 1 $_TARGETNAME