- Replace 'while(' with 'while ('.
[openocd.git] / src / flash / stm32x.h
blob1b4c2d7d6c1c63d776e8aa1eaaffde04ed13b18a
1 /***************************************************************************
2 * Copyright (C) 2005 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
4 * *
5 * Copyright (C) 2008 by Spencer Oliver *
6 * spen@spen-soft.co.uk *
7 * *
8 * This program is free software; you can redistribute it and/or modify *
9 * it under the terms of the GNU General Public License as published by *
10 * the Free Software Foundation; either version 2 of the License, or *
11 * (at your option) any later version. *
12 * *
13 * This program is distributed in the hope that it will be useful, *
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
16 * GNU General Public License for more details. *
17 * *
18 * You should have received a copy of the GNU General Public License *
19 * along with this program; if not, write to the *
20 * Free Software Foundation, Inc., *
21 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
22 ***************************************************************************/
23 #ifndef STM32X_H
24 #define STM32X_H
26 #include "flash.h"
28 typedef struct stm32x_options_s
30 uint16_t RDP;
31 uint16_t user_options;
32 uint16_t protection[4];
33 } stm32x_options_t;
35 typedef struct stm32x_flash_bank_s
37 stm32x_options_t option_bytes;
38 working_area_t *write_algorithm;
39 int ppage_size;
40 int probed;
41 } stm32x_flash_bank_t;
43 /* stm32x register locations */
45 #define STM32_FLASH_ACR 0x40022000
46 #define STM32_FLASH_KEYR 0x40022004
47 #define STM32_FLASH_OPTKEYR 0x40022008
48 #define STM32_FLASH_SR 0x4002200C
49 #define STM32_FLASH_CR 0x40022010
50 #define STM32_FLASH_AR 0x40022014
51 #define STM32_FLASH_OBR 0x4002201C
52 #define STM32_FLASH_WRPR 0x40022020
54 /* option byte location */
56 #define STM32_OB_RDP 0x1FFFF800
57 #define STM32_OB_USER 0x1FFFF802
58 #define STM32_OB_DATA0 0x1FFFF804
59 #define STM32_OB_DATA1 0x1FFFF806
60 #define STM32_OB_WRP0 0x1FFFF808
61 #define STM32_OB_WRP1 0x1FFFF80A
62 #define STM32_OB_WRP2 0x1FFFF80C
63 #define STM32_OB_WRP3 0x1FFFF80E
65 /* FLASH_CR register bits */
67 #define FLASH_PG (1<<0)
68 #define FLASH_PER (1<<1)
69 #define FLASH_MER (1<<2)
70 #define FLASH_OPTPG (1<<4)
71 #define FLASH_OPTER (1<<5)
72 #define FLASH_STRT (1<<6)
73 #define FLASH_LOCK (1<<7)
74 #define FLASH_OPTWRE (1<<9)
76 /* FLASH_SR register bits */
78 #define FLASH_BSY (1<<0)
79 #define FLASH_PGERR (1<<2)
80 #define FLASH_WRPRTERR (1<<4)
81 #define FLASH_EOP (1<<5)
83 /* STM32_FLASH_OBR bit definitions (reading) */
85 #define OPT_ERROR 0
86 #define OPT_READOUT 1
87 #define OPT_RDWDGSW 2
88 #define OPT_RDRSTSTOP 3
89 #define OPT_RDRSTSTDBY 4
91 /* register unlock keys */
93 #define KEY1 0x45670123
94 #define KEY2 0xCDEF89AB
96 typedef struct stm32x_mem_layout_s {
97 uint32_t sector_start;
98 uint32_t sector_size;
99 } stm32x_mem_layout_t;
101 #endif /* STM32X_H */