1 # SPDX-License-Identifier: GPL-2.0-or-later
4 # TI Calypso (lite) G2 C035 Digital Base Band chip
6 # ARM7TDMIE + DSP subchip (S28C128)
9 # 256K SRAM Calypso lite
11 if { [info exists CHIPNAME] } {
12 set _CHIPNAME $CHIPNAME
17 if { [info exists ENDIAN] } {
23 if { [info exists CPUTAPID] } {
24 set _CPUTAPID $CPUTAPID
26 set _CPUTAPID 0x3100e02f
29 # Work-area is a space in RAM used for flash programming
31 if { [info exists WORKAREASIZE] } {
32 set _WORKAREASIZE $WORKAREASIZE
34 set _WORKAREASIZE 0x10000
39 reset_config trst_and_srst
41 jtag newtap $_CHIPNAME dsp -expected-id 0x00000000 -irlen 8
42 jtag newtap $_CHIPNAME arm -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
46 set _TARGETNAME $_CHIPNAME.arm
47 target create $_TARGETNAME arm7tdmi -endian little -chain-position $_TARGETNAME
51 $_TARGETNAME configure -work-area-phys 0x00800000 -work-area-size $_WORKAREASIZE -work-area-backup 1
53 arm7_9 dcc_downloads enable
54 arm7_9 fast_memory_access enable
56 $_TARGETNAME configure -event examine-start {
57 irscan calypso.arm 0x0b -endstate DRPAUSE
58 drscan calypso.arm 2 2 -endstate RUN/IDLE