1 # SPDX-License-Identifier: GPL-2.0-or-later
5 if { [info exists CHIPNAME] } {
6 set _CHIPNAME $CHIPNAME
11 if { [info exists ENDIAN] } {
14 # this defaults to a bigendian
18 if { [info exists CPUTAPID] } {
19 set _CPUTAPID $CPUTAPID
21 set _CPUTAPID 0x19274013
23 set _CPUTAPID2 0x19275013
24 set _CPUTAPID3 0x19277013
25 set _CPUTAPID4 0x29274013
26 set _CPUTAPID5 0x29275013
27 set _CPUTAPID6 0x29277013
29 jtag newtap $_CHIPNAME cpu -irlen 7 -ircapture 0x1 -irmask 0x7f -expected-id $_CPUTAPID -expected-id $_CPUTAPID2 -expected-id $_CPUTAPID3 -expected-id $_CPUTAPID4 -expected-id $_CPUTAPID5 -expected-id $_CPUTAPID6
31 set _TARGETNAME $_CHIPNAME.cpu
32 target create $_TARGETNAME xscale -endian $_ENDIAN -chain-position $_TARGETNAME
35 # register constants for IXP42x SDRAM controller
36 global IXP425_SDRAM_IR_MODE_SET_CAS2_CMD
37 global IXP425_SDRAM_IR_MODE_SET_CAS3_CMD
38 set IXP425_SDRAM_IR_MODE_SET_CAS2_CMD 0x0000
39 set IXP425_SDRAM_IR_MODE_SET_CAS3_CMD 0x0001
41 global IXP42x_SDRAM_CL3
42 global IXP42x_SDRAM_CL2
43 set IXP42x_SDRAM_CL3 0x0008
44 set IXP42x_SDRAM_CL2 0x0000
46 global IXP42x_SDRAM_8MB_2Mx32_1BANK
47 global IXP42x_SDRAM_16MB_2Mx32_2BANK
48 global IXP42x_SDRAM_16MB_4Mx16_1BANK
49 global IXP42x_SDRAM_32MB_4Mx16_2BANK
50 global IXP42x_SDRAM_32MB_8Mx16_1BANK
51 global IXP42x_SDRAM_64MB_8Mx16_2BANK
52 global IXP42x_SDRAM_64MB_16Mx16_1BANK
53 global IXP42x_SDRAM_128MB_16Mx16_2BANK
54 global IXP42x_SDRAM_128MB_32Mx16_1BANK
55 global IXP42x_SDRAM_256MB_32Mx16_2BANK
57 set IXP42x_SDRAM_8MB_2Mx32_1BANK 0x0030
58 set IXP42x_SDRAM_16MB_2Mx32_2BANK 0x0031
59 set IXP42x_SDRAM_16MB_4Mx16_1BANK 0x0032
60 set IXP42x_SDRAM_32MB_4Mx16_2BANK 0x0033
61 set IXP42x_SDRAM_32MB_8Mx16_1BANK 0x0010
62 set IXP42x_SDRAM_64MB_8Mx16_2BANK 0x0011
63 set IXP42x_SDRAM_64MB_16Mx16_1BANK 0x0012
64 set IXP42x_SDRAM_128MB_16Mx16_2BANK 0x0013
65 set IXP42x_SDRAM_128MB_32Mx16_1BANK 0x0014
66 set IXP42x_SDRAM_256MB_32Mx16_2BANK 0x0015
69 # helper function to init SDRAM on IXP42x.
70 # SDRAM_CFG: one of IXP42X_SDRAM_xxx
71 # REFRESH: refresh counter reload value (integer)
73 proc ixp42x_init_sdram { SDRAM_CFG REFRESH CASLAT } {
77 set SDRAM_CFG [expr {$SDRAM_CFG | $::IXP42x_SDRAM_CL2} ]
78 set CASCMD $::IXP425_SDRAM_IR_MODE_SET_CAS2_CMD
81 set SDRAM_CFG [expr {$SDRAM_CFG | $::IXP42x_SDRAM_CL3} ]
82 set CASCMD $::IXP425_SDRAM_IR_MODE_SET_CAS3_CMD
84 default { error [format "unsupported cas latency \"%s\" " $CASLAT] }
86 echo [format "\tIXP42x SDRAM Config: 0x%x, Refresh %d " $SDRAM_CFG $REFRESH]
88 mww 0xCC000000 $SDRAM_CFG ;# SDRAM_CFG: 0x2A: 64MBit, CL3
89 mww 0xCC000004 0 ;# disable refresh
90 mww 0xCC000008 3 ;# NOP
92 mww 0xCC000004 $REFRESH ;# set refresh counter
93 mww 0xCC000008 2 ;# Precharge All Banks
95 mww 0xCC000008 4 ;# Auto Refresh
96 mww 0xCC000008 4 ;# Auto Refresh
97 mww 0xCC000008 4 ;# Auto Refresh
98 mww 0xCC000008 4 ;# Auto Refresh
99 mww 0xCC000008 4 ;# Auto Refresh
100 mww 0xCC000008 4 ;# Auto Refresh
101 mww 0xCC000008 4 ;# Auto Refresh
102 mww 0xCC000008 4 ;# Auto Refresh
103 mww 0xCC000008 $CASCMD ;# Mode Select CL2/CL3
106 proc ixp42x_set_bigendian { } {