2 # TI Calypso (lite) G2 C035 Digital Base Band chip
4 # ARM7TDMIE + DSP subchip (S28C128)
7 # 256K SRAM Calypso lite
9 if { [info exists CHIPNAME] } {
10 set _CHIPNAME $CHIPNAME
15 if { [info exists ENDIAN] } {
21 if { [info exists CPUTAPID] } {
22 set _CPUTAPID $CPUTAPID
24 set _CPUTAPID 0x3100e02f
27 # Work-area is a space in RAM used for flash programming
29 if { [info exists WORKAREASIZE] } {
30 set _WORKAREASIZE $WORKAREASIZE
32 set _WORKAREASIZE 0x10000
37 reset_config trst_and_srst
39 jtag newtap $_CHIPNAME dsp -expected-id 0x00000000 -irlen 8
40 jtag newtap $_CHIPNAME arm -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
44 set _TARGETNAME $_CHIPNAME.arm
45 target create $_TARGETNAME arm7tdmi -endian little -chain-position $_TARGETNAME -variant calypso
49 $_TARGETNAME configure -work-area-phys 0x00800000 -work-area-size $_WORKAREASIZE -work-area-backup 1
51 arm7_9 dcc_downloads enable
52 arm7_9 fast_memory_access enable
54 $_TARGETNAME configure -event examine-start {
55 irscan calypso.arm 0x0b -endstate DRPAUSE
56 drscan calypso.arm 2 2 -endstate RUN/IDLE