kinetis : improve kinetis flash driver.
[openocd.git] / src / flash / nor / kinetis.c
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1 /***************************************************************************
2 * Copyright (C) 2011 by Mathias Kuester *
3 * kesmtp@freenet.de *
4 * *
5 * Copyright (C) 2011 sleep(5) ltd *
6 * tomas@sleepfive.com *
7 * *
8 * Copyright (C) 2012 by Christopher D. Kilgour *
9 * techie at whiterocker.com *
10 * *
11 * Copyright (C) 2013 Nemui Trinomius *
12 * nemuisan_kawausogasuki@live.jp *
13 * *
14 * This program is free software; you can redistribute it and/or modify *
15 * it under the terms of the GNU General Public License as published by *
16 * the Free Software Foundation; either version 2 of the License, or *
17 * (at your option) any later version. *
18 * *
19 * This program is distributed in the hope that it will be useful, *
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
22 * GNU General Public License for more details. *
23 * *
24 * You should have received a copy of the GNU General Public License *
25 * along with this program; if not, write to the *
26 * Free Software Foundation, Inc., *
27 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
28 ***************************************************************************/
30 #ifdef HAVE_CONFIG_H
31 #include "config.h"
32 #endif
34 #include "imp.h"
35 #include <helper/binarybuffer.h>
36 #include <target/algorithm.h>
37 #include <target/armv7m.h>
40 * Implementation Notes
42 * The persistent memories in the Kinetis chip families K10 through
43 * K70 are all manipulated with the Flash Memory Module. Some
44 * variants call this module the FTFE, others call it the FTFL. To
45 * indicate that both are considered here, we use FTFX.
47 * Within the module, according to the chip variant, the persistent
48 * memory is divided into what Freescale terms Program Flash, FlexNVM,
49 * and FlexRAM. All chip variants have Program Flash. Some chip
50 * variants also have FlexNVM and FlexRAM, which always appear
51 * together.
53 * A given Kinetis chip may have 2 or 4 blocks of flash. Here we map
54 * each block to a separate bank. Each block size varies by chip and
55 * may be determined by the read-only SIM_FCFG1 register. The sector
56 * size within each bank/block varies by the chip granularity as
57 * described below.
59 * Kinetis offers four different of flash granularities applicable
60 * across the chip families. The granularity is apparently reflected
61 * by at least the reference manual suffix. For example, for chip
62 * MK60FN1M0VLQ12, reference manual K60P144M150SF3RM ends in "SF3RM",
63 * where the "3" indicates there are four flash blocks with 4kiB
64 * sectors. All possible granularities are indicated below.
66 * The first half of the flash (1 or 2 blocks, depending on the
67 * granularity) is always Program Flash and always starts at address
68 * 0x00000000. The "PFLSH" flag, bit 23 of the read-only SIM_FCFG2
69 * register, determines whether the second half of the flash is also
70 * Program Flash or FlexNVM+FlexRAM. When PFLSH is set, the second
71 * half of flash is Program Flash and is contiguous in the memory map
72 * from the first half. When PFLSH is clear, the second half of flash
73 * is FlexNVM and always starts at address 0x10000000. FlexRAM, which
74 * is also present when PFLSH is clear, always starts at address
75 * 0x14000000.
77 * The Flash Memory Module provides a register set where flash
78 * commands are loaded to perform flash operations like erase and
79 * program. Different commands are available depending on whether
80 * Program Flash or FlexNVM/FlexRAM is being manipulated. Although
81 * the commands used are quite consistent between flash blocks, the
82 * parameters they accept differ according to the flash granularity.
83 * Some Kinetis chips have different granularity between Program Flash
84 * and FlexNVM/FlexRAM, so flash command arguments may differ between
85 * blocks in the same chip.
89 const struct {
90 unsigned pflash_sector_size_bytes;
91 unsigned nvm_sector_size_bytes;
92 unsigned num_blocks;
93 } kinetis_flash_params[4] = {
94 { 1<<10, 1<<10, 2 },
95 { 2<<10, 1<<10, 2 },
96 { 2<<10, 2<<10, 2 },
97 { 4<<10, 4<<10, 4 }
100 /* Addressess */
101 #define FLEXRAM 0x14000000
102 #define FTFx_FSTAT 0x40020000
103 #define FTFx_FCNFG 0x40020001
104 #define FTFx_FCCOB3 0x40020004
105 #define FTFx_FPROT3 0x40020010
106 #define SIM_SDID 0x40048024
107 #define SIM_FCFG1 0x4004804c
108 #define SIM_FCFG2 0x40048050
110 /* Commands */
111 #define FTFx_CMD_BLOCKSTAT 0x00
112 #define FTFx_CMD_SECTSTAT 0x01
113 #define FTFx_CMD_LWORDPROG 0x06
114 #define FTFx_CMD_SECTERASE 0x09
115 #define FTFx_CMD_SECTWRITE 0x0b
116 #define FTFx_CMD_SETFLEXRAM 0x81
117 #define FTFx_CMD_MASSERASE 0x44
119 /* The Kinetis K series uses the following SDID layout :
120 * Bit 31-16 : 0
121 * Bit 15-12 : REVID
122 * Bit 11-7 : DIEID
123 * Bit 6-4 : FAMID
124 * Bit 3-0 : PINID
126 * The Kinetis KL series uses the following SDID layout :
127 * Bit 31-28 : FAMID
128 * Bit 27-24 : SUBFAMID
129 * Bit 23-20 : SERIESID
130 * Bit 19-16 : SRAMSIZE
131 * Bit 15-12 : REVID
132 * Bit 6-4 : Reserved (0)
133 * Bit 3-0 : PINID
135 * SERIESID should be 1 for the KL-series so we assume that if
136 * bits 31-16 are 0 then it's a K-series MCU.
139 #define KINETIS_SDID_K_SERIES_MASK 0x0000FFFF
141 #define KINETIS_SDID_DIEID_MASK 0x00000F80
142 #define KINETIS_SDID_DIEID_K_A 0x00000100
143 #define KINETIS_SDID_DIEID_K_B 0x00000200
144 #define KINETIS_SDID_DIEID_KL 0x00000000
146 /* We can't rely solely on the FAMID field to determine the MCU
147 * type since some FAMID values identify multiple MCUs with
148 * different flash sector sizes (K20 and K22 for instance).
149 * Therefore we combine it with the DIEID bits which may possibly
150 * break if Freescale bumps the DIEID for a particular MCU. */
151 #define KINETIS_K_SDID_TYPE_MASK 0x00000FF0
152 #define KINETIS_K_SDID_K10_M50 0x00000000
153 #define KINETIS_K_SDID_K10_M72 0x00000080
154 #define KINETIS_K_SDID_K10_M100 0x00000100
155 #define KINETIS_K_SDID_K10_M120 0x00000180
156 #define KINETIS_K_SDID_K11 0x00000220
157 #define KINETIS_K_SDID_K12 0x00000200
158 #define KINETIS_K_SDID_K20_M50 0x00000010
159 #define KINETIS_K_SDID_K20_M72 0x00000090
160 #define KINETIS_K_SDID_K20_M100 0x00000110
161 #define KINETIS_K_SDID_K20_M120 0x00000190
162 #define KINETIS_K_SDID_K21_M50 0x00000230
163 #define KINETIS_K_SDID_K21_M120 0x00000330
164 #define KINETIS_K_SDID_K22_M50 0x00000210
165 #define KINETIS_K_SDID_K22_M120 0x00000310
166 #define KINETIS_K_SDID_K30_M72 0x000000A0
167 #define KINETIS_K_SDID_K30_M100 0x00000120
168 #define KINETIS_K_SDID_K40_M72 0x000000B0
169 #define KINETIS_K_SDID_K40_M100 0x00000130
170 #define KINETIS_K_SDID_K50_M72 0x000000E0
171 #define KINETIS_K_SDID_K51_M72 0x000000F0
172 #define KINETIS_K_SDID_K53 0x00000170
173 #define KINETIS_K_SDID_K60_M100 0x00000140
174 #define KINETIS_K_SDID_K60_M150 0x000001C0
175 #define KINETIS_K_SDID_K70_M150 0x000001D0
177 #define KINETIS_KL_SDID_SERIESID_MASK 0x00F00000
178 #define KINETIS_KL_SDID_SERIESID_KL 0x00100000
180 struct kinetis_flash_bank {
181 unsigned granularity;
182 unsigned bank_ordinal;
183 uint32_t sector_size;
184 uint32_t protection_size;
185 uint32_t klxx;
187 uint32_t sim_sdid;
188 uint32_t sim_fcfg1;
189 uint32_t sim_fcfg2;
191 enum {
192 FC_AUTO = 0,
193 FC_PFLASH,
194 FC_FLEX_NVM,
195 FC_FLEX_RAM,
196 } flash_class;
199 FLASH_BANK_COMMAND_HANDLER(kinetis_flash_bank_command)
201 struct kinetis_flash_bank *bank_info;
203 if (CMD_ARGC < 6)
204 return ERROR_COMMAND_SYNTAX_ERROR;
206 LOG_INFO("add flash_bank kinetis %s", bank->name);
208 bank_info = malloc(sizeof(struct kinetis_flash_bank));
210 memset(bank_info, 0, sizeof(struct kinetis_flash_bank));
212 bank->driver_priv = bank_info;
214 return ERROR_OK;
217 /* Kinetis Program-LongWord Microcodes */
218 static const uint8_t kinetis_flash_write_code[] = {
219 /* Params:
220 * r0 - workarea buffer
221 * r1 - target address
222 * r2 - wordcount
223 * Clobbered:
224 * r4 - tmp
225 * r5 - tmp
226 * r6 - tmp
227 * r7 - tmp
230 /* .L1: */
231 /* for(register uint32_t i=0;i<wcount;i++){ */
232 0x04, 0x1C, /* mov r4, r0 */
233 0x00, 0x23, /* mov r3, #0 */
234 /* .L2: */
235 0x0E, 0x1A, /* sub r6, r1, r0 */
236 0xA6, 0x19, /* add r6, r4, r6 */
237 0x93, 0x42, /* cmp r3, r2 */
238 0x16, 0xD0, /* beq .L9 */
239 /* .L5: */
240 /* while((FTFx_FSTAT&FTFA_FSTAT_CCIF_MASK) != FTFA_FSTAT_CCIF_MASK){}; */
241 0x0B, 0x4D, /* ldr r5, .L10 */
242 0x2F, 0x78, /* ldrb r7, [r5] */
243 0x7F, 0xB2, /* sxtb r7, r7 */
244 0x00, 0x2F, /* cmp r7, #0 */
245 0xFA, 0xDA, /* bge .L5 */
246 /* FTFx_FSTAT = FTFA_FSTAT_ACCERR_MASK|FTFA_FSTAT_FPVIOL_MASK|FTFA_FSTAT_RDCO */
247 0x70, 0x27, /* mov r7, #112 */
248 0x2F, 0x70, /* strb r7, [r5] */
249 /* FTFx_FCCOB3 = faddr; */
250 0x09, 0x4F, /* ldr r7, .L10+4 */
251 0x3E, 0x60, /* str r6, [r7] */
252 0x06, 0x27, /* mov r7, #6 */
253 /* FTFx_FCCOB0 = 0x06; */
254 0x08, 0x4E, /* ldr r6, .L10+8 */
255 0x37, 0x70, /* strb r7, [r6] */
256 /* FTFx_FCCOB7 = *pLW; */
257 0x80, 0xCC, /* ldmia r4!, {r7} */
258 0x08, 0x4E, /* ldr r6, .L10+12 */
259 0x37, 0x60, /* str r7, [r6] */
260 /* FTFx_FSTAT = FTFA_FSTAT_CCIF_MASK; */
261 0x80, 0x27, /* mov r7, #128 */
262 0x2F, 0x70, /* strb r7, [r5] */
263 /* .L4: */
264 /* while((FTFx_FSTAT&FTFA_FSTAT_CCIF_MASK) != FTFA_FSTAT_CCIF_MASK){}; */
265 0x2E, 0x78, /* ldrb r6, [r5] */
266 0x77, 0xB2, /* sxtb r7, r6 */
267 0x00, 0x2F, /* cmp r7, #0 */
268 0xFB, 0xDA, /* bge .L4 */
269 0x01, 0x33, /* add r3, r3, #1 */
270 0xE4, 0xE7, /* b .L2 */
271 /* .L9: */
272 0x00, 0xBE, /* bkpt #0 */
273 /* .L10: */
274 0x00, 0x00, 0x02, 0x40, /* .word 1073872896 */
275 0x04, 0x00, 0x02, 0x40, /* .word 1073872900 */
276 0x07, 0x00, 0x02, 0x40, /* .word 1073872903 */
277 0x08, 0x00, 0x02, 0x40, /* .word 1073872904 */
280 /* Program LongWord Block Write */
281 static int kinetis_write_block(struct flash_bank *bank, uint8_t *buffer,
282 uint32_t offset, uint32_t wcount)
284 struct target *target = bank->target;
285 uint32_t buffer_size = 2048; /* Default minimum value */
286 struct working_area *write_algorithm;
287 struct working_area *source;
288 uint32_t address = bank->base + offset;
289 struct reg_param reg_params[3];
290 struct armv7m_algorithm armv7m_info;
291 int retval = ERROR_OK;
293 /* Params:
294 * r0 - workarea buffer
295 * r1 - target address
296 * r2 - wordcount
297 * Clobbered:
298 * r4 - tmp
299 * r5 - tmp
300 * r6 - tmp
301 * r7 - tmp
304 /* Increase buffer_size if needed */
305 if (buffer_size < (target->working_area_size/2))
306 buffer_size = (target->working_area_size/2);
308 LOG_INFO("Kinetis: FLASH Write ...");
310 /* check code alignment */
311 if (offset & 0x1) {
312 LOG_WARNING("offset 0x%" PRIx32 " breaks required 2-byte alignment", offset);
313 return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
316 /* allocate working area with flash programming code */
317 if (target_alloc_working_area(target, sizeof(kinetis_flash_write_code),
318 &write_algorithm) != ERROR_OK) {
319 LOG_WARNING("no working area available, can't do block memory writes");
320 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
323 retval = target_write_buffer(target, write_algorithm->address,
324 sizeof(kinetis_flash_write_code), kinetis_flash_write_code);
325 if (retval != ERROR_OK)
326 return retval;
328 /* memory buffer */
329 while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK) {
330 buffer_size /= 4;
331 if (buffer_size <= 256) {
332 /* free working area, write algorithm already allocated */
333 target_free_working_area(target, write_algorithm);
335 LOG_WARNING("No large enough working area available, can't do block memory writes");
336 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
340 armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
341 armv7m_info.core_mode = ARM_MODE_THREAD;
343 init_reg_param(&reg_params[0], "r0", 32, PARAM_OUT); /* *pLW (*buffer) */
344 init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT); /* faddr */
345 init_reg_param(&reg_params[2], "r2", 32, PARAM_OUT); /* number of words to program */
347 /* write code buffer and use Flash programming code within kinetis */
348 /* Set breakpoint to 0 with time-out of 1000 ms */
349 while (wcount > 0) {
350 uint32_t thisrun_count = (wcount > (buffer_size / 4)) ? (buffer_size / 4) : wcount;
352 retval = target_write_buffer(target, source->address, thisrun_count * 4, buffer);
353 if (retval != ERROR_OK)
354 break;
356 buf_set_u32(reg_params[0].value, 0, 32, source->address);
357 buf_set_u32(reg_params[1].value, 0, 32, address);
358 buf_set_u32(reg_params[2].value, 0, 32, thisrun_count);
360 retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
361 write_algorithm->address, 0, 100000, &armv7m_info);
362 if (retval != ERROR_OK) {
363 LOG_ERROR("Error executing kinetis Flash programming algorithm");
364 retval = ERROR_FLASH_OPERATION_FAILED;
365 break;
368 buffer += thisrun_count * 4;
369 address += thisrun_count * 4;
370 wcount -= thisrun_count;
373 target_free_working_area(target, source);
374 target_free_working_area(target, write_algorithm);
376 destroy_reg_param(&reg_params[0]);
377 destroy_reg_param(&reg_params[1]);
378 destroy_reg_param(&reg_params[2]);
380 return retval;
383 static int kinetis_protect(struct flash_bank *bank, int set, int first, int last)
385 LOG_WARNING("kinetis_protect not supported yet");
386 /* FIXME: TODO */
388 if (bank->target->state != TARGET_HALTED) {
389 LOG_ERROR("Target not halted");
390 return ERROR_TARGET_NOT_HALTED;
393 return ERROR_FLASH_BANK_INVALID;
396 static int kinetis_protect_check(struct flash_bank *bank)
398 struct kinetis_flash_bank *kinfo = bank->driver_priv;
400 if (bank->target->state != TARGET_HALTED) {
401 LOG_ERROR("Target not halted");
402 return ERROR_TARGET_NOT_HALTED;
405 if (kinfo->flash_class == FC_PFLASH) {
406 int result;
407 uint8_t buffer[4];
408 uint32_t fprot, psec;
409 int i, b;
411 /* read protection register */
412 result = target_read_memory(bank->target, FTFx_FPROT3, 1, 4, buffer);
414 if (result != ERROR_OK)
415 return result;
417 fprot = target_buffer_get_u32(bank->target, buffer);
420 * Every bit protects 1/32 of the full flash (not necessarily
421 * just this bank), but we enforce the bank ordinals for
422 * PFlash to start at zero.
424 b = kinfo->bank_ordinal * (bank->size / kinfo->protection_size);
425 for (psec = 0, i = 0; i < bank->num_sectors; i++) {
426 if ((fprot >> b) & 1)
427 bank->sectors[i].is_protected = 0;
428 else
429 bank->sectors[i].is_protected = 1;
431 psec += bank->sectors[i].size;
433 if (psec >= kinfo->protection_size) {
434 psec = 0;
435 b++;
438 } else {
439 LOG_ERROR("Protection checks for FlexNVM not yet supported");
440 return ERROR_FLASH_BANK_INVALID;
443 return ERROR_OK;
446 static int kinetis_ftfx_command(struct flash_bank *bank, uint8_t fcmd, uint32_t faddr,
447 uint8_t fccob4, uint8_t fccob5, uint8_t fccob6, uint8_t fccob7,
448 uint8_t fccob8, uint8_t fccob9, uint8_t fccoba, uint8_t fccobb,
449 uint8_t *ftfx_fstat)
451 uint8_t command[12] = {faddr & 0xff, (faddr >> 8) & 0xff, (faddr >> 16) & 0xff, fcmd,
452 fccob7, fccob6, fccob5, fccob4,
453 fccobb, fccoba, fccob9, fccob8};
454 int result, i;
455 uint8_t buffer;
457 /* wait for done */
458 for (i = 0; i < 50; i++) {
459 result =
460 target_read_memory(bank->target, FTFx_FSTAT, 1, 1, &buffer);
462 if (result != ERROR_OK)
463 return result;
465 if (buffer & 0x80)
466 break;
468 buffer = 0x00;
471 if (buffer != 0x80) {
472 /* reset error flags */
473 buffer = 0x30;
474 result =
475 target_write_memory(bank->target, FTFx_FSTAT, 1, 1, &buffer);
476 if (result != ERROR_OK)
477 return result;
480 result = target_write_memory(bank->target, FTFx_FCCOB3, 4, 3, command);
482 if (result != ERROR_OK)
483 return result;
485 /* start command */
486 buffer = 0x80;
487 result = target_write_memory(bank->target, FTFx_FSTAT, 1, 1, &buffer);
488 if (result != ERROR_OK)
489 return result;
491 /* wait for done */
492 for (i = 0; i < 240; i++) { /* Need longtime for "Mass Erase" Command Nemui Changed */
493 result =
494 target_read_memory(bank->target, FTFx_FSTAT, 1, 1, ftfx_fstat);
496 if (result != ERROR_OK)
497 return result;
499 if (*ftfx_fstat & 0x80)
500 break;
503 if ((*ftfx_fstat & 0xf0) != 0x80) {
504 LOG_ERROR
505 ("ftfx command failed FSTAT: %02X FCCOB: %02X%02X%02X%02X %02X%02X%02X%02X %02X%02X%02X%02X",
506 *ftfx_fstat, command[3], command[2], command[1], command[0],
507 command[7], command[6], command[5], command[4],
508 command[11], command[10], command[9], command[8]);
509 return ERROR_FLASH_OPERATION_FAILED;
512 return ERROR_OK;
515 static int kinetis_mass_erase(struct flash_bank *bank)
517 int result;
518 uint8_t ftfx_fstat;
520 if (bank->target->state != TARGET_HALTED) {
521 LOG_ERROR("Target not halted");
522 return ERROR_TARGET_NOT_HALTED;
525 /* check if whole bank is blank */
526 LOG_INFO("Execute Erase All Blocks");
527 /* set command and sector address */
528 result = kinetis_ftfx_command(bank, FTFx_CMD_MASSERASE, 0,
529 0, 0, 0, 0, 0, 0, 0, 0, &ftfx_fstat);
530 /* Anyway Result, write FSEC to unsecure forcely */
531 /* if (result != ERROR_OK)
532 return result;*/
534 /* Write to MCU security status unsecure in Flash security byte(for Kinetis-L need) */
535 LOG_INFO("Write to MCU security status unsecure Anyway!");
536 uint8_t padding[4] = {0xFE, 0xFF, 0xFF, 0xFF}; /* Write 0xFFFFFFFE */
538 result = kinetis_ftfx_command(bank, FTFx_CMD_LWORDPROG, (bank->base + 0x0000040C),
539 padding[3], padding[2], padding[1], padding[0],
540 0, 0, 0, 0, &ftfx_fstat);
541 if (result != ERROR_OK)
542 return ERROR_FLASH_OPERATION_FAILED;
544 return ERROR_OK;
547 static int kinetis_erase(struct flash_bank *bank, int first, int last)
549 int result, i;
551 if (bank->target->state != TARGET_HALTED) {
552 LOG_ERROR("Target not halted");
553 return ERROR_TARGET_NOT_HALTED;
556 if ((first > bank->num_sectors) || (last > bank->num_sectors))
557 return ERROR_FLASH_OPERATION_FAILED;
559 if ((first == 0) && (last == (bank->num_sectors - 1)))
560 return kinetis_mass_erase(bank);
563 * FIXME: TODO: use the 'Erase Flash Block' command if the
564 * requested erase is PFlash or NVM and encompasses the entire
565 * block. Should be quicker.
567 for (i = first; i <= last; i++) {
568 uint8_t ftfx_fstat;
569 /* set command and sector address */
570 result = kinetis_ftfx_command(bank, FTFx_CMD_SECTERASE, bank->base + bank->sectors[i].offset,
571 0, 0, 0, 0, 0, 0, 0, 0, &ftfx_fstat);
573 if (result != ERROR_OK) {
574 LOG_WARNING("erase sector %d failed", i);
575 return ERROR_FLASH_OPERATION_FAILED;
578 bank->sectors[i].is_erased = 1;
581 if (first == 0) {
582 LOG_WARNING
583 ("flash configuration field erased, please reset the device");
586 return ERROR_OK;
589 static int kinetis_write(struct flash_bank *bank, uint8_t *buffer,
590 uint32_t offset, uint32_t count)
592 unsigned int i, result, fallback = 0;
593 uint8_t buf[8];
594 uint32_t wc;
595 struct kinetis_flash_bank *kinfo = bank->driver_priv;
596 uint8_t *new_buffer = NULL;
598 if (bank->target->state != TARGET_HALTED) {
599 LOG_ERROR("Target not halted");
600 return ERROR_TARGET_NOT_HALTED;
603 if (kinfo->klxx) {
604 /* fallback to longword write */
605 fallback = 1;
606 LOG_WARNING("Kinetis L Series supports Program Longword execution only.");
607 LOG_DEBUG("flash write into PFLASH @08%" PRIX32, offset);
609 } else if (kinfo->flash_class == FC_FLEX_NVM) {
610 uint8_t ftfx_fstat;
612 LOG_DEBUG("flash write into FlexNVM @%08" PRIX32, offset);
614 /* make flex ram available */
615 result = kinetis_ftfx_command(bank, FTFx_CMD_SETFLEXRAM, 0x00ff0000, 0, 0, 0, 0, 0, 0, 0, 0, &ftfx_fstat);
617 if (result != ERROR_OK)
618 return ERROR_FLASH_OPERATION_FAILED;
620 /* check if ram ready */
621 result = target_read_memory(bank->target, FTFx_FCNFG, 1, 1, buf);
623 if (result != ERROR_OK)
624 return result;
626 if (!(buf[0] & (1 << 1))) {
627 /* fallback to longword write */
628 fallback = 1;
630 LOG_WARNING("ram not ready, fallback to slow longword write (FCNFG: %02X)", buf[0]);
632 } else {
633 LOG_DEBUG("flash write into PFLASH @08%" PRIX32, offset);
637 /* program section command */
638 if (fallback == 0) {
640 * Kinetis uses different terms for the granularity of
641 * sector writes, e.g. "phrase" or "128 bits". We use
642 * the generic term "chunk". The largest possible
643 * Kinetis "chunk" is 16 bytes (128 bits).
645 unsigned prog_section_chunk_bytes = kinfo->sector_size >> 8;
646 /* assume the NVM sector size is half the FlexRAM size */
647 unsigned prog_size_bytes = MIN(kinfo->sector_size,
648 kinetis_flash_params[kinfo->granularity].nvm_sector_size_bytes);
649 for (i = 0; i < count; i += prog_size_bytes) {
650 uint8_t residual_buffer[16];
651 uint8_t ftfx_fstat;
652 uint32_t section_count = prog_size_bytes / prog_section_chunk_bytes;
653 uint32_t residual_wc = 0;
656 * Assume the word count covers an entire
657 * sector.
659 wc = prog_size_bytes / 4;
662 * If bytes to be programmed are less than the
663 * full sector, then determine the number of
664 * full-words to program, and put together the
665 * residual buffer so that a full "section"
666 * may always be programmed.
668 if ((count - i) < prog_size_bytes) {
669 /* number of bytes to program beyond full section */
670 unsigned residual_bc = (count-i) % prog_section_chunk_bytes;
672 /* number of complete words to copy directly from buffer */
673 wc = (count - i) / 4;
675 /* number of total sections to write, including residual */
676 section_count = DIV_ROUND_UP((count-i), prog_section_chunk_bytes);
678 /* any residual bytes delivers a whole residual section */
679 residual_wc = (residual_bc ? prog_section_chunk_bytes : 0)/4;
681 /* clear residual buffer then populate residual bytes */
682 (void) memset(residual_buffer, 0xff, prog_section_chunk_bytes);
683 (void) memcpy(residual_buffer, &buffer[i+4*wc], residual_bc);
686 LOG_DEBUG("write section @ %08" PRIX32 " with length %" PRIu32 " bytes",
687 offset + i, (uint32_t)wc*4);
689 /* write data to flexram as whole-words */
690 result = target_write_memory(bank->target, FLEXRAM, 4, wc,
691 buffer + i);
693 if (result != ERROR_OK) {
694 LOG_ERROR("target_write_memory failed");
695 return result;
698 /* write the residual words to the flexram */
699 if (residual_wc) {
700 result = target_write_memory(bank->target,
701 FLEXRAM+4*wc,
702 4, residual_wc,
703 residual_buffer);
705 if (result != ERROR_OK) {
706 LOG_ERROR("target_write_memory failed");
707 return result;
711 /* execute section-write command */
712 result = kinetis_ftfx_command(bank, FTFx_CMD_SECTWRITE, bank->base + offset + i,
713 section_count>>8, section_count, 0, 0,
714 0, 0, 0, 0, &ftfx_fstat);
716 if (result != ERROR_OK)
717 return ERROR_FLASH_OPERATION_FAILED;
720 /* program longword command, not supported in "SF3" devices */
721 else if ((kinfo->granularity != 3) || (kinfo->klxx)) {
723 if (count & 0x3) {
724 uint32_t old_count = count;
725 count = (old_count | 3) + 1;
726 new_buffer = malloc(count);
727 if (new_buffer == NULL) {
728 LOG_ERROR("odd number of bytes to write and no memory "
729 "for padding buffer");
730 return ERROR_FAIL;
732 LOG_INFO("odd number of bytes to write (%" PRIu32 "), extending to %" PRIu32 " "
733 "and padding with 0xff", old_count, count);
734 memset(buffer, 0xff, count);
735 buffer = memcpy(new_buffer, buffer, old_count);
738 uint32_t words_remaining = count / 4;
740 /* try using a block write */
741 int retval = kinetis_write_block(bank, buffer, offset, words_remaining);
743 if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) {
744 /* if block write failed (no sufficient working area),
745 * we use normal (slow) single word accesses */
746 LOG_WARNING("couldn't use block writes, falling back to single "
747 "memory accesses");
749 for (i = 0; i < count; i += 4) {
750 uint8_t ftfx_fstat;
752 LOG_DEBUG("write longword @ %08" PRIX32, (uint32_t)(offset + i));
754 uint8_t padding[4] = {0xff, 0xff, 0xff, 0xff};
755 memcpy(padding, buffer + i, MIN(4, count-i));
757 result = kinetis_ftfx_command(bank, FTFx_CMD_LWORDPROG, bank->base + offset + i,
758 padding[3], padding[2], padding[1], padding[0],
759 0, 0, 0, 0, &ftfx_fstat);
761 if (result != ERROR_OK)
762 return ERROR_FLASH_OPERATION_FAILED;
766 } else {
767 LOG_ERROR("Flash write strategy not implemented");
768 return ERROR_FLASH_OPERATION_FAILED;
771 return ERROR_OK;
774 static int kinetis_read_part_info(struct flash_bank *bank)
776 int result, i;
777 uint32_t offset = 0;
778 uint8_t fcfg1_nvmsize, fcfg1_pfsize, fcfg1_eesize, fcfg2_pflsh;
779 uint32_t nvm_size = 0, pf_size = 0, ee_size = 0;
780 unsigned granularity, num_blocks = 0, num_pflash_blocks = 0, num_nvm_blocks = 0,
781 first_nvm_bank = 0, reassign = 0;
782 struct target *target = bank->target;
783 struct kinetis_flash_bank *kinfo = bank->driver_priv;
785 result = target_read_u32(target, SIM_SDID, &kinfo->sim_sdid);
786 if (result != ERROR_OK)
787 return result;
789 kinfo->klxx = 0;
791 /* K-series MCU? */
792 if ((kinfo->sim_sdid & (~KINETIS_SDID_K_SERIES_MASK)) == 0) {
793 uint32_t mcu_type = kinfo->sim_sdid & KINETIS_K_SDID_TYPE_MASK;
795 switch (mcu_type) {
796 case KINETIS_K_SDID_K10_M50:
797 case KINETIS_K_SDID_K20_M50:
798 /* 1kB sectors */
799 granularity = 0;
800 break;
801 case KINETIS_K_SDID_K10_M72:
802 case KINETIS_K_SDID_K20_M72:
803 case KINETIS_K_SDID_K30_M72:
804 case KINETIS_K_SDID_K30_M100:
805 case KINETIS_K_SDID_K40_M72:
806 case KINETIS_K_SDID_K40_M100:
807 case KINETIS_K_SDID_K50_M72:
808 /* 2kB sectors, 1kB FlexNVM sectors */
809 granularity = 1;
810 break;
811 case KINETIS_K_SDID_K10_M100:
812 case KINETIS_K_SDID_K20_M100:
813 case KINETIS_K_SDID_K11:
814 case KINETIS_K_SDID_K12:
815 case KINETIS_K_SDID_K21_M50:
816 case KINETIS_K_SDID_K22_M50:
817 case KINETIS_K_SDID_K51_M72:
818 case KINETIS_K_SDID_K53:
819 case KINETIS_K_SDID_K60_M100:
820 /* 2kB sectors */
821 granularity = 2;
822 break;
823 case KINETIS_K_SDID_K10_M120:
824 case KINETIS_K_SDID_K20_M120:
825 case KINETIS_K_SDID_K21_M120:
826 case KINETIS_K_SDID_K22_M120:
827 case KINETIS_K_SDID_K60_M150:
828 case KINETIS_K_SDID_K70_M150:
829 /* 4kB sectors */
830 granularity = 3;
831 break;
832 default:
833 LOG_ERROR("Unsupported K-family FAMID");
834 return ERROR_FLASH_OPER_UNSUPPORTED;
837 /* KL-series? */
838 else if ((kinfo->sim_sdid & KINETIS_KL_SDID_SERIESID_MASK) == KINETIS_KL_SDID_SERIESID_KL) {
839 kinfo->klxx = 1;
840 granularity = 0;
841 } else {
842 LOG_ERROR("MCU is unsupported");
843 return ERROR_FLASH_OPER_UNSUPPORTED;
846 result = target_read_u32(target, SIM_FCFG1, &kinfo->sim_fcfg1);
847 if (result != ERROR_OK)
848 return result;
850 result = target_read_u32(target, SIM_FCFG2, &kinfo->sim_fcfg2);
851 if (result != ERROR_OK)
852 return result;
853 fcfg2_pflsh = (kinfo->sim_fcfg2 >> 23) & 0x01;
855 LOG_DEBUG("SDID: 0x%08" PRIX32 " FCFG1: 0x%08" PRIX32 " FCFG2: 0x%08" PRIX32, kinfo->sim_sdid,
856 kinfo->sim_fcfg1, kinfo->sim_fcfg2);
858 fcfg1_nvmsize = (uint8_t)((kinfo->sim_fcfg1 >> 28) & 0x0f);
859 fcfg1_pfsize = (uint8_t)((kinfo->sim_fcfg1 >> 24) & 0x0f);
860 fcfg1_eesize = (uint8_t)((kinfo->sim_fcfg1 >> 16) & 0x0f);
862 /* when the PFLSH bit is set, there is no FlexNVM/FlexRAM */
863 if (!fcfg2_pflsh) {
864 switch (fcfg1_nvmsize) {
865 case 0x03:
866 case 0x07:
867 case 0x09:
868 case 0x0b:
869 nvm_size = 1 << (14 + (fcfg1_nvmsize >> 1));
870 break;
871 case 0x0f:
872 if (granularity == 3)
873 nvm_size = 512<<10;
874 else
875 nvm_size = 256<<10;
876 break;
877 default:
878 nvm_size = 0;
879 break;
882 switch (fcfg1_eesize) {
883 case 0x00:
884 case 0x01:
885 case 0x02:
886 case 0x03:
887 case 0x04:
888 case 0x05:
889 case 0x06:
890 case 0x07:
891 case 0x08:
892 case 0x09:
893 ee_size = (16 << (10 - fcfg1_eesize));
894 break;
895 default:
896 ee_size = 0;
897 break;
901 switch (fcfg1_pfsize) {
902 case 0x03:
903 case 0x05:
904 case 0x07:
905 case 0x09:
906 case 0x0b:
907 case 0x0d:
908 pf_size = 1 << (14 + (fcfg1_pfsize >> 1));
909 break;
910 case 0x0f:
911 if (granularity == 3)
912 pf_size = 1024<<10;
913 else if (fcfg2_pflsh)
914 pf_size = 512<<10;
915 else
916 pf_size = 256<<10;
917 break;
918 default:
919 pf_size = 0;
920 break;
923 LOG_DEBUG("FlexNVM: %" PRIu32 " PFlash: %" PRIu32 " FlexRAM: %" PRIu32 " PFLSH: %d",
924 nvm_size, pf_size, ee_size, fcfg2_pflsh);
925 if (kinfo->klxx)
926 num_blocks = 1;
927 else
928 num_blocks = kinetis_flash_params[granularity].num_blocks;
930 num_pflash_blocks = num_blocks / (2 - fcfg2_pflsh);
931 first_nvm_bank = num_pflash_blocks;
932 num_nvm_blocks = num_blocks - num_pflash_blocks;
934 LOG_DEBUG("%d blocks total: %d PFlash, %d FlexNVM",
935 num_blocks, num_pflash_blocks, num_nvm_blocks);
938 * If the flash class is already assigned, verify the
939 * parameters.
941 if (kinfo->flash_class != FC_AUTO) {
942 if (kinfo->bank_ordinal != (unsigned) bank->bank_number) {
943 LOG_WARNING("Flash ordinal/bank number mismatch");
944 reassign = 1;
945 } else if (kinfo->granularity != granularity) {
946 LOG_WARNING("Flash granularity mismatch");
947 reassign = 1;
948 } else {
949 switch (kinfo->flash_class) {
950 case FC_PFLASH:
951 if (kinfo->bank_ordinal >= first_nvm_bank) {
952 LOG_WARNING("Class mismatch, bank %d is not PFlash", bank->bank_number);
953 reassign = 1;
954 } else if (bank->size != (pf_size / num_pflash_blocks)) {
955 LOG_WARNING("PFlash size mismatch");
956 reassign = 1;
957 } else if (bank->base !=
958 (0x00000000 + bank->size * kinfo->bank_ordinal)) {
959 LOG_WARNING("PFlash address range mismatch");
960 reassign = 1;
961 } else if (kinfo->sector_size !=
962 kinetis_flash_params[granularity].pflash_sector_size_bytes) {
963 LOG_WARNING("PFlash sector size mismatch");
964 reassign = 1;
965 } else {
966 LOG_DEBUG("PFlash bank %d already configured okay",
967 kinfo->bank_ordinal);
969 break;
970 case FC_FLEX_NVM:
971 if ((kinfo->bank_ordinal >= num_blocks) ||
972 (kinfo->bank_ordinal < first_nvm_bank)) {
973 LOG_WARNING("Class mismatch, bank %d is not FlexNVM", bank->bank_number);
974 reassign = 1;
975 } else if (bank->size != (nvm_size / num_nvm_blocks)) {
976 LOG_WARNING("FlexNVM size mismatch");
977 reassign = 1;
978 } else if (bank->base !=
979 (0x10000000 + bank->size * kinfo->bank_ordinal)) {
980 LOG_WARNING("FlexNVM address range mismatch");
981 reassign = 1;
982 } else if (kinfo->sector_size !=
983 kinetis_flash_params[granularity].nvm_sector_size_bytes) {
984 LOG_WARNING("FlexNVM sector size mismatch");
985 reassign = 1;
986 } else {
987 LOG_DEBUG("FlexNVM bank %d already configured okay",
988 kinfo->bank_ordinal);
990 break;
991 case FC_FLEX_RAM:
992 if (kinfo->bank_ordinal != num_blocks) {
993 LOG_WARNING("Class mismatch, bank %d is not FlexRAM", bank->bank_number);
994 reassign = 1;
995 } else if (bank->size != ee_size) {
996 LOG_WARNING("FlexRAM size mismatch");
997 reassign = 1;
998 } else if (bank->base != FLEXRAM) {
999 LOG_WARNING("FlexRAM address mismatch");
1000 reassign = 1;
1001 } else if (kinfo->sector_size !=
1002 kinetis_flash_params[granularity].nvm_sector_size_bytes) {
1003 LOG_WARNING("FlexRAM sector size mismatch");
1004 reassign = 1;
1005 } else {
1006 LOG_DEBUG("FlexRAM bank %d already configured okay", kinfo->bank_ordinal);
1008 break;
1010 default:
1011 LOG_WARNING("Unknown or inconsistent flash class");
1012 reassign = 1;
1013 break;
1016 } else {
1017 LOG_INFO("Probing flash info for bank %d", bank->bank_number);
1018 reassign = 1;
1021 if (!reassign)
1022 return ERROR_OK;
1024 kinfo->granularity = granularity;
1026 if ((unsigned)bank->bank_number < num_pflash_blocks) {
1027 /* pflash, banks start at address zero */
1028 kinfo->flash_class = FC_PFLASH;
1029 bank->size = (pf_size / num_pflash_blocks);
1030 bank->base = 0x00000000 + bank->size * bank->bank_number;
1031 kinfo->sector_size = kinetis_flash_params[granularity].pflash_sector_size_bytes;
1032 kinfo->protection_size = pf_size / 32;
1033 } else if ((unsigned)bank->bank_number < num_blocks) {
1034 /* nvm, banks start at address 0x10000000 */
1035 kinfo->flash_class = FC_FLEX_NVM;
1036 bank->size = (nvm_size / num_nvm_blocks);
1037 bank->base = 0x10000000 + bank->size * (bank->bank_number - first_nvm_bank);
1038 kinfo->sector_size = kinetis_flash_params[granularity].nvm_sector_size_bytes;
1039 kinfo->protection_size = 0; /* FIXME: TODO: depends on DEPART bits, chip */
1040 } else if ((unsigned)bank->bank_number == num_blocks) {
1041 LOG_ERROR("FlexRAM support not yet implemented");
1042 return ERROR_FLASH_OPER_UNSUPPORTED;
1043 } else {
1044 LOG_ERROR("Cannot determine parameters for bank %d, only %d banks on device",
1045 bank->bank_number, num_blocks);
1046 return ERROR_FLASH_BANK_INVALID;
1049 if (bank->sectors) {
1050 free(bank->sectors);
1051 bank->sectors = NULL;
1054 bank->num_sectors = bank->size / kinfo->sector_size;
1055 assert(bank->num_sectors > 0);
1056 bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
1058 for (i = 0; i < bank->num_sectors; i++) {
1059 bank->sectors[i].offset = offset;
1060 bank->sectors[i].size = kinfo->sector_size;
1061 offset += kinfo->sector_size;
1062 bank->sectors[i].is_erased = -1;
1063 bank->sectors[i].is_protected = 1;
1066 return ERROR_OK;
1069 static int kinetis_probe(struct flash_bank *bank)
1071 if (bank->target->state != TARGET_HALTED) {
1072 LOG_WARNING("Cannot communicate... target not halted.");
1073 return ERROR_TARGET_NOT_HALTED;
1076 return kinetis_read_part_info(bank);
1079 static int kinetis_auto_probe(struct flash_bank *bank)
1081 struct kinetis_flash_bank *kinfo = bank->driver_priv;
1083 if (kinfo->sim_sdid)
1084 return ERROR_OK;
1086 return kinetis_probe(bank);
1089 static int kinetis_info(struct flash_bank *bank, char *buf, int buf_size)
1091 const char *bank_class_names[] = {
1092 "(ANY)", "PFlash", "FlexNVM", "FlexRAM"
1095 struct kinetis_flash_bank *kinfo = bank->driver_priv;
1097 (void) snprintf(buf, buf_size,
1098 "%s driver for %s flash bank %s at 0x%8.8" PRIx32 "",
1099 bank->driver->name, bank_class_names[kinfo->flash_class],
1100 bank->name, bank->base);
1102 return ERROR_OK;
1105 static int kinetis_blank_check(struct flash_bank *bank)
1107 struct kinetis_flash_bank *kinfo = bank->driver_priv;
1109 if (bank->target->state != TARGET_HALTED) {
1110 LOG_ERROR("Target not halted");
1111 return ERROR_TARGET_NOT_HALTED;
1114 if (kinfo->flash_class == FC_PFLASH) {
1115 int result;
1116 uint8_t ftfx_fstat;
1118 /* check if whole bank is blank */
1119 result = kinetis_ftfx_command(bank, FTFx_CMD_BLOCKSTAT, bank->base, 0, 0, 0, 0, 0, 0, 0, 0, &ftfx_fstat);
1121 if (result != ERROR_OK)
1122 return result;
1124 if (ftfx_fstat & 0x01) {
1125 /* the whole bank is not erased, check sector-by-sector */
1126 int i;
1127 for (i = 0; i < bank->num_sectors; i++) {
1128 /* normal margin */
1129 result = kinetis_ftfx_command(bank, FTFx_CMD_SECTSTAT, bank->base + bank->sectors[i].offset,
1130 1, 0, 0, 0, 0, 0, 0, 0, &ftfx_fstat);
1132 if (result == ERROR_OK) {
1133 bank->sectors[i].is_erased = !(ftfx_fstat & 0x01);
1134 } else {
1135 LOG_DEBUG("Ignoring errored PFlash sector blank-check");
1136 bank->sectors[i].is_erased = -1;
1139 } else {
1140 /* the whole bank is erased, update all sectors */
1141 int i;
1142 for (i = 0; i < bank->num_sectors; i++)
1143 bank->sectors[i].is_erased = 1;
1145 } else {
1146 LOG_WARNING("kinetis_blank_check not supported yet for FlexNVM");
1147 return ERROR_FLASH_OPERATION_FAILED;
1150 return ERROR_OK;
1153 struct flash_driver kinetis_flash = {
1154 .name = "kinetis",
1155 .flash_bank_command = kinetis_flash_bank_command,
1156 .erase = kinetis_erase,
1157 .protect = kinetis_protect,
1158 .write = kinetis_write,
1159 .read = default_flash_read,
1160 .probe = kinetis_probe,
1161 .auto_probe = kinetis_auto_probe,
1162 .erase_check = kinetis_blank_check,
1163 .protect_check = kinetis_protect_check,
1164 .info = kinetis_info,