1 /***************************************************************************
2 * Copyright (C) 2009 by Marvell Semiconductors, Inc. *
3 * Written by Nicolas Pitre <nico at marvell.com> *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program. If not, see <http://www.gnu.org/licenses/>. *
17 ***************************************************************************/
20 * NAND controller interface for Marvell Orion/Kirkwood SoCs.
29 #include <target/arm.h>
31 struct orion_nand_controller
{
32 struct arm_nand_data io
;
39 #define CHECK_HALTED \
41 if (target->state != TARGET_HALTED) { \
42 LOG_ERROR("NAND flash access requires halted target"); \
43 return ERROR_NAND_OPERATION_FAILED; \
47 static int orion_nand_command(struct nand_device
*nand
, uint8_t command
)
49 struct orion_nand_controller
*hw
= nand
->controller_priv
;
50 struct target
*target
= nand
->target
;
53 target_write_u8(target
, hw
->cmd
, command
);
57 static int orion_nand_address(struct nand_device
*nand
, uint8_t address
)
59 struct orion_nand_controller
*hw
= nand
->controller_priv
;
60 struct target
*target
= nand
->target
;
63 target_write_u8(target
, hw
->addr
, address
);
67 static int orion_nand_read(struct nand_device
*nand
, void *data
)
69 struct orion_nand_controller
*hw
= nand
->controller_priv
;
70 struct target
*target
= nand
->target
;
73 target_read_u8(target
, hw
->data
, data
);
77 static int orion_nand_write(struct nand_device
*nand
, uint16_t data
)
79 struct orion_nand_controller
*hw
= nand
->controller_priv
;
80 struct target
*target
= nand
->target
;
83 target_write_u8(target
, hw
->data
, data
);
87 static int orion_nand_slow_block_write(struct nand_device
*nand
, uint8_t *data
, int size
)
90 orion_nand_write(nand
, *data
++);
94 static int orion_nand_fast_block_write(struct nand_device
*nand
, uint8_t *data
, int size
)
96 struct orion_nand_controller
*hw
= nand
->controller_priv
;
99 hw
->io
.chunk_size
= nand
->page_size
;
101 retval
= arm_nandwrite(&hw
->io
, data
, size
);
102 if (retval
== ERROR_NAND_NO_BUFFER
)
103 retval
= orion_nand_slow_block_write(nand
, data
, size
);
108 static int orion_nand_reset(struct nand_device
*nand
)
110 return orion_nand_command(nand
, NAND_CMD_RESET
);
113 NAND_DEVICE_COMMAND_HANDLER(orion_nand_device_command
)
115 struct orion_nand_controller
*hw
;
120 return ERROR_COMMAND_SYNTAX_ERROR
;
122 hw
= calloc(1, sizeof(*hw
));
124 LOG_ERROR("no memory for nand controller");
125 return ERROR_NAND_DEVICE_INVALID
;
128 nand
->controller_priv
= hw
;
130 COMMAND_PARSE_NUMBER(u32
, CMD_ARGV
[2], base
);
135 hw
->cmd
= base
+ (1 << cle
);
136 hw
->addr
= base
+ (1 << ale
);
138 hw
->io
.target
= nand
->target
;
139 hw
->io
.data
= hw
->data
;
140 hw
->io
.op
= ARM_NAND_NONE
;
145 static int orion_nand_init(struct nand_device
*nand
)
150 struct nand_flash_controller orion_nand_controller
= {
152 .usage
= "<target_id> <NAND_address>",
153 .command
= orion_nand_command
,
154 .address
= orion_nand_address
,
155 .read_data
= orion_nand_read
,
156 .write_data
= orion_nand_write
,
157 .write_block_data
= orion_nand_fast_block_write
,
158 .reset
= orion_nand_reset
,
159 .nand_device_command
= orion_nand_device_command
,
160 .init
= orion_nand_init
,