3 if { [info exists CHIPNAME] } {
4 set _CHIPNAME $CHIPNAME
9 if { [info exists TAP_TYPE] } {
10 set _TAP_TYPE $TAP_TYPE
12 puts "You need to select a tap type"
16 # Configure the target
17 if { [string compare $_TAP_TYPE "VJTAG"] == 0 } {
18 if { [info exists FPGATAPID] } {
19 set _FPGATAPID $FPGATAPID
21 puts "You need to set your FPGA JTAG ID"
25 jtag newtap $_CHIPNAME cpu -irlen 10 -expected-id $_FPGATAPID
27 set _TARGETNAME $_CHIPNAME.cpu
28 target create $_TARGETNAME or1k -endian $_ENDIAN -chain-position $_TARGETNAME
30 # Select the TAP core we are using
33 } elseif { [string compare $_TAP_TYPE "XILINX_BSCAN"] == 0 } {
35 if { [info exists FPGATAPID] } {
36 set _FPGATAPID $FPGATAPID
38 puts "You need to set your FPGA JTAG ID"
42 jtag newtap $_CHIPNAME cpu -irlen 6 -expected-id $_FPGATAPID
44 set _TARGETNAME $_CHIPNAME.cpu
45 target create $_TARGETNAME or1k -endian $_ENDIAN -chain-position $_TARGETNAME
47 # Select the TAP core we are using
48 tap_select xilinx_bscan
50 # OpenCores Mohor JTAG TAP ID
51 set _CPUTAPID 0x14951185
53 jtag newtap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
55 set _TARGETNAME $_CHIPNAME.cpu
56 target create $_TARGETNAME or1k -endian $_ENDIAN -chain-position $_TARGETNAME
58 # Select the TAP core we are using
62 # Select the debug unit core we are using. This debug unit as an option.
64 proc ADBG_USE_HISPEED {} { return 1 }
66 # If ADBG_USE_HISPEED is set (options bit 1), status bits will be skipped
67 # on burst reads and writes to improve download speeds.
68 # This option must match the RTL configured option.
70 du_select adv [ADBG_USE_HISPEED]