2 # Novena open hardware and F/OSS-friendly computing platform
4 # Design documentation:
5 # http://www.kosagi.com/w/index.php?title=Novena_PVT_Design_Source
7 # +-------------+--------------+------+-------+---------+
8 # | Pad name | Schematic | GPIO | sysfs | JTAG |
9 # +-------------+--------------+------+-------+---------+
10 # | DISP0_DAT13 | FPGA_RESET_N | 5-07 | 135 | RESET_N |
11 # | DISP0_DAT14 | FPGA_TCK | 5-08 | 136 | TCK |
12 # | DISP0_DAT15 | FPGA_TDI | 5-09 | 137 | TDI |
13 # | DISP0_DAT16 | FPGA_TDO | 5-10 | 138 | TDO |
14 # | DISP0_DAT17 | FPGA_TMS | 5-11 | 139 | TMS |
15 # +-------------+--------------+------+-------+---------+
22 sysfsgpio_jtag_nums 136 139 137 138
24 source [find cpld/xilinx-xc6s.cfg]