target/arm_adi_v5: fix sync CSW cache on apreg write
[openocd.git] / tcl / board / st_nucleo_h743zi.cfg
blobcfe2cda1b5fac6c560f6af3d700f764a3c606cda
1 # This is an ST NUCLEO-H743ZI board with single STM32H743ZI chip.
2 # http://www.st.com/en/evaluation-tools/nucleo-h743zi.html
4 source [find interface/stlink.cfg]
6 transport select hla_swd
8 source [find target/stm32h7x_dual_bank.cfg]
10 reset_config srst_only