atmega: add support for the at90usb128 flash
[openocd.git] / src / flash / nor / avrf.c
blob1984c9ef1f3c425284430201cc3a5d071d6a8dfd
1 /***************************************************************************
2 * Copyright (C) 2009 by Simon Qian *
3 * SimonQian@SimonQian.com *
4 * *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
9 * *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
14 * *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
19 ***************************************************************************/
21 #ifdef HAVE_CONFIG_H
22 #include "config.h"
23 #endif
25 #include "imp.h"
26 #include <target/avrt.h>
28 /* AVR_JTAG_Instructions */
29 #define AVR_JTAG_INS_LEN 4
30 /* Public Instructions: */
31 #define AVR_JTAG_INS_EXTEST 0x00
32 #define AVR_JTAG_INS_IDCODE 0x01
33 #define AVR_JTAG_INS_SAMPLE_PRELOAD 0x02
34 #define AVR_JTAG_INS_BYPASS 0x0F
35 /* AVR Specified Public Instructions: */
36 #define AVR_JTAG_INS_AVR_RESET 0x0C
37 #define AVR_JTAG_INS_PROG_ENABLE 0x04
38 #define AVR_JTAG_INS_PROG_COMMANDS 0x05
39 #define AVR_JTAG_INS_PROG_PAGELOAD 0x06
40 #define AVR_JTAG_INS_PROG_PAGEREAD 0x07
42 /* Data Registers: */
43 #define AVR_JTAG_REG_Bypass_Len 1
44 #define AVR_JTAG_REG_DeviceID_Len 32
46 #define AVR_JTAG_REG_Reset_Len 1
47 #define AVR_JTAG_REG_JTAGID_Len 32
48 #define AVR_JTAG_REG_ProgrammingEnable_Len 16
49 #define AVR_JTAG_REG_ProgrammingCommand_Len 15
50 #define AVR_JTAG_REG_FlashDataByte_Len 16
52 struct avrf_type {
53 char name[15];
54 uint16_t chip_id;
55 int flash_page_size;
56 int flash_page_num;
57 int eeprom_page_size;
58 int eeprom_page_num;
61 struct avrf_flash_bank {
62 int ppage_size;
63 int probed;
66 static const struct avrf_type avft_chips_info[] = {
67 /* name, chip_id, flash_page_size, flash_page_num,
68 * eeprom_page_size, eeprom_page_num
70 {"atmega128", 0x9702, 256, 512, 8, 512},
71 {"at90can128", 0x9781, 256, 512, 8, 512},
72 {"at90usb128", 0x9782, 256, 512, 8, 512},
73 {"atmega164p", 0x940a, 128, 128, 4, 128},
74 {"atmega324p", 0x9508, 128, 256, 4, 256},
75 {"atmega324pa", 0x9511, 128, 256, 4, 256},
76 {"atmega644p", 0x960a, 256, 256, 8, 256},
77 {"atmega1284p", 0x9705, 256, 512, 8, 512},
80 /* avr program functions */
81 static int avr_jtag_reset(struct avr_common *avr, uint32_t reset)
83 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_AVR_RESET);
84 avr_jtag_senddat(avr->jtag_info.tap, NULL, reset, AVR_JTAG_REG_Reset_Len);
86 return ERROR_OK;
89 static int avr_jtag_read_jtagid(struct avr_common *avr, uint32_t *id)
91 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_IDCODE);
92 avr_jtag_senddat(avr->jtag_info.tap, id, 0, AVR_JTAG_REG_JTAGID_Len);
94 return ERROR_OK;
97 static int avr_jtagprg_enterprogmode(struct avr_common *avr)
99 avr_jtag_reset(avr, 1);
101 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE);
102 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xA370, AVR_JTAG_REG_ProgrammingEnable_Len);
104 return ERROR_OK;
107 static int avr_jtagprg_leaveprogmode(struct avr_common *avr)
109 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
110 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2300, AVR_JTAG_REG_ProgrammingCommand_Len);
111 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3300, AVR_JTAG_REG_ProgrammingCommand_Len);
113 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE);
114 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0, AVR_JTAG_REG_ProgrammingEnable_Len);
116 avr_jtag_reset(avr, 0);
118 return ERROR_OK;
121 static int avr_jtagprg_chiperase(struct avr_common *avr)
123 uint32_t poll_value;
125 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
126 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2380, AVR_JTAG_REG_ProgrammingCommand_Len);
127 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3180, AVR_JTAG_REG_ProgrammingCommand_Len);
128 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
129 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
131 do {
132 poll_value = 0;
133 avr_jtag_senddat(avr->jtag_info.tap,
134 &poll_value,
135 0x3380,
136 AVR_JTAG_REG_ProgrammingCommand_Len);
137 if (ERROR_OK != mcu_execute_queue())
138 return ERROR_FAIL;
139 LOG_DEBUG("poll_value = 0x%04" PRIx32 "", poll_value);
140 } while (!(poll_value & 0x0200));
142 return ERROR_OK;
145 static int avr_jtagprg_writeflashpage(struct avr_common *avr,
146 const uint8_t *page_buf,
147 uint32_t buf_size,
148 uint32_t addr,
149 uint32_t page_size)
151 uint32_t i, poll_value;
153 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
154 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2310, AVR_JTAG_REG_ProgrammingCommand_Len);
156 /* load addr high byte */
157 avr_jtag_senddat(avr->jtag_info.tap,
158 NULL,
159 0x0700 | ((addr >> 9) & 0xFF),
160 AVR_JTAG_REG_ProgrammingCommand_Len);
162 /* load addr low byte */
163 avr_jtag_senddat(avr->jtag_info.tap,
164 NULL,
165 0x0300 | ((addr >> 1) & 0xFF),
166 AVR_JTAG_REG_ProgrammingCommand_Len);
168 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_PAGELOAD);
170 for (i = 0; i < page_size; i++) {
171 if (i < buf_size)
172 avr_jtag_senddat(avr->jtag_info.tap, NULL, page_buf[i], 8);
173 else
174 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xFF, 8);
177 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
179 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
180 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3500, AVR_JTAG_REG_ProgrammingCommand_Len);
181 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
182 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
184 do {
185 poll_value = 0;
186 avr_jtag_senddat(avr->jtag_info.tap,
187 &poll_value,
188 0x3700,
189 AVR_JTAG_REG_ProgrammingCommand_Len);
190 if (ERROR_OK != mcu_execute_queue())
191 return ERROR_FAIL;
192 LOG_DEBUG("poll_value = 0x%04" PRIx32 "", poll_value);
193 } while (!(poll_value & 0x0200));
195 return ERROR_OK;
198 FLASH_BANK_COMMAND_HANDLER(avrf_flash_bank_command)
200 struct avrf_flash_bank *avrf_info;
202 if (CMD_ARGC < 6)
203 return ERROR_COMMAND_SYNTAX_ERROR;
205 avrf_info = malloc(sizeof(struct avrf_flash_bank));
206 bank->driver_priv = avrf_info;
208 avrf_info->probed = 0;
210 return ERROR_OK;
213 static int avrf_erase(struct flash_bank *bank, int first, int last)
215 struct target *target = bank->target;
216 struct avr_common *avr = target->arch_info;
217 int status;
219 LOG_DEBUG("%s", __func__);
221 if (target->state != TARGET_HALTED) {
222 LOG_ERROR("Target not halted");
223 return ERROR_TARGET_NOT_HALTED;
226 status = avr_jtagprg_enterprogmode(avr);
227 if (status != ERROR_OK)
228 return status;
230 status = avr_jtagprg_chiperase(avr);
231 if (status != ERROR_OK)
232 return status;
234 return avr_jtagprg_leaveprogmode(avr);
237 static int avrf_protect(struct flash_bank *bank, int set, int first, int last)
239 LOG_INFO("%s", __func__);
240 return ERROR_OK;
243 static int avrf_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
245 struct target *target = bank->target;
246 struct avr_common *avr = target->arch_info;
247 uint32_t cur_size, cur_buffer_size, page_size;
249 if (bank->target->state != TARGET_HALTED) {
250 LOG_ERROR("Target not halted");
251 return ERROR_TARGET_NOT_HALTED;
254 page_size = bank->sectors[0].size;
255 if ((offset % page_size) != 0) {
256 LOG_WARNING("offset 0x%" PRIx32 " breaks required %" PRIu32 "-byte alignment",
257 offset,
258 page_size);
259 return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
262 LOG_DEBUG("offset is 0x%08" PRIx32 "", offset);
263 LOG_DEBUG("count is %" PRId32 "", count);
265 if (ERROR_OK != avr_jtagprg_enterprogmode(avr))
266 return ERROR_FAIL;
268 cur_size = 0;
269 while (count > 0) {
270 if (count > page_size)
271 cur_buffer_size = page_size;
272 else
273 cur_buffer_size = count;
274 avr_jtagprg_writeflashpage(avr,
275 buffer + cur_size,
276 cur_buffer_size,
277 offset + cur_size,
278 page_size);
279 count -= cur_buffer_size;
280 cur_size += cur_buffer_size;
282 keep_alive();
285 return avr_jtagprg_leaveprogmode(avr);
288 #define EXTRACT_MFG(X) (((X) & 0xffe) >> 1)
289 #define EXTRACT_PART(X) (((X) & 0xffff000) >> 12)
290 #define EXTRACT_VER(X) (((X) & 0xf0000000) >> 28)
292 static int avrf_probe(struct flash_bank *bank)
294 struct target *target = bank->target;
295 struct avrf_flash_bank *avrf_info = bank->driver_priv;
296 struct avr_common *avr = target->arch_info;
297 const struct avrf_type *avr_info = NULL;
298 int i;
299 uint32_t device_id;
301 if (bank->target->state != TARGET_HALTED) {
302 LOG_ERROR("Target not halted");
303 return ERROR_TARGET_NOT_HALTED;
306 avrf_info->probed = 0;
308 avr_jtag_read_jtagid(avr, &device_id);
309 if (ERROR_OK != mcu_execute_queue())
310 return ERROR_FAIL;
312 LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
313 if (EXTRACT_MFG(device_id) != 0x1F)
314 LOG_ERROR("0x%" PRIx32 " is invalid Manufacturer for avr, 0x%X is expected",
315 EXTRACT_MFG(device_id),
316 0x1F);
318 for (i = 0; i < (int)ARRAY_SIZE(avft_chips_info); i++) {
319 if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id)) {
320 avr_info = &avft_chips_info[i];
321 LOG_INFO("target device is %s", avr_info->name);
322 break;
326 if (avr_info != NULL) {
327 if (bank->sectors) {
328 free(bank->sectors);
329 bank->sectors = NULL;
332 /* chip found */
333 bank->base = 0x00000000;
334 bank->size = (avr_info->flash_page_size * avr_info->flash_page_num);
335 bank->num_sectors = avr_info->flash_page_num;
336 bank->sectors = malloc(sizeof(struct flash_sector) * avr_info->flash_page_num);
338 for (i = 0; i < avr_info->flash_page_num; i++) {
339 bank->sectors[i].offset = i * avr_info->flash_page_size;
340 bank->sectors[i].size = avr_info->flash_page_size;
341 bank->sectors[i].is_erased = -1;
342 bank->sectors[i].is_protected = 1;
345 avrf_info->probed = 1;
346 return ERROR_OK;
347 } else {
348 /* chip not supported */
349 LOG_ERROR("0x%" PRIx32 " is not support for avr", EXTRACT_PART(device_id));
351 avrf_info->probed = 1;
352 return ERROR_FAIL;
356 static int avrf_auto_probe(struct flash_bank *bank)
358 struct avrf_flash_bank *avrf_info = bank->driver_priv;
359 if (avrf_info->probed)
360 return ERROR_OK;
361 return avrf_probe(bank);
364 static int avrf_protect_check(struct flash_bank *bank)
366 LOG_INFO("%s", __func__);
367 return ERROR_OK;
370 static int avrf_info(struct flash_bank *bank, char *buf, int buf_size)
372 struct target *target = bank->target;
373 struct avr_common *avr = target->arch_info;
374 const struct avrf_type *avr_info = NULL;
375 int i;
376 uint32_t device_id;
378 if (bank->target->state != TARGET_HALTED) {
379 LOG_ERROR("Target not halted");
380 return ERROR_TARGET_NOT_HALTED;
383 avr_jtag_read_jtagid(avr, &device_id);
384 if (ERROR_OK != mcu_execute_queue())
385 return ERROR_FAIL;
387 LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
388 if (EXTRACT_MFG(device_id) != 0x1F)
389 LOG_ERROR("0x%" PRIx32 " is invalid Manufacturer for avr, 0x%X is expected",
390 EXTRACT_MFG(device_id),
391 0x1F);
393 for (i = 0; i < (int)ARRAY_SIZE(avft_chips_info); i++) {
394 if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id)) {
395 avr_info = &avft_chips_info[i];
396 LOG_INFO("target device is %s", avr_info->name);
398 break;
402 if (avr_info != NULL) {
403 /* chip found */
404 snprintf(buf, buf_size, "%s - Rev: 0x%" PRIx32 "", avr_info->name,
405 EXTRACT_VER(device_id));
406 return ERROR_OK;
407 } else {
408 /* chip not supported */
409 snprintf(buf, buf_size, "Cannot identify target as a avr\n");
410 return ERROR_FLASH_OPERATION_FAILED;
414 static int avrf_mass_erase(struct flash_bank *bank)
416 struct target *target = bank->target;
417 struct avr_common *avr = target->arch_info;
419 if (target->state != TARGET_HALTED) {
420 LOG_ERROR("Target not halted");
421 return ERROR_TARGET_NOT_HALTED;
424 if ((ERROR_OK != avr_jtagprg_enterprogmode(avr))
425 || (ERROR_OK != avr_jtagprg_chiperase(avr))
426 || (ERROR_OK != avr_jtagprg_leaveprogmode(avr)))
427 return ERROR_FAIL;
429 return ERROR_OK;
432 COMMAND_HANDLER(avrf_handle_mass_erase_command)
434 int i;
436 if (CMD_ARGC < 1)
437 return ERROR_COMMAND_SYNTAX_ERROR;
439 struct flash_bank *bank;
440 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
441 if (ERROR_OK != retval)
442 return retval;
444 if (avrf_mass_erase(bank) == ERROR_OK) {
445 /* set all sectors as erased */
446 for (i = 0; i < bank->num_sectors; i++)
447 bank->sectors[i].is_erased = 1;
449 command_print(CMD_CTX, "avr mass erase complete");
450 } else
451 command_print(CMD_CTX, "avr mass erase failed");
453 LOG_DEBUG("%s", __func__);
454 return ERROR_OK;
457 static const struct command_registration avrf_exec_command_handlers[] = {
459 .name = "mass_erase",
460 .usage = "<bank>",
461 .handler = avrf_handle_mass_erase_command,
462 .mode = COMMAND_EXEC,
463 .help = "erase entire device",
465 COMMAND_REGISTRATION_DONE
467 static const struct command_registration avrf_command_handlers[] = {
469 .name = "avrf",
470 .mode = COMMAND_ANY,
471 .help = "AVR flash command group",
472 .usage = "",
473 .chain = avrf_exec_command_handlers,
475 COMMAND_REGISTRATION_DONE
478 struct flash_driver avr_flash = {
479 .name = "avr",
480 .commands = avrf_command_handlers,
481 .flash_bank_command = avrf_flash_bank_command,
482 .erase = avrf_erase,
483 .protect = avrf_protect,
484 .write = avrf_write,
485 .read = default_flash_read,
486 .probe = avrf_probe,
487 .auto_probe = avrf_auto_probe,
488 .erase_check = default_flash_blank_check,
489 .protect_check = avrf_protect_check,
490 .info = avrf_info,