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linux-powerpc-fsl: Update GIT revision for Freescale Calamari board kernel.
[openembedded.git] / recipes / linux / linux-omap-2.6.31 / usb / 0007-ehci-portwise-configurations.patch
blob46258dac9b7a9930dcef9d7ec7e2fa195710c9d4
1 From 4d0b781b146ee79cee1208589498e8ac959d5796 Mon Sep 17 00:00:00 2001
2 From: Ajay Kumar Gupta <ajay.gupta@ti.com>
3 Date: Thu, 13 Aug 2009 09:10:44 +0530
4 Subject: [PATCH 07/16] ehci: portwise configurations
5
6 OMAP3 EHCI has three ports and we can configure port modes
7 (PHY/TLL) on per port basis in silicon version ES3.0 onwards.
8
9 This patch modifies the existing EHCI driver to accomodate
10 portwise mode configuration.
11
12 Changes being done:
13
14 - Pass platform_data pointer as parameter to usb_ehci_init()
15 to avoid multiple parameters.
16 - Use platform_data pointer in usb-ehci.c as platform_data
17 directly without copying it to another *pdata*.
18 - Initializing platform_data in all platform files with
19 platform specific ehci parameters.
20 - Added port_mode[OMAP_HS_USB_PORTS]in platform_data
21 structures.This allows to setup mux pins on per port basis.
22 - Added phy_reset_gpio[OMAP_HS_USB_PORTS].
23
24 Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
25 ---
26 arch/arm/mach-omap2/board-3430sdp.c | 15 +++++-
27 arch/arm/mach-omap2/board-omap3beagle.c | 15 +++++-
28 arch/arm/mach-omap2/board-omap3evm.c | 15 +++++-
29 arch/arm/mach-omap2/board-omap3pandora.c | 15 +++++-
30 arch/arm/mach-omap2/usb-ehci.c | 95 +++++++++++++++---------------
31 arch/arm/plat-omap/include/mach/usb.h | 12 ++--
32 drivers/usb/host/ehci-omap.c | 63 +++++++++++---------
33 7 files changed, 145 insertions(+), 85 deletions(-)
34
35 diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
36 index 439ebcc..f9fabb0 100644
37 --- a/arch/arm/mach-omap2/board-3430sdp.c
38 +++ b/arch/arm/mach-omap2/board-3430sdp.c
39 @@ -480,6 +480,19 @@ static void enable_board_wakeup_source(void)
40 omap_cfg_reg(AF26_34XX_SYS_NIRQ); /* T2 interrupt line (keypad) */
41 }
42
43 +static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
44 +
45 + .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
46 + .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
47 + .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
48 +
49 + .chargepump = true,
50 + .phy_reset = true,
51 + .reset_gpio_port[0] = 57,
52 + .reset_gpio_port[1] = 61,
53 + .reset_gpio_port[2] = -EINVAL
54 +};
55 +
56 static void __init omap_3430sdp_init(void)
57 {
58 omap3430_i2c_init();
59 @@ -495,8 +508,8 @@ static void __init omap_3430sdp_init(void)
60 omap_serial_init();
61 usb_musb_init();
62 board_smc91x_init();
63 - usb_ehci_init(EHCI_HCD_OMAP_MODE_PHY, true, true, 57, 61);
64 enable_board_wakeup_source();
65 + usb_ehci_init(&ehci_pdata);
66 }
67
68 static void __init omap_3430sdp_map_io(void)
69 diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
70 index a661fe3..4109969 100644
71 --- a/arch/arm/mach-omap2/board-omap3beagle.c
72 +++ b/arch/arm/mach-omap2/board-omap3beagle.c
73 @@ -395,6 +395,19 @@ static void __init omap3beagle_flash_init(void)
74 }
75 }
76
77 +static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
78 +
79 + .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
80 + .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
81 + .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
82 +
83 + .chargepump = false,
84 + .phy_reset = true,
85 + .reset_gpio_port[0] = -EINVAL,
86 + .reset_gpio_port[1] = 147,
87 + .reset_gpio_port[2] = -EINVAL
88 +};
89 +
90 static void __init omap3_beagle_init(void)
91 {
92 omap3_beagle_i2c_init();
93 @@ -408,7 +421,7 @@ static void __init omap3_beagle_init(void)
94 gpio_direction_output(170, true);
95
96 usb_musb_init();
97 - usb_ehci_init(EHCI_HCD_OMAP_MODE_PHY, true, true, 57, 61);
98 + usb_ehci_init(&ehci_pdata);
99 omap3beagle_flash_init();
100
101 /* Ensure SDRC pins are mux'd for self-refresh */
102 diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
103 index 18b747b..62a6f32 100644
104 --- a/arch/arm/mach-omap2/board-omap3evm.c
105 +++ b/arch/arm/mach-omap2/board-omap3evm.c
106 @@ -293,6 +293,19 @@ static struct platform_device *omap3_evm_devices[] __initdata = {
107 &omap3evm_smc911x_device,
108 };
109
110 +static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
111 +
112 + .port_mode[0] = EHCI_HCD_OMAP_MODE_UNKNOWN,
113 + .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
114 + .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
115 +
116 + .chargepump = false,
117 + .phy_reset = true,
118 + .reset_gpio_port[0] = -EINVAL,
119 + .reset_gpio_port[1] = 135,
120 + .reset_gpio_port[2] = -EINVAL
121 +};
122 +
123 static void __init omap3_evm_init(void)
124 {
125 omap3_evm_i2c_init();
126 @@ -310,7 +323,7 @@ static void __init omap3_evm_init(void)
127 usb_musb_init();
128 /* Setup EHCI phy reset padconfig */
129 omap_cfg_reg(AF4_34XX_GPIO135_OUT);
130 - usb_ehci_init(EHCI_HCD_OMAP_MODE_PHY, false, true, -EINVAL, 135);
131 + usb_ehci_init(&ehci_pdata);
132 ads7846_dev_init();
133 }
134
135 diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
136 index c9d6488..9f115dc 100644
137 --- a/arch/arm/mach-omap2/board-omap3pandora.c
138 +++ b/arch/arm/mach-omap2/board-omap3pandora.c
139 @@ -383,6 +383,19 @@ static struct platform_device *omap3pandora_devices[] __initdata = {
140 &pandora_keys_gpio,
141 };
142
143 +static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
144 +
145 + .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
146 + .port_mode[1] = EHCI_HCD_OMAP_MODE_UNKNOWN,
147 + .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
148 +
149 + .chargepump = false,
150 + .phy_reset = true,
151 + .reset_gpio_port[0] = 16,
152 + .reset_gpio_port[1] = -EINVAL,
153 + .reset_gpio_port[2] = -EINVAL
154 +};
155 +
156 static void __init omap3pandora_init(void)
157 {
158 omap3pandora_i2c_init();
159 @@ -392,7 +405,7 @@ static void __init omap3pandora_init(void)
160 spi_register_board_info(omap3pandora_spi_board_info,
161 ARRAY_SIZE(omap3pandora_spi_board_info));
162 omap3pandora_ads7846_init();
163 - usb_ehci_init(EHCI_HCD_OMAP_MODE_PHY, false, true, 16, -EINVAL);
164 + usb_ehci_init(&ehci_pdata);
165 pandora_keys_gpio_init();
166 usb_musb_init();
167
168 diff --git a/arch/arm/mach-omap2/usb-ehci.c b/arch/arm/mach-omap2/usb-ehci.c
169 index 6a96569..a29c8ca 100644
170 --- a/arch/arm/mach-omap2/usb-ehci.c
171 +++ b/arch/arm/mach-omap2/usb-ehci.c
172 @@ -68,14 +68,10 @@ static struct platform_device ehci_device = {
173 /*
174 * setup_ehci_io_mux - initialize IO pad mux for USBHOST
175 */
176 -static void setup_ehci_io_mux(enum ehci_hcd_omap_mode phy_mode)
177 +static void setup_ehci_io_mux(enum ehci_hcd_omap_mode *port_mode)
178 {
179 - if (phy_mode == EHCI_HCD_OMAP_MODE_PHY) {
180 - /* PHY mode of operation for board: 750-2083-001
181 - * ISP1504 connected to Port1 and Port2
182 - * Do Func Mux setting for 12-pin ULPI PHY mode
183 - */
184 - /* Port1 */
185 + switch (port_mode[0]) {
186 + case EHCI_HCD_OMAP_MODE_PHY:
187 omap_cfg_reg(Y9_3430_USB1HS_PHY_STP);
188 omap_cfg_reg(Y8_3430_USB1HS_PHY_CLK);
189 omap_cfg_reg(AA14_3430_USB1HS_PHY_DIR);
190 @@ -88,28 +84,8 @@ static void setup_ehci_io_mux(enum ehci_hcd_omap_mode phy_mode)
191 omap_cfg_reg(Y12_3430_USB1HS_PHY_DATA5);
192 omap_cfg_reg(W8_3430_USB1HS_PHY_DATA6);
193 omap_cfg_reg(Y13_3430_USB1HS_PHY_DATA7);
194 -
195 - /* Port2 */
196 - omap_cfg_reg(AA10_3430_USB2HS_PHY_STP);
197 - omap_cfg_reg(AA8_3430_USB2HS_PHY_CLK);
198 - omap_cfg_reg(AA9_3430_USB2HS_PHY_DIR);
199 - omap_cfg_reg(AB11_3430_USB2HS_PHY_NXT);
200 - omap_cfg_reg(AB10_3430_USB2HS_PHY_DATA0);
201 - omap_cfg_reg(AB9_3430_USB2HS_PHY_DATA1);
202 - omap_cfg_reg(W3_3430_USB2HS_PHY_DATA2);
203 - omap_cfg_reg(T4_3430_USB2HS_PHY_DATA3);
204 - omap_cfg_reg(T3_3430_USB2HS_PHY_DATA4);
205 - omap_cfg_reg(R3_3430_USB2HS_PHY_DATA5);
206 - omap_cfg_reg(R4_3430_USB2HS_PHY_DATA6);
207 - omap_cfg_reg(T2_3430_USB2HS_PHY_DATA7);
208 -
209 - } else {
210 - /* Set Func mux for :
211 - * TLL mode of operation
212 - * 12-pin ULPI SDR TLL mode for Port1/2/3
213 - */
214 -
215 - /* Port1 */
216 + break;
217 + case EHCI_HCD_OMAP_MODE_TLL:
218 omap_cfg_reg(Y9_3430_USB1HS_TLL_STP);
219 omap_cfg_reg(Y8_3430_USB1HS_TLL_CLK);
220 omap_cfg_reg(AA14_3430_USB1HS_TLL_DIR);
221 @@ -122,8 +98,29 @@ static void setup_ehci_io_mux(enum ehci_hcd_omap_mode phy_mode)
222 omap_cfg_reg(Y12_3430_USB1HS_TLL_DATA5);
223 omap_cfg_reg(W8_3430_USB1HS_TLL_DATA6);
224 omap_cfg_reg(Y13_3430_USB1HS_TLL_DATA7);
225 + break;
226 + case EHCI_HCD_OMAP_MODE_UNKNOWN:
227 + /* FALLTHROUGH */
228 + default:
229 + break;
230 + }
231
232 - /* Port2 */
233 + switch (port_mode[1]) {
234 + case EHCI_HCD_OMAP_MODE_PHY:
235 + omap_cfg_reg(AA10_3430_USB2HS_PHY_STP);
236 + omap_cfg_reg(AA8_3430_USB2HS_PHY_CLK);
237 + omap_cfg_reg(AA9_3430_USB2HS_PHY_DIR);
238 + omap_cfg_reg(AB11_3430_USB2HS_PHY_NXT);
239 + omap_cfg_reg(AB10_3430_USB2HS_PHY_DATA0);
240 + omap_cfg_reg(AB9_3430_USB2HS_PHY_DATA1);
241 + omap_cfg_reg(W3_3430_USB2HS_PHY_DATA2);
242 + omap_cfg_reg(T4_3430_USB2HS_PHY_DATA3);
243 + omap_cfg_reg(T3_3430_USB2HS_PHY_DATA4);
244 + omap_cfg_reg(R3_3430_USB2HS_PHY_DATA5);
245 + omap_cfg_reg(R4_3430_USB2HS_PHY_DATA6);
246 + omap_cfg_reg(T2_3430_USB2HS_PHY_DATA7);
247 + break;
248 + case EHCI_HCD_OMAP_MODE_TLL:
249 omap_cfg_reg(AA10_3430_USB2HS_TLL_STP);
250 omap_cfg_reg(AA8_3430_USB2HS_TLL_CLK);
251 omap_cfg_reg(AA9_3430_USB2HS_TLL_DIR);
252 @@ -136,8 +133,18 @@ static void setup_ehci_io_mux(enum ehci_hcd_omap_mode phy_mode)
253 omap_cfg_reg(R3_3430_USB2HS_TLL_DATA5);
254 omap_cfg_reg(R4_3430_USB2HS_TLL_DATA6);
255 omap_cfg_reg(T2_3430_USB2HS_TLL_DATA7);
256 + break;
257 + case EHCI_HCD_OMAP_MODE_UNKNOWN:
258 + /* FALLTHROUGH */
259 + default:
260 + break;
261 + }
262
263 - /* Port3 */
264 + switch (port_mode[2]) {
265 + case EHCI_HCD_OMAP_MODE_PHY:
266 + printk(KERN_WARNING "Port3 can't be used in PHY mode\n");
267 + break;
268 + case EHCI_HCD_OMAP_MODE_TLL:
269 omap_cfg_reg(AB3_3430_USB3HS_TLL_STP);
270 omap_cfg_reg(AA6_3430_USB3HS_TLL_CLK);
271 omap_cfg_reg(AA3_3430_USB3HS_TLL_DIR);
272 @@ -150,28 +157,23 @@ static void setup_ehci_io_mux(enum ehci_hcd_omap_mode phy_mode)
273 omap_cfg_reg(AB13_3430_USB3HS_TLL_DATA5);
274 omap_cfg_reg(AA13_3430_USB3HS_TLL_DATA6);
275 omap_cfg_reg(AA12_3430_USB3HS_TLL_DATA7);
276 + break;
277 + case EHCI_HCD_OMAP_MODE_UNKNOWN:
278 + /* FALLTHROUGH */
279 + default:
280 + break;
281 }
282
283 return;
284 }
285
286 -static struct ehci_hcd_omap_platform_data pdata __initconst;
287 -
288 -void __init usb_ehci_init(enum ehci_hcd_omap_mode phy_mode,
289 - int chargepump, int phy_reset, int reset_gpio_port1,
290 - int reset_gpio_port2)
291 +void __init usb_ehci_init(struct ehci_hcd_omap_platform_data *pdata)
292 {
293 - pdata.phy_mode = phy_mode;
294 - pdata.chargepump = chargepump;
295 - pdata.phy_reset = phy_reset;
296 - pdata.reset_gpio_port1 = reset_gpio_port1;
297 - pdata.reset_gpio_port2 = reset_gpio_port2;
298 -
299 - platform_device_add_data(&ehci_device, &pdata, sizeof(pdata));
300 + platform_device_add_data(&ehci_device, pdata, sizeof(*pdata));
301
302 /* Setup Pin IO MUX for EHCI */
303 if (cpu_is_omap34xx())
304 - setup_ehci_io_mux(phy_mode);
305 + setup_ehci_io_mux(pdata->port_mode);
306
307 if (platform_device_register(&ehci_device) < 0) {
308 printk(KERN_ERR "Unable to register HS-USB (EHCI) device\n");
309 @@ -181,9 +183,8 @@ void __init usb_ehci_init(enum ehci_hcd_omap_mode phy_mode,
310
311 #else
312
313 -void __init usb_ehci_init(enum ehci_hcd_omap_mode phy_mode,
314 - int chargepump, int phy_reset, int reset_gpio_port1,
315 - int reset_gpio_port2)
316 +void __init usb_ehci_init(struct ehci_hcd_omap_platform_data *pdata)
317 +
318 {
319 }
320
321 diff --git a/arch/arm/plat-omap/include/mach/usb.h b/arch/arm/plat-omap/include/mach/usb.h
322 index 1b1366c..d1b14cc 100644
323 --- a/arch/arm/plat-omap/include/mach/usb.h
324 +++ b/arch/arm/plat-omap/include/mach/usb.h
325 @@ -5,6 +5,7 @@
326
327 #include <mach/board.h>
328
329 +#define OMAP3_HS_USB_PORTS 3
330 enum ehci_hcd_omap_mode {
331 EHCI_HCD_OMAP_MODE_UNKNOWN,
332 EHCI_HCD_OMAP_MODE_PHY,
333 @@ -12,13 +13,12 @@ enum ehci_hcd_omap_mode {
334 };
335
336 struct ehci_hcd_omap_platform_data {
337 - enum ehci_hcd_omap_mode phy_mode;
338 + enum ehci_hcd_omap_mode port_mode[OMAP3_HS_USB_PORTS];
339 unsigned chargepump:1;
340 unsigned phy_reset:1;
341
342 - /* have to be valid if phy_reset is true */
343 - int reset_gpio_port1;
344 - int reset_gpio_port2;
345 + /* have to be valid if phy_reset is true and portx is in phy mode */
346 + int reset_gpio_port[OMAP3_HS_USB_PORTS];
347 };
348
349 /*-------------------------------------------------------------------------*/
350 @@ -45,9 +45,7 @@ struct ehci_hcd_omap_platform_data {
351
352 extern void usb_musb_init(void);
353
354 -extern void usb_ehci_init(enum ehci_hcd_omap_mode phy_mode,
355 - int chargepump, int phy_reset, int reset_gpio_port1,
356 - int reset_gpio_port2);
357 +extern void usb_ehci_init(struct ehci_hcd_omap_platform_data *pdata);
358
359 #endif
360
361 diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c
362 index c7631f5..3175122 100644
363 --- a/drivers/usb/host/ehci-omap.c
364 +++ b/drivers/usb/host/ehci-omap.c
365 @@ -162,8 +162,7 @@ struct ehci_hcd_omap {
366 */
367
368 /* gpio for resetting phy */
369 - int reset_gpio_port1;
370 - int reset_gpio_port2;
371 + int reset_gpio_port[OMAP3_HS_USB_PORTS];
372
373 /* phy reset workaround */
374 int phy_reset;
375 @@ -172,7 +171,7 @@ struct ehci_hcd_omap {
376 int chargepump;
377
378 /* desired phy_mode: TLL, PHY */
379 - enum ehci_hcd_omap_mode phy_mode;
380 + enum ehci_hcd_omap_mode port_mode[OMAP3_HS_USB_PORTS];
381
382 void __iomem *uhh_base;
383 void __iomem *tll_base;
384 @@ -297,14 +296,16 @@ static int omap_start_ehc(struct ehci_hcd_omap *omap, struct usb_hcd *hcd)
385
386 if (omap->phy_reset) {
387 /* Refer: ISSUE1 */
388 - if (gpio_is_valid(omap->reset_gpio_port1)) {
389 - gpio_request(omap->reset_gpio_port1, "USB1 PHY reset");
390 - gpio_direction_output(omap->reset_gpio_port1, 0);
391 + if (gpio_is_valid(omap->reset_gpio_port[0])) {
392 + gpio_request(omap->reset_gpio_port[0],
393 + "USB1 PHY reset");
394 + gpio_direction_output(omap->reset_gpio_port[0], 0);
395 }
396
397 - if (gpio_is_valid(omap->reset_gpio_port2)) {
398 - gpio_request(omap->reset_gpio_port2, "USB2 PHY reset");
399 - gpio_direction_output(omap->reset_gpio_port2, 0);
400 + if (gpio_is_valid(omap->reset_gpio_port[1])) {
401 + gpio_request(omap->reset_gpio_port[1],
402 + "USB2 PHY reset");
403 + gpio_direction_output(omap->reset_gpio_port[1], 0);
404 }
405
406 /* Hold the PHY in RESET for enough time till DIR is high */
407 @@ -361,7 +362,10 @@ static int omap_start_ehc(struct ehci_hcd_omap *omap, struct usb_hcd *hcd)
408
409 ehci_omap_writel(omap->uhh_base, OMAP_UHH_SYSCONFIG, reg);
410
411 - if (omap->phy_mode == EHCI_HCD_OMAP_MODE_PHY) {
412 + if ((omap->port_mode[0] == EHCI_HCD_OMAP_MODE_PHY) ||
413 + (omap->port_mode[1] == EHCI_HCD_OMAP_MODE_PHY) ||
414 + (omap->port_mode[2] == EHCI_HCD_OMAP_MODE_PHY)) {
415 +
416 reg = ehci_omap_readl(omap->uhh_base, OMAP_UHH_HOSTCONFIG);
417
418 reg |= (OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN
419 @@ -374,7 +378,9 @@ static int omap_start_ehc(struct ehci_hcd_omap *omap, struct usb_hcd *hcd)
420 ehci_omap_writel(omap->uhh_base, OMAP_UHH_HOSTCONFIG, reg);
421 dev_dbg(omap->dev, "Entered ULPI PHY MODE: success\n");
422
423 - } else if (omap->phy_mode == EHCI_HCD_OMAP_MODE_TLL) {
424 + } else if ((omap->port_mode[0] == EHCI_HCD_OMAP_MODE_TLL) ||
425 + (omap->port_mode[1] == EHCI_HCD_OMAP_MODE_TLL) ||
426 + (omap->port_mode[2] == EHCI_HCD_OMAP_MODE_TLL)) {
427
428 /* Enable UTMI mode for all 3 TLL channels */
429 omap_usb_utmi_init(omap,
430 @@ -396,11 +402,11 @@ static int omap_start_ehc(struct ehci_hcd_omap *omap, struct usb_hcd *hcd)
431 */
432 udelay(10);
433
434 - if (gpio_is_valid(omap->reset_gpio_port1))
435 - gpio_set_value(omap->reset_gpio_port1, 1);
436 + if (gpio_is_valid(omap->reset_gpio_port[0]))
437 + gpio_set_value(omap->reset_gpio_port[0], 1);
438
439 - if (gpio_is_valid(omap->reset_gpio_port2))
440 - gpio_set_value(omap->reset_gpio_port2, 1);
441 + if (gpio_is_valid(omap->reset_gpio_port[1]))
442 + gpio_set_value(omap->reset_gpio_port[1], 1);
443 }
444
445 if (omap->chargepump) {
446 @@ -438,11 +444,11 @@ err_tll_fck:
447 clk_put(omap->usbhost1_48m_fck);
448
449 if (omap->phy_reset) {
450 - if (gpio_is_valid(omap->reset_gpio_port1))
451 - gpio_free(omap->reset_gpio_port1);
452 + if (gpio_is_valid(omap->reset_gpio_port[0]))
453 + gpio_free(omap->reset_gpio_port[0]);
454
455 - if (gpio_is_valid(omap->reset_gpio_port2))
456 - gpio_free(omap->reset_gpio_port2);
457 + if (gpio_is_valid(omap->reset_gpio_port[1]))
458 + gpio_free(omap->reset_gpio_port[1]);
459 }
460
461 err_host_48m_fck:
462 @@ -531,11 +537,11 @@ static void omap_stop_ehc(struct ehci_hcd_omap *omap, struct usb_hcd *hcd)
463 }
464
465 if (omap->phy_reset) {
466 - if (gpio_is_valid(omap->reset_gpio_port1))
467 - gpio_free(omap->reset_gpio_port1);
468 + if (gpio_is_valid(omap->reset_gpio_port[0]))
469 + gpio_free(omap->reset_gpio_port[0]);
470
471 - if (gpio_is_valid(omap->reset_gpio_port2))
472 - gpio_free(omap->reset_gpio_port2);
473 + if (gpio_is_valid(omap->reset_gpio_port[1]))
474 + gpio_free(omap->reset_gpio_port[1]);
475 }
476
477 dev_dbg(omap->dev, "Clock to USB host has been disabled\n");
478 @@ -590,10 +596,13 @@ static int ehci_hcd_omap_probe(struct platform_device *pdev)
479 platform_set_drvdata(pdev, omap);
480 omap->dev = &pdev->dev;
481 omap->phy_reset = pdata->phy_reset;
482 - omap->reset_gpio_port1 = pdata->reset_gpio_port1;
483 - omap->reset_gpio_port2 = pdata->reset_gpio_port2;
484 - omap->phy_mode = pdata->phy_mode;
485 - omap->chargepump = pdata->chargepump;
486 + omap->reset_gpio_port[0] = pdata->reset_gpio_port[0];
487 + omap->reset_gpio_port[1] = pdata->reset_gpio_port[1];
488 + omap->reset_gpio_port[2] = pdata->reset_gpio_port[2];
489 + omap->port_mode[0] = pdata->port_mode[0];
490 + omap->port_mode[1] = pdata->port_mode[1];
491 + omap->port_mode[2] = pdata->port_mode[2];
492 + omap->chargepump = pdata->chargepump;
493 omap->ehci = hcd_to_ehci(hcd);
494 omap->ehci->sbrn = 0x20;
495
496 --
497 1.6.2.4
498
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