freetype: Add 2.4.3
[openembedded.git] / recipes / gcc / gcc-4.2.2 / arm-crunch-64bit-disable0.patch
blob95abf68a606bf1184fb1a171c7974348b0d231ad
1 diff -ruN /home/hwilliams/openembedded/build/tmp/work/ep9312-angstrom-linux-gnueabi/gcc-cross-4.1.2-r0/gcc-4.1.2/gcc/config/arm/arm.md gcc-4.1.2/gcc/config/arm/arm.md
2 --- /home/hwilliams/openembedded/build/tmp/work/ep9312-angstrom-linux-gnueabi/gcc-cross-4.1.2-r0/gcc-4.1.2/gcc/config/arm/arm.md 2006-09-28 03:10:22.000000000 +1000
3 +++ gcc-4.1.2/gcc/config/arm/arm.md 2007-05-15 09:53:21.000000000 +1000
4 @@ -6865,10 +6877,12 @@
7 ;; Cirrus DI compare instruction
8 +;; This is disabled and left go through ARM core registers, because currently
9 +;; Crunch coprocessor does only signed comparison.
10 (define_expand "cmpdi"
11 [(match_operand:DI 0 "cirrus_fp_register" "")
12 (match_operand:DI 1 "cirrus_fp_register" "")]
13 - "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
14 + "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK & 0"
16 arm_compare_op0 = operands[0];
17 arm_compare_op1 = operands[1];
18 @@ -6879,7 +6893,7 @@
19 [(set (reg:CC CC_REGNUM)
20 (compare:CC (match_operand:DI 0 "cirrus_fp_register" "v")
21 (match_operand:DI 1 "cirrus_fp_register" "v")))]
22 - "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
23 + "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK & 0"
24 "cfcmp64%?\\tr15, %V0, %V1"
25 [(set_attr "type" "mav_farith")
26 (set_attr "cirrus" "compare")]
27 @@ -10105,6 +10119,7 @@
28 [(unspec:SI [(match_operand:SI 0 "register_operand" "")] UNSPEC_PROLOGUE_USE)]
30 "%@ %0 needed for prologue"
31 + [(set_attr "length" "0")]
35 diff -ruN /home/hwilliams/openembedded/build/tmp/work/ep9312-angstrom-linux-gnueabi/gcc-cross-4.1.2-r0/gcc-4.1.2/gcc/config/arm/cirrus.md gcc-4.1.2/gcc/config/arm/cirrus.md
36 --- /home/hwilliams/openembedded/build/tmp/work/ep9312-angstrom-linux-gnueabi/gcc-cross-4.1.2-r0/gcc-4.1.2/gcc/config/arm/cirrus.md 2005-06-25 11:22:41.000000000 +1000
37 +++ gcc-4.1.2/gcc/config/arm/cirrus.md 2007-05-15 09:55:29.000000000 +1000
38 @@ -348,7 +348,8 @@
39 (clobber (match_scratch:DF 2 "=v"))]
40 "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
41 "cftruncd32%?\\t%Y2, %V1\;cfmvr64l%?\\t%0, %Z2"
42 - [(set_attr "length" "8")]
43 + [(set_attr "length" "8")
44 + (set_attr "cirrus" "normal")]
47 (define_insn "*cirrus_truncdfsf2"