recipes/gcc/gcc-3.4.6/gcc34-arm-ldm-peephole.patch

   1 --- gcc-3.4.0/gcc/config/arm/arm.md.arm-ldm-peephole    2004-01-13 08:24:37.000000000 -0500
   2 +++ gcc-3.4.0/gcc/config/arm/arm.md     2004-04-24 18:18:04.000000000 -0400
   3 @@ -8810,13 +8810,16 @@
   4     (set_attr "length" "4,8,8")]
   5  )
   6
   7 +; Try to convert LDR+LDR+arith into [add+]LDM+arith
   8 +; On XScale, LDM is always slower than two LDRs, so only do this if
   9 +; optimising for size.
  10  (define_insn "*arith_adjacentmem"
  11    [(set (match_operand:SI 0 "s_register_operand" "=r")
  12         (match_operator:SI 1 "shiftable_operator"
  13          [(match_operand:SI 2 "memory_operand" "m")
  14           (match_operand:SI 3 "memory_operand" "m")]))
  15     (clobber (match_scratch:SI 4 "=r"))]
  16 -  "TARGET_ARM && adjacent_mem_locations (operands[2], operands[3])"
  17 +  "TARGET_ARM && (!arm_tune_xscale || optimize_size) && adjacent_mem_locations (operands[2], operands[3])"
  18    "*
  19    {
  20      rtx ldm[3];
  21 @@ -8851,6 +8854,8 @@
  22        }
  23     if (val1 && val2)
  24        {
  25 +       /* This would be a loss on a Harvard core, but adjacent_mem_locations()
  26 +          will prevent it from happening.  */
  27         rtx ops[3];
  28         ldm[0] = ops[0] = operands[4];
  29         ops[1] = XEXP (XEXP (operands[2], 0), 0);
  30 --- gcc-3.4.0/gcc/genpeep.c.arm-ldm-peephole    2003-07-05 01:27:22.000000000 -0400
  31 +++ gcc-3.4.0/gcc/genpeep.c     2004-04-24 18:18:04.000000000 -0400
  32 @@ -381,6 +381,7 @@
  33    printf ("#include \"recog.h\"\n");
  34    printf ("#include \"except.h\"\n\n");
  35    printf ("#include \"function.h\"\n\n");
  36 +  printf ("#include \"flags.h\"\n\n");
  37
  38    printf ("#ifdef HAVE_peephole\n");
  39    printf ("extern rtx peep_operand[];\n\n");
  40 --- gcc/gcc/config/arm/arm.c.orig       2005-06-02 22:40:40.000000000 +0100
  41 +++ gcc/gcc/config/arm/arm.c    2005-06-02 22:45:45.000000000 +0100
  42 @@ -4610,9 +4610,12 @@
  43        if (arm_eliminable_register (reg0))
  44         return 0;
  45
  46 +      /* For Harvard cores, only accept pairs where one offset is zero.
  47 +         See comment in load_multiple_sequence.  */
  48        val_diff = val1 - val0;
  49        return ((REGNO (reg0) == REGNO (reg1))
  50 -             && (val_diff == 4 || val_diff == -4));
  51 +             && (val_diff == 4 || val_diff == -4))
  52 +             && (!arm_ld_sched || val0 == 0 || val1 == 0);
  53      }
  54
  55    return 0;
  56 @@ -4857,6 +4860,11 @@
  57        *load_offset = unsorted_offsets[order[0]];
  58      }
  59
  60 +  /* For XScale a two-word LDM is a performance loss, so only do this if
  61 +     size is more important.  See comments in arm_gen_load_multiple.  */
  62 +  if (nops == 2 && arm_tune_xscale && !optimize_size)
  63 +    return 0;
  64 +
  65    if (unsorted_offsets[order[0]] == 0)
  66      return 1; /* ldmia */
  67
  68 @@ -5083,6 +5091,11 @@
  69        *load_offset = unsorted_offsets[order[0]];
  70      }
  71
  72 +  /* For XScale a two-word LDM is a performance loss, so only do this if
  73 +     size is more important.  See comments in arm_gen_load_multiple.  */
  74 +  if (nops == 2 && arm_tune_xscale && !optimize_size)
  75 +    return 0;
  76 +
  77    if (unsorted_offsets[order[0]] == 0)
  78      return 1; /* stmia */
  79