gdk-pixbuf-csource-native (2.12.11): Switch to FILESPATHPKG
[openembedded.git] / recipes / snes9x / 64bit.patch
bloba8388de0a2c9ce96aca06afd443ff522b58c0a4f
1 --- s/offsets.cpp~ 2004-07-11 22:50:59.000000000 +0100
2 +++ s/offsets.cpp 2008-07-27 10:28:40.000000000 +0100
3 @@ -100,30 +100,30 @@
4 #endif
6 #define OFFSET(N,F) \
7 -fprintf (S9xSTREAM, "#define " #N " CPU + %d\n", (int) &((struct SCPUState *) 0)->F);
8 +fprintf (S9xSTREAM, "#define " #N " CPU + %d\n", &((struct SCPUState *) 0)->F);
9 #define OFFSET2(N,F) \
10 -fprintf (S9xSTREAM, "#define " #N " Registers + %d\n", (int) &((struct SRegisters *) 0)->F);
11 +fprintf (S9xSTREAM, "#define " #N " Registers + %d\n", &((struct SRegisters *) 0)->F);
12 #define OFFSET3(F) \
13 -fprintf (S9xSTREAM, "#define " #F " Memory + %d\n", (int) &((class CMemory *) 0)->F);
14 +fprintf (S9xSTREAM, "#define " #F " Memory + %d\n", &((class CMemory *) 0)->F);
15 #define OFFSET4(N,F) \
16 -fprintf (S9xSTREAM, "#define " #N " APU + %d\n", (int) &((struct SAPU *) 0)->F);
17 +fprintf (S9xSTREAM, "#define " #N " APU + %d\n", &((struct SAPU *) 0)->F);
18 #define OFFSET5(N,F) \
19 -fprintf (S9xSTREAM, "#define " #N " IAPU + %d\n", (int) &((struct SIAPU *) 0)->F);
20 +fprintf (S9xSTREAM, "#define " #N " IAPU + %d\n", &((struct SIAPU *) 0)->F);
21 #define OFFSET6(N,F) \
22 -fprintf (S9xSTREAM, "#define " #N " ICPU + %d\n", (int) &((struct SICPU *) 0)->F);
23 +fprintf (S9xSTREAM, "#define " #N " ICPU + %d\n", &((struct SICPU *) 0)->F);
24 #define OFFSET7(N,F) \
25 -fprintf (S9xSTREAM, "#define " #N " Settings + %d\n", (int) &((struct SSettings *) 0)->F);
26 +fprintf (S9xSTREAM, "#define " #N " Settings + %d\n", &((struct SSettings *) 0)->F);
27 #define OFFSET8(N, F) \
28 -fprintf (S9xSTREAM, "#define " #N " APURegisters + %d\n", (int) &((struct SAPURegisters *) 0)->F);
29 +fprintf (S9xSTREAM, "#define " #N " APURegisters + %d\n", &((struct SAPURegisters *) 0)->F);
31 #define OFFSET9(N, F) \
32 -fprintf (S9xSTREAM, "#define " #N " PPU + %d\n", (int) &((struct SPPU *) 0)->F);
33 +fprintf (S9xSTREAM, "#define " #N " PPU + %d\n", &((struct SPPU *) 0)->F);
34 #define OFFSET10(N, F) \
35 -fprintf (S9xSTREAM, "#define " #N " IPPU + %d\n", (int) &((struct InternalPPU *) 0)->F);
36 +fprintf (S9xSTREAM, "#define " #N " IPPU + %d\n", &((struct InternalPPU *) 0)->F);
37 #define OFFSET11(N, F) \
38 -fprintf (S9xSTREAM, "#define " #N " SA1 + %d\n", (int) &((struct SSA1 *) 0)->F);
39 +fprintf (S9xSTREAM, "#define " #N " SA1 + %d\n", &((struct SSA1 *) 0)->F);
40 #define OFFSET12(N, F) \
41 -fprintf (S9xSTREAM, "#define " #N " SA1Registers + %d\n", (int) &((struct SSA1Registers *) 0)->F);
42 +fprintf (S9xSTREAM, "#define " #N " SA1Registers + %d\n", &((struct SSA1Registers *) 0)->F);
44 int main (int /*argc*/, char ** /*argv*/)
46 --- s/getset.h~ 2004-07-11 22:50:58.000000000 +0100
47 +++ s/getset.h 2008-07-27 10:30:38.000000000 +0100
48 @@ -120,7 +120,7 @@
49 return (*(GetAddress + (Address & 0xffff)));
52 - switch ((int) GetAddress)
53 + switch ((long)GetAddress)
55 case CMemory::MAP_PPU:
56 return (S9xGetPPU (Address & 0xffff));
57 @@ -225,7 +225,7 @@
58 #endif
61 - switch ((int) GetAddress)
62 + switch ((long) GetAddress)
64 case CMemory::MAP_PPU:
65 return (S9xGetPPU (Address & 0xffff) |
66 @@ -349,7 +349,7 @@
67 return;
70 - switch ((int) SetAddress)
71 + switch ((long) SetAddress)
73 case CMemory::MAP_PPU:
74 S9xSetPPU (Byte, Address & 0xffff);
75 @@ -482,7 +482,7 @@
76 return;
79 - switch ((int) SetAddress)
80 + switch ((long) SetAddress)
82 case CMemory::MAP_PPU:
83 S9xSetPPU ((uint8) Word, Address & 0xffff);
84 @@ -603,7 +603,7 @@
86 return s7r.bank50;
88 - switch ((int) GetAddress)
89 + switch ((long) GetAddress)
91 case CMemory::MAP_SPC7110_DRAM:
92 #ifdef SPC7110_DEBUG
93 @@ -669,7 +669,7 @@
94 if(Settings.SPC7110&&((Address&0x7FFFFF)==0x4800))
95 return s7r.bank50;
97 - switch ((int) GetAddress)
98 + switch ((long) GetAddress)
100 case CMemory::MAP_SPC7110_DRAM:
101 #ifdef SPC7110_DEBUG
102 @@ -729,7 +729,7 @@
103 return;
106 - switch ((int) GetAddress)
107 + switch ((long) GetAddress)
109 case CMemory::MAP_PPU:
110 CPU.PCBase = Memory.FillRAM;