base.bbclass: add support for SOC_FAMILY in COMPATIBLE_MACHINES
[openembedded.git] / recipes / boost / files / arm-intrinsics.patch
blob1f1eed684a61ad214d2a6cdfb159c038a70ff4d7
1 diff -Nurd boost_1_36_0.orig/boost/detail/atomic_count_sync.hpp boost_1_36_0.arm/boost/detail/atomic_count_sync.hpp
2 --- boost_1_36_0.orig/boost/detail/atomic_count_sync.hpp 2007-11-23 12:03:14.000000000 -0500
3 +++ boost_1_36_0.arm/boost/detail/atomic_count_sync.hpp 2008-09-09 13:15:21.000000000 -0400
4 @@ -29,17 +29,46 @@
6 void operator++()
8 +#if defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_6J__)
9 + int v1, tmp;
10 + asm volatile ("1: \n\t"
11 + "ldrex %0, %1 \n\t"
12 + "add %0 ,%0, #1 \n\t"
13 + "strex %2, %0, %1 \n\t"
14 + "cmp %2, #0 \n\t"
15 + "bne 1b \n\t"
16 + : "=&r" (v1), "+Q"(value_), "=&r"(tmp)
17 + );
18 +#else
19 __sync_add_and_fetch( &value_, 1 );
20 +#endif
23 long operator--()
25 +#if defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_6J__)
26 + int v1, tmp;
27 + asm volatile ("1: \n\t"
28 + "ldrex %0, %1 \n\t"
29 + "sub %0 ,%0, #1 \n\t"
30 + "strex %2, %0, %1 \n\t"
31 + "cmp %2, #0 \n\t"
32 + "bne 1b \n\t"
33 + : "=&r" (v1), "+Q"(value_), "=&r"(tmp)
34 + );
35 + return value_;
36 +#else
37 return __sync_add_and_fetch( &value_, -1 );
38 +#endif
41 operator long() const
43 +#if defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_6J__)
44 + return value_;
45 +#else
46 return __sync_fetch_and_add( &value_, 0 );
47 +#endif
50 private:
51 Binary files boost_1_36_0.orig/boost/detail/.atomic_count_sync.hpp.swp and boost_1_36_0.arm/boost/detail/.atomic_count_sync.hpp.swp differ