| blob | 2ce948c82cfb556a133efcd1486f30cdd750c3fb |
1 diff -Nur gcc-10.3.0.orig/gcc/config/sparc/sparc.c gcc-10.3.0/gcc/config/sparc/sparc.c
2 --- gcc-10.3.0.orig/gcc/config/sparc/sparc.c 2021-04-08 13:56:28.201742273 +0200
3 +++ gcc-10.3.0/gcc/config/sparc/sparc.c 2022-01-24 10:19:53.724121161 +0100
4 @@ -4157,6 +4157,13 @@
5 static bool
6 sparc_cannot_force_const_mem (machine_mode mode, rtx x)
7 {
8 + /* After IRA has run in PIC mode, it is too late to put anything into the
9 + constant pool if the PIC register hasn't already been initialized. */
10 + if ((lra_in_progress || reload_in_progress)
11 + && flag_pic
12 + && !crtl->uses_pic_offset_table)
13 + return true;
14 +
15 switch (GET_CODE (x))
16 {
17 case CONST_INT:
18 @@ -4192,11 +4199,9 @@
19 }
20 \f
21 /* Global Offset Table support. */
22 -static GTY(()) rtx got_symbol_rtx = NULL_RTX;
23 -static GTY(()) rtx got_register_rtx = NULL_RTX;
24 static GTY(()) rtx got_helper_rtx = NULL_RTX;
25 -
26 -static GTY(()) bool got_helper_needed = false;
27 +static GTY(()) rtx got_register_rtx = NULL_RTX;
28 +static GTY(()) rtx got_symbol_rtx = NULL_RTX;
30 /* Return the SYMBOL_REF for the Global Offset Table. */
32 @@ -4209,6 +4214,27 @@
33 return got_symbol_rtx;
34 }
36 +#ifdef HAVE_GAS_HIDDEN
37 +# define USE_HIDDEN_LINKONCE 1
38 +#else
39 +# define USE_HIDDEN_LINKONCE 0
40 +#endif
41 +
42 +static void
43 +get_pc_thunk_name (char name[32], unsigned int regno)
44 +{
45 + const char *reg_name = reg_names[regno];
46 +
47 + /* Skip the leading '%' as that cannot be used in a
48 + symbol name. */
49 + reg_name += 1;
50 +
51 + if (USE_HIDDEN_LINKONCE)
52 + sprintf (name, "__sparc_get_pc_thunk.%s", reg_name);
53 + else
54 + ASM_GENERATE_INTERNAL_LABEL (name, "LADDPC", regno);
55 +}
56 +
57 /* Wrapper around the load_pcrel_sym{si,di} patterns. */
59 static rtx
60 @@ -4228,78 +4254,30 @@
61 return insn;
62 }
64 -/* Output the load_pcrel_sym{si,di} patterns. */
65 -
66 -const char *
67 -output_load_pcrel_sym (rtx *operands)
68 -{
69 - if (flag_delayed_branch)
70 - {
71 - output_asm_insn ("sethi\t%%hi(%a1-4), %0", operands);
72 - output_asm_insn ("call\t%a2", operands);
73 - output_asm_insn (" add\t%0, %%lo(%a1+4), %0", operands);
74 - }
75 - else
76 - {
77 - output_asm_insn ("sethi\t%%hi(%a1-8), %0", operands);
78 - output_asm_insn ("add\t%0, %%lo(%a1-4), %0", operands);
79 - output_asm_insn ("call\t%a2", operands);
80 - output_asm_insn (" nop", NULL);
81 - }
82 -
83 - if (operands[2] == got_helper_rtx)
84 - got_helper_needed = true;
85 -
86 - return "";
87 -}
88 -
89 -#ifdef HAVE_GAS_HIDDEN
90 -# define USE_HIDDEN_LINKONCE 1
91 -#else
92 -# define USE_HIDDEN_LINKONCE 0
93 -#endif
94 -
95 /* Emit code to load the GOT register. */
97 void
98 load_got_register (void)
99 {
100 - rtx insn;
101 + if (!got_register_rtx)
102 + got_register_rtx = gen_rtx_REG (Pmode, GLOBAL_OFFSET_TABLE_REGNUM);
104 if (TARGET_VXWORKS_RTP)
105 - {
106 - if (!got_register_rtx)
107 - got_register_rtx = pic_offset_table_rtx;
108 -
109 - insn = gen_vxworks_load_got ();
110 - }
111 + emit_insn (gen_vxworks_load_got ());
112 else
113 {
114 - if (!got_register_rtx)
115 - got_register_rtx = gen_rtx_REG (Pmode, GLOBAL_OFFSET_TABLE_REGNUM);
116 -
117 /* The GOT symbol is subject to a PC-relative relocation so we need a
118 helper function to add the PC value and thus get the final value. */
119 if (!got_helper_rtx)
120 {
121 char name[32];
122 -
123 - /* Skip the leading '%' as that cannot be used in a symbol name. */
124 - if (USE_HIDDEN_LINKONCE)
125 - sprintf (name, "__sparc_get_pc_thunk.%s",
126 - reg_names[REGNO (got_register_rtx)] + 1);
127 - else
128 - ASM_GENERATE_INTERNAL_LABEL (name, "LADDPC",
129 - REGNO (got_register_rtx));
130 -
131 + get_pc_thunk_name (name, GLOBAL_OFFSET_TABLE_REGNUM);
132 got_helper_rtx = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (name));
133 }
135 - insn
136 - = gen_load_pcrel_sym (got_register_rtx, sparc_got (), got_helper_rtx);
137 + emit_insn (gen_load_pcrel_sym (got_register_rtx, sparc_got (),
138 + got_helper_rtx));
139 }
140 -
141 - emit_insn (insn);
142 }
144 /* Ensure that we are not using patterns that are not OK with PIC. */
145 @@ -5464,7 +5442,7 @@
146 return true;
148 /* GOT register (%l7) if needed. */
149 - if (got_register_rtx && regno == REGNO (got_register_rtx))
150 + if (regno == GLOBAL_OFFSET_TABLE_REGNUM && got_register_rtx)
151 return true;
153 /* If the function accesses prior frames, the frame pointer and the return
154 @@ -12507,9 +12485,10 @@
155 sparc_file_end (void)
156 {
157 /* If we need to emit the special GOT helper function, do so now. */
158 - if (got_helper_needed)
159 + if (got_helper_rtx)
160 {
161 const char *name = XSTR (got_helper_rtx, 0);
162 + const char *reg_name = reg_names[GLOBAL_OFFSET_TABLE_REGNUM];
163 #ifdef DWARF2_UNWIND_INFO
164 bool do_cfi;
165 #endif
166 @@ -12546,22 +12525,17 @@
167 #ifdef DWARF2_UNWIND_INFO
168 do_cfi = dwarf2out_do_cfi_asm ();
169 if (do_cfi)
170 - output_asm_insn (".cfi_startproc", NULL);
171 + fprintf (asm_out_file, "\t.cfi_startproc\n");
172 #endif
173 if (flag_delayed_branch)
174 - {
175 - output_asm_insn ("jmp\t%%o7+8", NULL);
176 - output_asm_insn (" add\t%%o7, %0, %0", &got_register_rtx);
177 - }
178 + fprintf (asm_out_file, "\tjmp\t%%o7+8\n\t add\t%%o7, %s, %s\n",
179 + reg_name, reg_name);
180 else
181 - {
182 - output_asm_insn ("add\t%%o7, %0, %0", &got_register_rtx);
183 - output_asm_insn ("jmp\t%%o7+8", NULL);
184 - output_asm_insn (" nop", NULL);
185 - }
186 + fprintf (asm_out_file, "\tadd\t%%o7, %s, %s\n\tjmp\t%%o7+8\n\t nop\n",
187 + reg_name, reg_name);
188 #ifdef DWARF2_UNWIND_INFO
189 if (do_cfi)
190 - output_asm_insn (".cfi_endproc", NULL);
191 + fprintf (asm_out_file, "\t.cfi_endproc\n");
192 #endif
193 }
195 @@ -13056,10 +13030,7 @@
196 edge entry_edge;
197 rtx_insn *seq;
199 - /* In PIC mode, we need to always initialize the PIC register if optimization
200 - is enabled, because we are called from IRA and LRA may later force things
201 - to the constant pool for optimization purposes. */
202 - if (!flag_pic || (!crtl->uses_pic_offset_table && !optimize))
203 + if (!crtl->uses_pic_offset_table)
204 return;
206 start_sequence ();
207 diff -Nur gcc-10.3.0.orig/gcc/config/sparc/sparc.md gcc-10.3.0/gcc/config/sparc/sparc.md
208 --- gcc-10.3.0.orig/gcc/config/sparc/sparc.md 2021-04-08 13:56:28.205742322 +0200
209 +++ gcc-10.3.0/gcc/config/sparc/sparc.md 2022-01-24 10:19:54.504102046 +0100
210 @@ -1601,7 +1601,10 @@
211 (clobber (reg:P O7_REG))]
212 "REGNO (operands[0]) == INTVAL (operands[3])"
213 {
214 - return output_load_pcrel_sym (operands);
215 + if (flag_delayed_branch)
216 + return "sethi\t%%hi(%a1-4), %0\n\tcall\t%a2\n\t add\t%0, %%lo(%a1+4), %0";
217 + else
218 + return "sethi\t%%hi(%a1-8), %0\n\tadd\t%0, %%lo(%a1-4), %0\n\tcall\t%a2\n\t nop";
219 }
220 [(set (attr "type") (const_string "multi"))
221 (set (attr "length")
222 diff -Nur gcc-10.3.0.orig/gcc/config/sparc/sparc-protos.h gcc-10.3.0/gcc/config/sparc/sparc-protos.h
223 --- gcc-10.3.0.orig/gcc/config/sparc/sparc-protos.h 2021-04-08 13:56:28.201742273 +0200
224 +++ gcc-10.3.0/gcc/config/sparc/sparc-protos.h 2022-01-24 10:19:54.548100968 +0100
225 @@ -69,7 +69,6 @@
226 extern void sparc_split_mem_reg (rtx, rtx, machine_mode);
227 extern int sparc_split_reg_reg_legitimate (rtx, rtx);
228 extern void sparc_split_reg_reg (rtx, rtx, machine_mode);
229 -extern const char *output_load_pcrel_sym (rtx *);
230 extern const char *output_ubranch (rtx, rtx_insn *);
231 extern const char *output_cbranch (rtx, rtx, int, int, int, rtx_insn *);
232 extern const char *output_return (rtx_insn *);
233 diff -Nur gcc-10.3.0.orig/gcc/testsuite/gcc.c-torture/compile/20191108-1.c gcc-10.3.0/gcc/testsuite/gcc.c-torture/compile/20191108-1.c
234 --- gcc-10.3.0.orig/gcc/testsuite/gcc.c-torture/compile/20191108-1.c 2021-04-08 13:56:28.929751064 +0200
235 +++ gcc-10.3.0/gcc/testsuite/gcc.c-torture/compile/20191108-1.c 1970-01-01 01:00:00.000000000 +0100
236 @@ -1,14 +0,0 @@
237 -/* PR target/92095 */
238 -/* Testcase by Sergei Trofimovich <slyfox@inbox.ru> */
239 -
240 -typedef union {
241 - double a;
242 - int b[2];
243 -} c;
244 -
245 -double d(int e)
246 -{
247 - c f;
248 - (&f)->b[0] = 15728640;
249 - return e ? -(&f)->a : (&f)->a;
250 -}
251 diff -Nur gcc-10.3.0.orig/gcc/testsuite/gcc.target/sparc/overflow-3.c gcc-10.3.0/gcc/testsuite/gcc.target/sparc/overflow-3.c
252 --- gcc-10.3.0.orig/gcc/testsuite/gcc.target/sparc/overflow-3.c 2021-04-08 13:56:29.453757389 +0200
253 +++ gcc-10.3.0/gcc/testsuite/gcc.target/sparc/overflow-3.c 2022-01-24 10:19:54.688097536 +0100
254 @@ -1,6 +1,6 @@
255 /* { dg-do compile } */
256 /* { dg-require-effective-target lp64 } */
257 -/* { dg-options "-O -fno-pie" } */
258 +/* { dg-options "-O" } */
260 #include <stdbool.h>
261 #include <stdint.h>
262 diff -Nur gcc-10.3.0.orig/gcc/testsuite/gcc.target/sparc/overflow-4.c gcc-10.3.0/gcc/testsuite/gcc.target/sparc/overflow-4.c
263 --- gcc-10.3.0.orig/gcc/testsuite/gcc.target/sparc/overflow-4.c 2021-04-08 13:56:29.453757389 +0200
264 +++ gcc-10.3.0/gcc/testsuite/gcc.target/sparc/overflow-4.c 2022-01-24 10:19:55.336081656 +0100
265 @@ -1,6 +1,6 @@
266 /* { dg-do compile } */
267 /* { dg-require-effective-target lp64 } */
268 -/* { dg-options "-O -fno-pie -mno-vis3 -mno-vis4" } */
269 +/* { dg-options "-O -mno-vis3 -mno-vis4" } */
271 #include <stdbool.h>
272 #include <stdint.h>
273 diff -Nur gcc-10.3.0.orig/gcc/testsuite/gcc.target/sparc/overflow-5.c gcc-10.3.0/gcc/testsuite/gcc.target/sparc/overflow-5.c
274 --- gcc-10.3.0.orig/gcc/testsuite/gcc.target/sparc/overflow-5.c 2021-04-08 13:56:29.453757389 +0200
275 +++ gcc-10.3.0/gcc/testsuite/gcc.target/sparc/overflow-5.c 2022-01-24 10:19:55.336081656 +0100
276 @@ -1,6 +1,6 @@
277 /* { dg-do compile } */
278 /* { dg-require-effective-target lp64 } */
279 -/* { dg-options "-O -fno-pie -mvis3" } */
280 +/* { dg-options "-O -mvis3" } */
282 #include <stdbool.h>
283 #include <stdint.h>