gcc/testsuite/gcc.target/arm/vfp-1.c

   1 /* { dg-do compile } */
   2 /* { dg-options "-O2 -mfpu=vfp -mfloat-abi=softfp" } */
   3 /* { dg-require-effective-target arm_vfp_ok } */
   4
   5 extern float fabsf (float);
   6 extern float sqrtf (float);
   7 extern double fabs (double);
   8 extern double sqrt (double);
   9
  10 volatile float f1, f2, f3;
  11
  12 void test_sf() {
  13   /* abssf2_vfp */
  14   /* { dg-final { scan-assembler "fabss" } } */
  15   f1 = fabsf (f1);
  16   /* negsf2_vfp */
  17   /* { dg-final { scan-assembler "fnegs" } } */
  18   f1 = -f1;
  19   /* addsf3_vfp */
  20   /* { dg-final { scan-assembler "fadds" } } */
  21   f1 = f2 + f3;
  22   /* subsf3_vfp */
  23   /* { dg-final { scan-assembler "fsubs" } } */
  24   f1 = f2 - f3;
  25   /* divsf3_vfp */
  26   /* { dg-final { scan-assembler "fdivs" } } */
  27   f1 = f2 / f3;
  28   /* mulsf3_vfp */
  29   /* { dg-final { scan-assembler "fmuls" } } */
  30   f1 = f2 * f3;
  31   /* mulsf3negsf_vfp */
  32   /* { dg-final { scan-assembler "fnmuls" } } */
  33   f1 = -f2 * f3;
  34   /* mulsf3addsf_vfp */
  35   /* { dg-final { scan-assembler "fmacs" } } */
  36   f1 = f2 * f3 + f1;
  37   /* mulsf3subsf_vfp */
  38   /* { dg-final { scan-assembler "fmscs" } } */
  39   f1 = f2 * f3 - f1;
  40   /* mulsf3negsfaddsf_vfp */
  41   /* { dg-final { scan-assembler "fnmacs" } } */
  42   f1 = f2 - f3 * f1;
  43   /* mulsf3negsfsubsf_vfp */
  44   /* { dg-final { scan-assembler "fnmscs" } } */
  45   f1 = -f2 * f3 - f1;
  46   /* sqrtsf2_vfp */
  47   /* { dg-final { scan-assembler "fsqrts" } } */
  48   f1 = sqrtf (f1);
  49 }
  50
  51 volatile double d1, d2, d3;
  52
  53 void test_df() {
  54   /* absdf2_vfp */
  55   /* { dg-final { scan-assembler "fabsd" } } */
  56   d1 = fabs (d1);
  57   /* negdf2_vfp */
  58   /* { dg-final { scan-assembler "fnegd" } } */
  59   d1 = -d1;
  60   /* adddf3_vfp */
  61   /* { dg-final { scan-assembler "faddd" } } */
  62   d1 = d2 + d3;
  63   /* subdf3_vfp */
  64   /* { dg-final { scan-assembler "fsubd" } } */
  65   d1 = d2 - d3;
  66   /* divdf3_vfp */
  67   /* { dg-final { scan-assembler "fdivd" } } */
  68   d1 = d2 / d3;
  69   /* muldf3_vfp */
  70   /* { dg-final { scan-assembler "fmuld" } } */
  71   d1 = d2 * d3;
  72   /* muldf3negdf_vfp */
  73   /* { dg-final { scan-assembler "fnmuld" } } */
  74   d1 = -d2 * d3;
  75   /* muldf3adddf_vfp */
  76   /* { dg-final { scan-assembler "fmacd" } } */
  77   d1 = d2 * d3 + d1;
  78   /* muldf3subdf_vfp */
  79   /* { dg-final { scan-assembler "fmscd" } } */
  80   d1 = d2 * d3 - d1;
  81   /* muldf3negdfadddf_vfp */
  82   /* { dg-final { scan-assembler "fnmacd" } } */
  83   d1 = d2 - d3 * d1;
  84   /* muldf3negdfsubdf_vfp */
  85   /* { dg-final { scan-assembler "fnmscd" } } */
  86   d1 = -d2 * d3 - d1;
  87   /* sqrtdf2_vfp */
  88   /* { dg-final { scan-assembler "fsqrtd" } } */
  89   d1 = sqrt (d1);
  90 }
  91
  92 volatile int i1;
  93 volatile unsigned int u1;
  94
  95 void test_convert () {
  96   /* extendsfdf2_vfp */
  97   /* { dg-final { scan-assembler "fcvtds" } } */
  98   d1 = f1;
  99   /* truncdfsf2_vfp */
 100   /* { dg-final { scan-assembler "fcvtsd" } } */
 101   f1 = d1;
 102   /* truncsisf2_vfp */
 103   /* { dg-final { scan-assembler "ftosizs" } } */
 104   i1 = f1;
 105   /* truncsidf2_vfp */
 106   /* { dg-final { scan-assembler "ftosizd" } } */
 107   i1 = d1;
 108   /* fixuns_truncsfsi2 */
 109   /* { dg-final { scan-assembler "ftouizs" } } */
 110   u1 = f1;
 111   /* fixuns_truncdfsi2 */
 112   /* { dg-final { scan-assembler "ftouizd" } } */
 113   u1 = d1;
 114   /* floatsisf2_vfp */
 115   /* { dg-final { scan-assembler "fsitos" } } */
 116   f1 = i1;
 117   /* floatsidf2_vfp */
 118   /* { dg-final { scan-assembler "fsitod" } } */
 119   d1 = i1;
 120   /* floatunssisf2 */
 121   /* { dg-final { scan-assembler "fuitos" } } */
 122   f1 = u1;
 123   /* floatunssidf2 */
 124   /* { dg-final { scan-assembler "fuitod" } } */
 125   d1 = u1;
 126 }
 127
 128 void test_ldst (float f[], double d[]) {
 129   /* { dg-final { scan-assembler "flds.+ \\\[r0, #1020\\\]" } } */
 130   /* { dg-final { scan-assembler "flds.+ \\\[r0, #-1020\\\]" } } */
 131   /* { dg-final { scan-assembler "add.+ r0, #1024" } } */
 132   /* { dg-final { scan-assembler "fsts.+ \\\[r0, #0\\\]$" } } */
 133   f[256] = f[255] + f[-255];
 134
 135   /* { dg-final { scan-assembler "fldd.+ \\\[r1, #1016\\\]" } } */
 136   /* { dg-final { scan-assembler "fldd.+ \\\[r1, #-1016\\\]" } } */
 137   /* { dg-final { scan-assembler "fstd.+ \\\[r1, #256\\\]" } } */
 138   d[32] = d[127] + d[-127];
 139 }