gcc/config/mn10300/mn10300.h

   1 /* Definitions of target machine for GNU compiler.
   2    Matsushita MN10300 series
   3    Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
   4    2007, 2008, 2009, 2010 Free Software Foundation, Inc.
   5    Contributed by Jeff Law (law@cygnus.com).
   6
   7    This file is part of GCC.
   8
   9    GCC is free software; you can redistribute it and/or modify
  10    it under the terms of the GNU General Public License as published by
  11    the Free Software Foundation; either version 3, or (at your option)
  12    any later version.
  13
  14    GCC is distributed in the hope that it will be useful,
  15    but WITHOUT ANY WARRANTY; without even the implied warranty of
  16    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17    GNU General Public License for more details.
  18
  19    You should have received a copy of the GNU General Public License
  20    along with GCC; see the file COPYING3.  If not see
  21    <http://www.gnu.org/licenses/>.  */
  22
  23 #undef ASM_SPEC
  24 #undef LIB_SPEC
  25 #undef ENDFILE_SPEC
  26 #undef  LINK_SPEC
  27 #define LINK_SPEC "%{mrelax:--relax}"
  28 #undef  STARTFILE_SPEC
  29 #define STARTFILE_SPEC "%{!mno-crt0:%{!shared:%{pg:gcrt0%O%s}%{!pg:%{p:mcrt0%O%s}%{!p:crt0%O%s}}}}"
  30
  31 /* Names to predefine in the preprocessor for this target machine.  */
  32
  33 #define TARGET_CPU_CPP_BUILTINS()               \
  34   do                                            \
  35     {                                           \
  36       builtin_define ("__mn10300__");           \
  37       builtin_define ("__MN10300__");           \
  38       builtin_assert ("cpu=mn10300");           \
  39       builtin_assert ("machine=mn10300");       \
  40                                                 \
  41       if (TARGET_AM34)                          \
  42         {                                       \
  43           builtin_define ("__AM33__=4");        \
  44           builtin_define ("__AM34__");          \
  45         }                                       \
  46       else if (TARGET_AM33_2)                   \
  47         {                                       \
  48           builtin_define ("__AM33__=2");        \
  49           builtin_define ("__AM33_2__");        \
  50         }                                       \
  51       else if (TARGET_AM33)                     \
  52         builtin_define ("__AM33__=1");          \
  53     }                                           \
  54   while (0)
  55
  56 extern GTY(()) int mn10300_unspec_int_label_counter;
  57
  58 enum processor_type
  59 {
  60   PROCESSOR_MN10300,
  61   PROCESSOR_AM33,
  62   PROCESSOR_AM33_2,
  63   PROCESSOR_AM34
  64 };
  65
  66 extern enum processor_type mn10300_processor;
  67 extern enum processor_type mn10300_tune_cpu;
  68
  69 #define TARGET_AM33     (mn10300_processor >= PROCESSOR_AM33)
  70 #define TARGET_AM33_2   (mn10300_processor >= PROCESSOR_AM33_2)
  71 #define TARGET_AM34     (mn10300_processor >= PROCESSOR_AM34)
  72
  73 #ifndef PROCESSOR_DEFAULT
  74 #define PROCESSOR_DEFAULT PROCESSOR_MN10300
  75 #endif
  76
  77 /* Print subsidiary information on the compiler version in use.  */
  78
  79 #define TARGET_VERSION fprintf (stderr, " (MN10300)");
  80
  81 \f
  82 /* Target machine storage layout */
  83
  84 /* Define this if most significant bit is lowest numbered
  85    in instructions that operate on numbered bit-fields.
  86    This is not true on the Matsushita MN1003.  */
  87 #define BITS_BIG_ENDIAN 0
  88
  89 /* Define this if most significant byte of a word is the lowest numbered.  */
  90 /* This is not true on the Matsushita MN10300.  */
  91 #define BYTES_BIG_ENDIAN 0
  92
  93 /* Define this if most significant word of a multiword number is lowest
  94    numbered.
  95    This is not true on the Matsushita MN10300.  */
  96 #define WORDS_BIG_ENDIAN 0
  97
  98 /* Width of a word, in units (bytes).  */
  99 #define UNITS_PER_WORD          4
 100
 101 /* Allocation boundary (in *bits*) for storing arguments in argument list.  */
 102 #define PARM_BOUNDARY           32
 103
 104 /* The stack goes in 32-bit lumps.  */
 105 #define STACK_BOUNDARY          32
 106
 107 /* Allocation boundary (in *bits*) for the code of a function.
 108    8 is the minimum boundary; it's unclear if bigger alignments
 109    would improve performance.  */
 110 #define FUNCTION_BOUNDARY 8
 111
 112 /* No data type wants to be aligned rounder than this.  */
 113 #define BIGGEST_ALIGNMENT       32
 114
 115 /* Alignment of field after `int : 0' in a structure.  */
 116 #define EMPTY_FIELD_BOUNDARY    32
 117
 118 /* Define this if move instructions will actually fail to work
 119    when given unaligned data.  */
 120 #define STRICT_ALIGNMENT 1
 121
 122 /* Define this as 1 if `char' should by default be signed; else as 0.  */
 123 #define DEFAULT_SIGNED_CHAR 0
 124
 125 #undef  SIZE_TYPE
 126 #define SIZE_TYPE "unsigned int"
 127
 128 #undef  PTRDIFF_TYPE
 129 #define PTRDIFF_TYPE "int"
 130
 131 #undef  WCHAR_TYPE
 132 #define WCHAR_TYPE "long int"
 133
 134 #undef  WCHAR_TYPE_SIZE
 135 #define WCHAR_TYPE_SIZE BITS_PER_WORD
 136 \f
 137 /* Standard register usage.  */
 138
 139 /* Number of actual hardware registers.
 140    The hardware registers are assigned numbers for the compiler
 141    from 0 to just below FIRST_PSEUDO_REGISTER.
 142
 143    All registers that the compiler knows about must be given numbers,
 144    even those that are not normally considered general registers.  */
 145
 146 #define FIRST_PSEUDO_REGISTER 52
 147
 148 /* Specify machine-specific register numbers.  The commented out entries
 149    are defined in mn10300.md.  */
 150 #define FIRST_DATA_REGNUM      0
 151 #define LAST_DATA_REGNUM       3
 152 #define FIRST_ADDRESS_REGNUM   4
 153 /* #define PIC_REG             6 */
 154 #define LAST_ADDRESS_REGNUM    8
 155 /* #define SP_REG              9 */
 156 #define FIRST_EXTENDED_REGNUM 10
 157 #define LAST_EXTENDED_REGNUM  17
 158 #define FIRST_FP_REGNUM       18
 159 #define LAST_FP_REGNUM        49
 160 #define MDR_REGNUM            50
 161 /* #define CC_REG             51 */
 162 #define FIRST_ARGUMENT_REGNUM  0
 163
 164 /* Specify the registers used for certain standard purposes.
 165    The values of these macros are register numbers.  */
 166
 167 /* Register to use for pushing function arguments.  */
 168 #define STACK_POINTER_REGNUM (LAST_ADDRESS_REGNUM + 1)
 169
 170 /* Base register for access to local variables of the function.  */
 171 #define FRAME_POINTER_REGNUM (LAST_ADDRESS_REGNUM - 1)
 172
 173 /* Base register for access to arguments of the function.  This
 174    is a fake register and will be eliminated into either the frame
 175    pointer or stack pointer.  */
 176 #define ARG_POINTER_REGNUM LAST_ADDRESS_REGNUM
 177
 178 /* Register in which static-chain is passed to a function.  */
 179 #define STATIC_CHAIN_REGNUM (FIRST_ADDRESS_REGNUM + 1)
 180
 181 /* 1 for registers that have pervasive standard uses
 182    and are not available for the register allocator.  */
 183
 184 #define FIXED_REGISTERS \
 185   { 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 \
 186   , 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0       \
 187   , 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1 \
 188   }
 189
 190 /* 1 for registers not available across function calls.
 191    These must include the FIXED_REGISTERS and also any
 192    registers that can be used without being saved.
 193    The latter must include the registers where values are returned
 194    and the register where structure-value addresses are passed.
 195    Aside from that, you can include as many other registers as you
 196    like.  */
 197
 198 #define CALL_USED_REGISTERS \
 199   { 1, 1, 0, 0, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0 \
 200   , 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0       \
 201   , 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 \
 202   }
 203
 204 /* Note: The definition of CALL_REALLY_USED_REGISTERS is not
 205    redundant.  It is needed when compiling in PIC mode because
 206    the a2 register becomes fixed (and hence must be marked as
 207    call_used) but in order to preserve the ABI it is not marked
 208    as call_really_used.  */
 209 #define CALL_REALLY_USED_REGISTERS CALL_USED_REGISTERS
 210
 211 #define REG_ALLOC_ORDER \
 212   { 0, 1, 4, 5, 2, 3, 6, 7, 10, 11, 12, 13, 14, 15, 16, 17, 8, 9 \
 213   , 42, 43, 44, 45, 46, 47, 48, 49, 34, 35, 36, 37, 38, 39, 40, 41 \
 214   , 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 51 \
 215   }
 216
 217 /* Return number of consecutive hard regs needed starting at reg REGNO
 218    to hold something of mode MODE.
 219
 220    This is ordinarily the length in words of a value of mode MODE
 221    but can be less for certain modes in special long registers.  */
 222
 223 #define HARD_REGNO_NREGS(REGNO, MODE)   \
 224   ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
 225
 226 /* Value is 1 if hard register REGNO can hold a value of machine-mode
 227    MODE.  */
 228 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
 229   mn10300_hard_regno_mode_ok ((REGNO), (MODE))
 230
 231 /* Value is 1 if it is a good idea to tie two pseudo registers
 232    when one has mode MODE1 and one has mode MODE2.
 233    If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
 234    for any hard reg, then this must be 0 for correct output.  */
 235 #define MODES_TIEABLE_P(MODE1, MODE2) \
 236   mn10300_modes_tieable ((MODE1), (MODE2))
 237
 238 /* 4 data, and effectively 3 address registers is small as far as I'm
 239    concerned.  */
 240 #define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true
 241 \f
 242 /* Define the classes of registers for register constraints in the
 243    machine description.  Also define ranges of constants.
 244
 245    One of the classes must always be named ALL_REGS and include all hard regs.
 246    If there is more than one class, another class must be named NO_REGS
 247    and contain no registers.
 248
 249    The name GENERAL_REGS must be the name of a class (or an alias for
 250    another name such as ALL_REGS).  This is the class of registers
 251    that is allowed by "g" or "r" in a register constraint.
 252    Also, registers outside this class are allocated only when
 253    instructions express preferences for them.
 254
 255    The classes must be numbered in nondecreasing order; that is,
 256    a larger-numbered class must never be contained completely
 257    in a smaller-numbered class.
 258
 259    For any two classes, it is very desirable that there be another
 260    class that represents their union.  */
 261
 262 enum reg_class
 263 {
 264   NO_REGS, DATA_REGS, ADDRESS_REGS, SP_REGS,
 265   DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS,
 266   EXTENDED_REGS, DATA_OR_EXTENDED_REGS, ADDRESS_OR_EXTENDED_REGS,
 267   SP_OR_EXTENDED_REGS, SP_OR_ADDRESS_OR_EXTENDED_REGS,
 268   FP_REGS, FP_ACC_REGS, CC_REGS,
 269   GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES
 270 };
 271
 272 #define N_REG_CLASSES (int) LIM_REG_CLASSES
 273
 274 /* Give names of register classes as strings for dump file.  */
 275
 276 #define REG_CLASS_NAMES                                         \
 277 { "NO_REGS", "DATA_REGS", "ADDRESS_REGS",                       \
 278   "SP_REGS", "DATA_OR_ADDRESS_REGS", "SP_OR_ADDRESS_REGS",      \
 279   "EXTENDED_REGS",                                              \
 280   "DATA_OR_EXTENDED_REGS", "ADDRESS_OR_EXTENDED_REGS",          \
 281   "SP_OR_EXTENDED_REGS", "SP_OR_ADDRESS_OR_EXTENDED_REGS",      \
 282   "FP_REGS", "FP_ACC_REGS", "CC_REGS",                          \
 283   "GENERAL_REGS", "ALL_REGS", "LIM_REGS"                        \
 284 }
 285
 286 /* Define which registers fit in which classes.
 287    This is an initializer for a vector of HARD_REG_SET
 288    of length N_REG_CLASSES.  */
 289
 290 #define REG_CLASS_CONTENTS                                      \
 291 { { 0,          0 },      /* No regs */                         \
 292   { 0x0000000f, 0 },      /* DATA_REGS */                       \
 293   { 0x000001f0, 0 },      /* ADDRESS_REGS */                    \
 294   { 0x00000200, 0 },      /* SP_REGS */                         \
 295   { 0x000001ff, 0 },      /* DATA_OR_ADDRESS_REGS */            \
 296   { 0x000003f0, 0 },      /* SP_OR_ADDRESS_REGS */              \
 297   { 0x0003fc00, 0 },      /* EXTENDED_REGS */                   \
 298   { 0x0003fc0f, 0 },      /* DATA_OR_EXTENDED_REGS */           \
 299   { 0x0003fdf0, 0 },      /* ADDRESS_OR_EXTENDED_REGS */        \
 300   { 0x0003fe00, 0 },      /* SP_OR_EXTENDED_REGS */             \
 301   { 0x0003fff0, 0 },      /* SP_OR_ADDRESS_OR_EXTENDED_REGS */  \
 302   { 0xfffc0000, 0x3ffff },/* FP_REGS */                         \
 303   { 0x03fc0000, 0 },      /* FP_ACC_REGS */                     \
 304   { 0x00000000, 0x80000 },/* CC_REGS */                         \
 305   { 0x0003fdff, 0 },      /* GENERAL_REGS */                    \
 306   { 0xffffffff, 0xfffff } /* ALL_REGS */                        \
 307 }
 308
 309 /* The following macro defines cover classes for Integrated Register
 310    Allocator.  Cover classes is a set of non-intersected register
 311    classes covering all hard registers used for register allocation
 312    purpose.  Any move between two registers of a cover class should be
 313    cheaper than load or store of the registers.  The macro value is
 314    array of register classes with LIM_REG_CLASSES used as the end
 315    marker.  */
 316
 317 #define IRA_COVER_CLASSES                                       \
 318 {                                                               \
 319   GENERAL_REGS, FP_REGS, LIM_REG_CLASSES                        \
 320 }
 321
 322 /* The same information, inverted:
 323    Return the class number of the smallest class containing
 324    reg number REGNO.  This could be a conditional expression
 325    or could index an array.  */
 326
 327 #define REGNO_REG_CLASS(REGNO)                       \
 328   ((REGNO) <= LAST_DATA_REGNUM ? DATA_REGS :         \
 329    (REGNO) <= LAST_ADDRESS_REGNUM ? ADDRESS_REGS :   \
 330    (REGNO) == STACK_POINTER_REGNUM ? SP_REGS :       \
 331    (REGNO) <= LAST_EXTENDED_REGNUM ? EXTENDED_REGS : \
 332    (REGNO) <= LAST_FP_REGNUM ? FP_REGS :             \
 333    (REGNO) == CC_REG ? CC_REGS :                     \
 334    NO_REGS)
 335
 336 /* The class value for index registers, and the one for base regs.  */
 337 #define INDEX_REG_CLASS DATA_OR_EXTENDED_REGS
 338 #define BASE_REG_CLASS  SP_OR_ADDRESS_REGS
 339
 340 /* Macros to check register numbers against specific register classes.  */
 341
 342 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
 343    and check its validity for a certain class.
 344    We have two alternate definitions for each of them.
 345    The usual definition accepts all pseudo regs; the other rejects
 346    them unless they have been allocated suitable hard regs.
 347    The symbol REG_OK_STRICT causes the latter definition to be used.
 348
 349    Most source files want to accept pseudo regs in the hope that
 350    they will get allocated to the class that the insn wants them to be in.
 351    Source files for reload pass need to be strict.
 352    After reload, it makes no difference, since pseudo regs have
 353    been eliminated by then.  */
 354
 355 /* These assume that REGNO is a hard or pseudo reg number.
 356    They give nonzero only if REGNO is a hard reg of the suitable class
 357    or a pseudo reg currently allocated to a suitable hard reg.
 358    Since they use reg_renumber, they are safe only once reg_renumber
 359    has been allocated, which happens in local-alloc.c.  */
 360
 361 #ifndef REG_OK_STRICT
 362 # define REG_STRICT 0
 363 #else
 364 # define REG_STRICT 1
 365 #endif
 366
 367 # define REGNO_IN_RANGE_P(regno,min,max,strict) \
 368   (IN_RANGE ((regno), (min), (max))             \
 369    || ((strict)                                 \
 370        ? (reg_renumber                          \
 371           && reg_renumber[(regno)] >= (min)     \
 372           && reg_renumber[(regno)] <= (max))    \
 373        : (regno) >= FIRST_PSEUDO_REGISTER))
 374
 375 #define REGNO_DATA_P(regno, strict) \
 376   (REGNO_IN_RANGE_P ((regno), FIRST_DATA_REGNUM, LAST_DATA_REGNUM, \
 377                      (strict)))
 378 #define REGNO_ADDRESS_P(regno, strict) \
 379   (REGNO_IN_RANGE_P ((regno), FIRST_ADDRESS_REGNUM, LAST_ADDRESS_REGNUM, \
 380                      (strict)))
 381 #define REGNO_SP_P(regno, strict) \
 382   (REGNO_IN_RANGE_P ((regno), STACK_POINTER_REGNUM, STACK_POINTER_REGNUM, \
 383                      (strict)))
 384 #define REGNO_EXTENDED_P(regno, strict) \
 385   (REGNO_IN_RANGE_P ((regno), FIRST_EXTENDED_REGNUM, LAST_EXTENDED_REGNUM, \
 386                      (strict)))
 387 #define REGNO_AM33_P(regno, strict) \
 388   (REGNO_DATA_P ((regno), (strict)) || REGNO_ADDRESS_P ((regno), (strict)) \
 389    || REGNO_EXTENDED_P ((regno), (strict)))
 390 #define REGNO_FP_P(regno, strict) \
 391   (REGNO_IN_RANGE_P ((regno), FIRST_FP_REGNUM, LAST_FP_REGNUM, (strict)))
 392
 393 #define REGNO_STRICT_OK_FOR_BASE_P(regno, strict) \
 394   (REGNO_SP_P ((regno), (strict)) \
 395    || REGNO_ADDRESS_P ((regno), (strict)) \
 396    || REGNO_EXTENDED_P ((regno), (strict)))
 397 #define REGNO_OK_FOR_BASE_P(regno) \
 398   (REGNO_STRICT_OK_FOR_BASE_P ((regno), REG_STRICT))
 399 #define REG_OK_FOR_BASE_P(X) \
 400   (REGNO_OK_FOR_BASE_P (REGNO (X)))
 401
 402 #define REGNO_STRICT_OK_FOR_BIT_BASE_P(regno, strict) \
 403   (REGNO_SP_P ((regno), (strict)) || REGNO_ADDRESS_P ((regno), (strict)))
 404 #define REGNO_OK_FOR_BIT_BASE_P(regno) \
 405   (REGNO_STRICT_OK_FOR_BIT_BASE_P ((regno), REG_STRICT))
 406 #define REG_OK_FOR_BIT_BASE_P(X) \
 407   (REGNO_OK_FOR_BIT_BASE_P (REGNO (X)))
 408
 409 #define REGNO_STRICT_OK_FOR_INDEX_P(regno, strict) \
 410   (REGNO_DATA_P ((regno), (strict)) || REGNO_EXTENDED_P ((regno), (strict)))
 411 #define REGNO_OK_FOR_INDEX_P(regno) \
 412   (REGNO_STRICT_OK_FOR_INDEX_P ((regno), REG_STRICT))
 413 #define REG_OK_FOR_INDEX_P(X) \
 414   (REGNO_OK_FOR_INDEX_P (REGNO (X)))
 415
 416 #define LIMIT_RELOAD_CLASS(MODE, CLASS) \
 417   (!TARGET_AM33 && (MODE == QImode || MODE == HImode) ? DATA_REGS : CLASS)
 418
 419 #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
 420   mn10300_secondary_reload_class(CLASS,MODE,IN)
 421
 422 /* Return the maximum number of consecutive registers
 423    needed to represent mode MODE in a register of class CLASS.  */
 424
 425 #define CLASS_MAX_NREGS(CLASS, MODE)    \
 426   ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
 427
 428 /* A class that contains registers which the compiler must always
 429    access in a mode that is the same size as the mode in which it
 430    loaded the register.  */
 431 #define CLASS_CANNOT_CHANGE_SIZE FP_REGS
 432
 433 /* Return 1 if VALUE is in the range specified.  */
 434
 435 #define INT_8_BITS(VALUE) ((unsigned) (VALUE) + 0x80 < 0x100)
 436 #define INT_16_BITS(VALUE) ((unsigned) (VALUE) + 0x8000 < 0x10000)
 437
 438 \f
 439 /* Stack layout; function entry, exit and calling.  */
 440
 441 /* Define this if pushing a word on the stack
 442    makes the stack pointer a smaller address.  */
 443
 444 #define STACK_GROWS_DOWNWARD
 445
 446 /* Define this to nonzero if the nominal address of the stack frame
 447    is at the high-address end of the local variables;
 448    that is, each additional local variable allocated
 449    goes at a more negative offset in the frame.  */
 450
 451 #define FRAME_GROWS_DOWNWARD 1
 452
 453 /* Offset within stack frame to start allocating local variables at.
 454    If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
 455    first local allocated.  Otherwise, it is the offset to the BEGINNING
 456    of the first local allocated.  */
 457
 458 #define STARTING_FRAME_OFFSET 0
 459
 460 /* Offset of first parameter from the argument pointer register value.  */
 461 /* Is equal to the size of the saved fp + pc, even if an fp isn't
 462    saved since the value is used before we know.  */
 463
 464 #define FIRST_PARM_OFFSET(FNDECL) 4
 465
 466 #define ELIMINABLE_REGS                         \
 467 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM},   \
 468  { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM},   \
 469  { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
 470
 471 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
 472   OFFSET = mn10300_initial_offset (FROM, TO)
 473
 474 /* We use d0/d1 for passing parameters, so allocate 8 bytes of space
 475    for a register flushback area.  */
 476 #define REG_PARM_STACK_SPACE(DECL) 8
 477 #define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1
 478 #define ACCUMULATE_OUTGOING_ARGS 1
 479
 480 /* So we can allocate space for return pointers once for the function
 481    instead of around every call.  */
 482 #define STACK_POINTER_OFFSET 4
 483
 484 /* 1 if N is a possible register number for function argument passing.
 485    On the MN10300, d0 and d1 are used in this way.  */
 486
 487 #define FUNCTION_ARG_REGNO_P(N) ((N) <= 1)
 488
 489 \f
 490 /* Define a data type for recording info about an argument list
 491    during the scan of that argument list.  This data type should
 492    hold all necessary information about the function itself
 493    and about the args processed so far, enough to enable macros
 494    such as FUNCTION_ARG to determine where the next arg should go.
 495
 496    On the MN10300, this is a single integer, which is a number of bytes
 497    of arguments scanned so far.  */
 498
 499 #define CUMULATIVE_ARGS struct cum_arg
 500
 501 struct cum_arg
 502 {
 503   int nbytes;
 504 };
 505
 506 /* Initialize a variable CUM of type CUMULATIVE_ARGS
 507    for a call to a function whose data type is FNTYPE.
 508    For a library call, FNTYPE is 0.
 509
 510    On the MN10300, the offset starts at 0.  */
 511
 512 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
 513  ((CUM).nbytes = 0)
 514
 515 #define FUNCTION_VALUE_REGNO_P(N)  mn10300_function_value_regno_p (N)
 516
 517 #define DEFAULT_PCC_STRUCT_RETURN 0
 518
 519 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
 520    the stack pointer does not matter.  The value is tested only in
 521    functions that have frame pointers.
 522    No definition is equivalent to always zero.  */
 523
 524 #define EXIT_IGNORE_STACK 1
 525
 526 /* Output assembler code to FILE to increment profiler label # LABELNO
 527    for profiling a function entry.  */
 528
 529 #define FUNCTION_PROFILER(FILE, LABELNO) ;
 530
 531 /* Length in units of the trampoline for entering a nested function.  */
 532
 533 #define TRAMPOLINE_SIZE 0x1b
 534
 535 #define TRAMPOLINE_ALIGNMENT 32
 536
 537 /* A C expression whose value is RTL representing the value of the return
 538    address for the frame COUNT steps up from the current frame.
 539
 540    On the mn10300, the return address is not at a constant location
 541    due to the frame layout.  Luckily, it is at a constant offset from
 542    the argument pointer, so we define RETURN_ADDR_RTX to return a
 543    MEM using arg_pointer_rtx.  Reload will replace arg_pointer_rtx
 544    with a reference to the stack/frame pointer + an appropriate offset.  */
 545
 546 #define RETURN_ADDR_RTX(COUNT, FRAME)   \
 547   ((COUNT == 0)                         \
 548    ? gen_rtx_MEM (Pmode, arg_pointer_rtx) \
 549    : (rtx) 0)
 550
 551 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, MDR_REGNUM)
 552 \f
 553 /* Maximum number of registers that can appear in a valid memory address.  */
 554
 555 #define MAX_REGS_PER_ADDRESS 2
 556
 557 \f
 558 #define HAVE_POST_INCREMENT (TARGET_AM33)
 559
 560 /* Accept either REG or SUBREG where a register is valid.  */
 561
 562 #define RTX_OK_FOR_BASE_P(X, strict)                            \
 563   ((REG_P (X) && REGNO_STRICT_OK_FOR_BASE_P (REGNO (X),         \
 564                                              (strict)))         \
 565    || (GET_CODE (X) == SUBREG && REG_P (SUBREG_REG (X))         \
 566        && REGNO_STRICT_OK_FOR_BASE_P (REGNO (SUBREG_REG (X)),   \
 567                                       (strict))))
 568
 569 \f
 570
 571 /* Nonzero if the constant value X is a legitimate general operand.
 572    It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.  */
 573 #define LEGITIMATE_CONSTANT_P(X) mn10300_legitimate_constant_p (X)
 574
 575 /* Zero if this needs fixing up to become PIC.  */
 576
 577 #define LEGITIMATE_PIC_OPERAND_P(X) \
 578   mn10300_legitimate_pic_operand_p (X)
 579
 580 /* Register to hold the addressing base for
 581    position independent code access to data items.  */
 582 #define PIC_OFFSET_TABLE_REGNUM PIC_REG
 583
 584 /* The name of the pseudo-symbol representing the Global Offset Table.  */
 585 #define GOT_SYMBOL_NAME "*_GLOBAL_OFFSET_TABLE_"
 586
 587 #define SYMBOLIC_CONST_P(X)     \
 588 ((GET_CODE (X) == SYMBOL_REF || GET_CODE (X) == LABEL_REF)      \
 589   && ! LEGITIMATE_PIC_OPERAND_P (X))
 590
 591 /* Non-global SYMBOL_REFs have SYMBOL_REF_FLAG enabled.  */
 592 #define MN10300_GLOBAL_P(X) (! SYMBOL_REF_FLAG (X))
 593 \f
 594 #define SELECT_CC_MODE(OP, X, Y)  mn10300_select_cc_mode (X)
 595 #define REVERSIBLE_CC_MODE(MODE)  0
 596 \f
 597 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
 598   ((CLASS1 == CLASS2 && (CLASS1 == ADDRESS_REGS || CLASS1 == DATA_REGS)) ? 2 :\
 599    ((CLASS1 == ADDRESS_REGS || CLASS1 == DATA_REGS) && \
 600     (CLASS2 == ADDRESS_REGS || CLASS2 == DATA_REGS)) ? 4 : \
 601    (CLASS1 == SP_REGS && CLASS2 == ADDRESS_REGS) ? 2 : \
 602    (CLASS1 == ADDRESS_REGS && CLASS2 == SP_REGS) ? 4 : \
 603    ! TARGET_AM33 ? 6 : \
 604    (CLASS1 == SP_REGS || CLASS2 == SP_REGS) ? 6 : \
 605    (CLASS1 == CLASS2 && CLASS1 == EXTENDED_REGS) ? 6 : \
 606    (CLASS1 == FP_REGS || CLASS2 == FP_REGS) ? 6 : \
 607    (CLASS1 == EXTENDED_REGS || CLASS2 == EXTENDED_REGS) ? 4 : \
 608    4)
 609
 610 /* Nonzero if access to memory by bytes or half words is no faster
 611    than accessing full words.  */
 612 #define SLOW_BYTE_ACCESS 1
 613
 614 #define NO_FUNCTION_CSE
 615
 616 /* According expr.c, a value of around 6 should minimize code size, and
 617    for the MN10300 series, that's our primary concern.  */
 618 #define MOVE_RATIO(speed) 6
 619
 620 #define TEXT_SECTION_ASM_OP "\t.section .text"
 621 #define DATA_SECTION_ASM_OP "\t.section .data"
 622 #define BSS_SECTION_ASM_OP  "\t.section .bss"
 623
 624 #define ASM_COMMENT_START "#"
 625
 626 /* Output to assembler file text saying following lines
 627    may contain character constants, extra white space, comments, etc.  */
 628
 629 #define ASM_APP_ON "#APP\n"
 630
 631 /* Output to assembler file text saying following lines
 632    no longer contain unusual constructs.  */
 633
 634 #define ASM_APP_OFF "#NO_APP\n"
 635
 636 #undef  USER_LABEL_PREFIX
 637 #define USER_LABEL_PREFIX "_"
 638
 639 /* This says how to output the assembler to define a global
 640    uninitialized but not common symbol.
 641    Try to use asm_output_bss to implement this macro.  */
 642
 643 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
 644   asm_output_aligned_bss ((FILE), (DECL), (NAME), (SIZE), (ALIGN))
 645
 646 /* Globalizing directive for a label.  */
 647 #define GLOBAL_ASM_OP "\t.global "
 648
 649 /* This is how to output a reference to a user-level label named NAME.
 650    `assemble_name' uses this.  */
 651
 652 #undef  ASM_OUTPUT_LABELREF
 653 #define ASM_OUTPUT_LABELREF(FILE, NAME) \
 654   asm_fprintf (FILE, "%U%s", (*targetm.strip_name_encoding) (NAME))
 655
 656 #define ASM_PN_FORMAT "%s___%lu"
 657
 658 /* This is how we tell the assembler that two symbols have the same value.  */
 659
 660 #define ASM_OUTPUT_DEF(FILE,NAME1,NAME2) \
 661   do                                     \
 662     {                                    \
 663       assemble_name (FILE, NAME1);       \
 664       fputs (" = ", FILE);               \
 665       assemble_name (FILE, NAME2);       \
 666       fputc ('\n', FILE);                \
 667     }                                    \
 668   while (0)
 669
 670 /* How to refer to registers in assembler output.
 671    This sequence is indexed by compiler's hard-register-number (see above).  */
 672
 673 #define REGISTER_NAMES                                                  \
 674 { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3", "ap", "sp",           \
 675   "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7"                        \
 676 , "fs0", "fs1", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7"                \
 677 , "fs8", "fs9", "fs10", "fs11", "fs12", "fs13", "fs14", "fs15"          \
 678 , "fs16", "fs17", "fs18", "fs19", "fs20", "fs21", "fs22", "fs23"        \
 679 , "fs24", "fs25", "fs26", "fs27", "fs28", "fs29", "fs30", "fs31"        \
 680 , "mdr", "EPSW"                                                         \
 681 }
 682
 683 #define ADDITIONAL_REGISTER_NAMES                               \
 684 { {"r8",  4}, {"r9",  5}, {"r10", 6}, {"r11", 7},               \
 685   {"r12", 0}, {"r13", 1}, {"r14", 2}, {"r15", 3},               \
 686   {"e0", 10}, {"e1", 11}, {"e2", 12}, {"e3", 13},               \
 687   {"e4", 14}, {"e5", 15}, {"e6", 16}, {"e7", 17}                \
 688 , {"fd0", 18}, {"fd2", 20}, {"fd4", 22}, {"fd6", 24}            \
 689 , {"fd8", 26}, {"fd10", 28}, {"fd12", 30}, {"fd14", 32}         \
 690 , {"fd16", 34}, {"fd18", 36}, {"fd20", 38}, {"fd22", 40}        \
 691 , {"fd24", 42}, {"fd26", 44}, {"fd28", 46}, {"fd30", 48}        \
 692 , {"cc", CC_REG}                                                \
 693 }
 694
 695 /* Print an instruction operand X on file FILE.
 696    look in mn10300.c for details */
 697
 698 #define PRINT_OPERAND(FILE, X, CODE) \
 699   mn10300_print_operand (FILE, X, CODE)
 700
 701 /* Print a memory operand whose address is X, on file FILE.
 702    This uses a function in output-vax.c.  */
 703
 704 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
 705   mn10300_print_operand_address (FILE, ADDR)
 706
 707 /* This is how to output an element of a case-vector that is absolute.  */
 708
 709 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
 710   fprintf (FILE, "\t%s .L%d\n", ".long", VALUE)
 711
 712 /* This is how to output an element of a case-vector that is relative.  */
 713
 714 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
 715   fprintf (FILE, "\t%s .L%d-.L%d\n", ".long", VALUE, REL)
 716
 717 #define ASM_OUTPUT_ALIGN(FILE,LOG)      \
 718   if ((LOG) != 0)                       \
 719     fprintf (FILE, "\t.align %d\n", (LOG))
 720
 721 /* We don't have to worry about dbx compatibility for the mn10300.  */
 722 #define DEFAULT_GDB_EXTENSIONS 1
 723
 724 /* Use dwarf2 debugging info by default.  */
 725 #undef  PREFERRED_DEBUGGING_TYPE
 726 #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
 727 #define DWARF2_DEBUGGING_INFO 1
 728
 729 #define DWARF2_ASM_LINE_DEBUG_INFO 1
 730
 731 /* GDB always assumes the current function's frame begins at the value
 732    of the stack pointer upon entry to the current function.  Accessing
 733    local variables and parameters passed on the stack is done using the
 734    base of the frame + an offset provided by GCC.
 735
 736    For functions which have frame pointers this method works fine;
 737    the (frame pointer) == (stack pointer at function entry) and GCC provides
 738    an offset relative to the frame pointer.
 739
 740    This loses for functions without a frame pointer; GCC provides an offset
 741    which is relative to the stack pointer after adjusting for the function's
 742    frame size.  GDB would prefer the offset to be relative to the value of
 743    the stack pointer at the function's entry.  Yuk!  */
 744 #define DEBUGGER_AUTO_OFFSET(X) \
 745   ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) \
 746     + (frame_pointer_needed \
 747        ? 0 : - mn10300_initial_offset (FRAME_POINTER_REGNUM, \
 748                                        STACK_POINTER_REGNUM)))
 749
 750 #define DEBUGGER_ARG_OFFSET(OFFSET, X) \
 751   ((GET_CODE (X) == PLUS ? OFFSET : 0) \
 752     + (frame_pointer_needed \
 753        ? 0 : - mn10300_initial_offset (ARG_POINTER_REGNUM, \
 754                                        STACK_POINTER_REGNUM)))
 755
 756 /* Specify the machine mode that this machine uses
 757    for the index in the tablejump instruction.  */
 758 #define CASE_VECTOR_MODE Pmode
 759
 760 /* Define if operations between registers always perform the operation
 761    on the full register even if a narrower mode is specified.  */
 762 #define WORD_REGISTER_OPERATIONS
 763
 764 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
 765
 766 /* This flag, if defined, says the same insns that convert to a signed fixnum
 767    also convert validly to an unsigned one.  */
 768 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
 769
 770 /* Max number of bytes we can move from memory to memory
 771    in one reasonably fast instruction.  */
 772 #define MOVE_MAX        4
 773
 774 /* Define if shifts truncate the shift count
 775    which implies one can omit a sign-extension or zero-extension
 776    of a shift count.  */
 777 #define SHIFT_COUNT_TRUNCATED 1
 778
 779 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
 780    is done just by pretending it is already truncated.  */
 781 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
 782
 783 /* Specify the machine mode that pointers have.
 784    After generation of rtl, the compiler makes no further distinction
 785    between pointers and any other objects of this machine mode.  */
 786 #define Pmode SImode
 787
 788 /* A function address in a call instruction
 789    is a byte address (for indexing purposes)
 790    so give the MEM rtx a byte's mode.  */
 791 #define FUNCTION_MODE QImode
 792
 793 /* The assembler op to get a word.  */
 794
 795 #define FILE_ASM_OP "\t.file\n"
 796