| blob | f3fe567be3ec9dc1218629fd82a94d6701faa59f |
1 /* Target macros for the FRV port of GCC.
2 Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009,
3 2010
4 Free Software Foundation, Inc.
5 Contributed by Red Hat Inc.
7 This file is part of GCC.
9 GCC is free software; you can redistribute it and/or modify it
10 under the terms of the GNU General Public License as published
11 by the Free Software Foundation; either version 3, or (at your
12 option) any later version.
14 GCC is distributed in the hope that it will be useful, but WITHOUT
15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
17 License for more details.
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING3. If not see
21 <http://www.gnu.org/licenses/>. */
23 #ifndef __FRV_H__
24 #define __FRV_H__
26 /* Frv general purpose macros. */
27 /* Align an address. */
28 #define ADDR_ALIGN(addr,align) (((addr) + (align) - 1) & ~((align) - 1))
30 /* Return true if a value is inside a range. */
31 #define IN_RANGE_P(VALUE, LOW, HIGH) \
32 ( (((HOST_WIDE_INT)(VALUE)) >= (HOST_WIDE_INT)(LOW)) \
33 && (((HOST_WIDE_INT)(VALUE)) <= ((HOST_WIDE_INT)(HIGH))))
35 \f
36 /* Driver configuration. */
38 /* -fpic and -fPIC used to imply the -mlibrary-pic multilib, but with
39 FDPIC which multilib to use depends on whether FDPIC is in use or
40 not. The trick we use is to introduce -multilib-library-pic as a
41 pseudo-flag that selects the library-pic multilib, and map fpic
42 and fPIC to it only if fdpic is not selected. Also, if fdpic is
43 selected and no PIC/PIE options are present, we imply -fPIE.
44 Otherwise, if -fpic or -fPIC are enabled and we're optimizing for
45 speed, or if we have -On with n>=3, enable inlining of PLTs. As
46 for -mgprel-ro, we want to enable it by default, but not for -fpic or
47 -fpie. */
49 #define DRIVER_SELF_SPECS SUBTARGET_DRIVER_SELF_SPECS \
50 "%{mno-pack:\
51 %{!mhard-float:-msoft-float}\
52 %{!mmedia:-mno-media}}\
53 %{!mfdpic:%{fpic|fPIC: -multilib-library-pic}}\
54 %{mfdpic:%{!fpic:%{!fpie:%{!fPIC:%{!fPIE:\
55 %{!fno-pic:%{!fno-pie:%{!fno-PIC:%{!fno-PIE:-fPIE}}}}}}}} \
56 %{!mno-inline-plt:%{O*:%{!O0:%{!Os:%{fpic|fPIC:-minline-plt} \
57 %{!fpic:%{!fPIC:%{!O:%{!O1:%{!O2:-minline-plt}}}}}}}}} \
58 %{!mno-gprel-ro:%{!fpic:%{!fpie:-mgprel-ro}}}} \
59 "
60 #ifndef SUBTARGET_DRIVER_SELF_SPECS
61 # define SUBTARGET_DRIVER_SELF_SPECS
62 #endif
64 /* A C string constant that tells the GCC driver program options to pass to
65 the assembler. It can also specify how to translate options you give to GNU
66 CC into options for GCC to pass to the assembler. See the file `sun3.h'
67 for an example of this.
69 Do not define this macro if it does not need to do anything.
71 Defined in svr4.h. */
72 #undef ASM_SPEC
74 %{G*} %{v} %{n} %{T} %{Ym,*} %{Yd,*} %{Wa,*:%*} \
75 %{mtomcat-stats} \
76 %{!mno-eflags: \
77 %{mcpu=*} \
78 %{mgpr-*} %{mfpr-*} \
79 %{msoft-float} %{mhard-float} \
80 %{mdword} %{mno-dword} \
81 %{mdouble} %{mno-double} \
82 %{mmedia} %{mno-media} \
83 %{mmuladd} %{mno-muladd} \
84 %{mpack} %{mno-pack} \
85 %{mno-fdpic:-mnopic} %{mfdpic} \
86 %{fpic|fpie: -mpic} %{fPIC|fPIE: -mPIC} %{mlibrary-pic}}"
88 /* Another C string constant used much like `LINK_SPEC'. The difference
89 between the two is that `STARTFILE_SPEC' is used at the very beginning of
90 the command given to the linker.
92 If this macro is not defined, a default is provided that loads the standard
93 C startup file from the usual place. See `gcc.c'.
95 Defined in svr4.h. */
96 #undef STARTFILE_SPEC
99 /* Another C string constant used much like `LINK_SPEC'. The difference
100 between the two is that `ENDFILE_SPEC' is used at the very end of the
101 command given to the linker.
103 Do not define this macro if it does not need to do anything.
105 Defined in svr4.h. */
106 #undef ENDFILE_SPEC
110 #define MASK_DEFAULT_FRV \
111 (MASK_MEDIA \
112 | MASK_DOUBLE \
113 | MASK_MULADD \
114 | MASK_DWORD \
115 | MASK_PACK)
117 #define MASK_DEFAULT_FR500 \
118 (MASK_MEDIA | MASK_DWORD | MASK_PACK)
120 #define MASK_DEFAULT_FR550 \
121 (MASK_MEDIA | MASK_DWORD | MASK_PACK)
123 #define MASK_DEFAULT_FR450 \
124 (MASK_GPR_32 \
125 | MASK_FPR_32 \
126 | MASK_MEDIA \
127 | MASK_SOFT_FLOAT \
128 | MASK_DWORD \
129 | MASK_PACK)
131 #define MASK_DEFAULT_FR400 \
132 (MASK_GPR_32 \
133 | MASK_FPR_32 \
134 | MASK_MEDIA \
135 | MASK_ACC_4 \
136 | MASK_SOFT_FLOAT \
137 | MASK_DWORD \
138 | MASK_PACK)
140 #define MASK_DEFAULT_SIMPLE \
141 (MASK_GPR_32 | MASK_SOFT_FLOAT)
143 /* A C string constant that tells the GCC driver program options to pass to
144 `cc1'. It can also specify how to translate options you give to GCC into
145 options for GCC to pass to the `cc1'.
147 Do not define this macro if it does not need to do anything. */
148 /* For ABI compliance, we need to put bss data into the normal data section. */
151 /* A C string constant that tells the GCC driver program options to pass to
152 the linker. It can also specify how to translate options you give to GCC
153 into options for GCC to pass to the linker.
155 Do not define this macro if it does not need to do anything.
157 Defined in svr4.h. */
158 /* Override the svr4.h version with one that dispenses without the svr4
159 shared library options, notably -G. */
160 #undef LINK_SPEC
162 %{h*} %{v:-V} \
163 %{b} \
164 %{mfdpic:-melf32frvfd -z text} \
165 %{static:-dn -Bstatic} \
166 %{shared:-Bdynamic} \
167 %{symbolic:-Bsymbolic} \
168 %{G*} \
169 %{YP,*} \
170 %{Qy:} %{!Qn:-Qy}"
172 /* Another C string constant used much like `LINK_SPEC'. The difference
173 between the two is that `LIB_SPEC' is used at the end of the command given
174 to the linker.
176 If this macro is not defined, a default is provided that loads the standard
177 C library from the usual place. See `gcc.c'.
179 Defined in svr4.h. */
181 #undef LIB_SPEC
184 #ifndef CPU_TYPE
185 #define CPU_TYPE FRV_CPU_FR500
186 #endif
188 /* Run-time target specifications */
190 #define TARGET_CPU_CPP_BUILTINS() \
191 do \
192 { \
193 int issue_rate; \
194 \
197 \
198 issue_rate = frv_issue_rate (); \
199 if (issue_rate > 1) \
204 \
205 switch (frv_cpu_type) \
206 { \
207 case FRV_CPU_GENERIC: \
209 break; \
210 case FRV_CPU_FR550: \
212 break; \
213 case FRV_CPU_FR500: \
214 case FRV_CPU_TOMCAT: \
216 break; \
217 case FRV_CPU_FR450: \
219 break; \
220 case FRV_CPU_FR405: \
222 break; \
223 case FRV_CPU_FR400: \
225 break; \
226 case FRV_CPU_FR300: \
227 case FRV_CPU_SIMPLE: \
229 break; \
230 } \
231 \
232 if (TARGET_HARD_FLOAT) \
234 if (TARGET_DWORD) \
236 if (TARGET_FDPIC) \
238 if (flag_leading_underscore > 0) \
240 } \
241 while (0)
243 \f
244 #define TARGET_HAS_FPRS (TARGET_HARD_FLOAT || TARGET_MEDIA)
246 #define NUM_GPRS (TARGET_GPR_32? 32 : 64)
247 #define NUM_FPRS (!TARGET_HAS_FPRS? 0 : TARGET_FPR_32? 32 : 64)
248 #define NUM_ACCS (!TARGET_MEDIA? 0 : TARGET_ACC_4? 4 : 8)
250 /* X is a valid accumulator number if (X & ACC_MASK) == X. */
251 #define ACC_MASK \
252 (!TARGET_MEDIA ? 0 \
253 : TARGET_ACC_4 ? 3 \
254 : frv_cpu_type == FRV_CPU_FR450 ? 11 \
255 : 7)
257 /* Macros to identify the blend of media instructions available. Revision 1
258 is the one found on the FR500. Revision 2 includes the changes made for
259 the FR400.
261 Treat the generic processor as a revision 1 machine for now, for
262 compatibility with earlier releases. */
264 #define TARGET_MEDIA_REV1 \
265 (TARGET_MEDIA \
266 && (frv_cpu_type == FRV_CPU_GENERIC \
267 || frv_cpu_type == FRV_CPU_FR500))
269 #define TARGET_MEDIA_REV2 \
270 (TARGET_MEDIA \
271 && (frv_cpu_type == FRV_CPU_FR400 \
272 || frv_cpu_type == FRV_CPU_FR405 \
273 || frv_cpu_type == FRV_CPU_FR450 \
274 || frv_cpu_type == FRV_CPU_FR550))
276 #define TARGET_MEDIA_FR450 \
277 (frv_cpu_type == FRV_CPU_FR450)
279 #define TARGET_FR500_FR550_BUILTINS \
280 (frv_cpu_type == FRV_CPU_FR500 \
281 || frv_cpu_type == FRV_CPU_FR550)
283 #define TARGET_FR405_BUILTINS \
284 (frv_cpu_type == FRV_CPU_FR405 \
285 || frv_cpu_type == FRV_CPU_FR450)
287 #ifndef HAVE_AS_TLS
288 #define HAVE_AS_TLS 0
289 #endif
291 /* This macro is a C statement to print on `stderr' a string describing the
292 particular machine description choice. Every machine description should
293 define `TARGET_VERSION'. For example:
295 #ifdef MOTOROLA
296 #define TARGET_VERSION \
297 fprintf (stderr, " (68k, Motorola syntax)");
298 #else
299 #define TARGET_VERSION \
300 fprintf (stderr, " (68k, MIT syntax)");
301 #endif */
304 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) (TARGET_ALIGN_LABELS ? 3 : 0)
305 \f
306 /* Small Data Area Support. */
307 /* Maximum size of variables that go in .sdata/.sbss.
308 The -msdata=foo switch also controls how small variables are handled. */
309 #ifndef SDATA_DEFAULT_SIZE
310 #define SDATA_DEFAULT_SIZE 8
311 #endif
314 /* Storage Layout */
316 /* Define this macro to have the value 1 if the most significant bit in a byte
317 has the lowest number; otherwise define it to have the value zero. This
318 means that bit-field instructions count from the most significant bit. If
319 the machine has no bit-field instructions, then this must still be defined,
320 but it doesn't matter which value it is defined to. This macro need not be
321 a constant.
323 This macro does not affect the way structure fields are packed into bytes or
324 words; that is controlled by `BYTES_BIG_ENDIAN'. */
325 #define BITS_BIG_ENDIAN 1
327 /* Define this macro to have the value 1 if the most significant byte in a word
328 has the lowest number. This macro need not be a constant. */
329 #define BYTES_BIG_ENDIAN 1
331 /* Define this macro to have the value 1 if, in a multiword object, the most
332 significant word has the lowest number. This applies to both memory
333 locations and registers; GCC fundamentally assumes that the order of
334 words in memory is the same as the order in registers. This macro need not
335 be a constant. */
336 #define WORDS_BIG_ENDIAN 1
338 /* Number of storage units in a word; normally 4. */
339 #define UNITS_PER_WORD 4
341 /* A macro to update MODE and UNSIGNEDP when an object whose type is TYPE and
342 which has the specified mode and signedness is to be stored in a register.
343 This macro is only called when TYPE is a scalar type.
345 On most RISC machines, which only have operations that operate on a full
346 register, define this macro to set M to `word_mode' if M is an integer mode
347 narrower than `BITS_PER_WORD'. In most cases, only integer modes should be
348 widened because wider-precision floating-point operations are usually more
349 expensive than their narrower counterparts.
351 For most machines, the macro definition does not change UNSIGNEDP. However,
352 some machines, have instructions that preferentially handle either signed or
353 unsigned quantities of certain modes. For example, on the DEC Alpha, 32-bit
354 loads from memory and 32-bit add instructions sign-extend the result to 64
355 bits. On such machines, set UNSIGNEDP according to which kind of extension
356 is more efficient.
358 Do not define this macro if it would never modify MODE. */
359 #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \
360 do \
361 { \
362 if (GET_MODE_CLASS (MODE) == MODE_INT \
363 && GET_MODE_SIZE (MODE) < 4) \
364 (MODE) = SImode; \
365 } \
366 while (0)
368 /* Normal alignment required for function parameters on the stack, in bits.
369 All stack parameters receive at least this much alignment regardless of data
370 type. On most machines, this is the same as the size of an integer. */
371 #define PARM_BOUNDARY 32
373 /* Define this macro if you wish to preserve a certain alignment for the stack
374 pointer. The definition is a C expression for the desired alignment
375 (measured in bits).
377 If `PUSH_ROUNDING' is not defined, the stack will always be aligned to the
378 specified boundary. If `PUSH_ROUNDING' is defined and specifies a less
379 strict alignment than `STACK_BOUNDARY', the stack may be momentarily
380 unaligned while pushing arguments. */
381 #define STACK_BOUNDARY 64
383 /* Alignment required for a function entry point, in bits. */
384 #define FUNCTION_BOUNDARY 128
386 /* Biggest alignment that any data type can require on this machine,
387 in bits. */
388 #define BIGGEST_ALIGNMENT 64
390 /* @@@ A hack, needed because libobjc wants to use ADJUST_FIELD_ALIGN for
391 some reason. */
392 #ifdef IN_TARGET_LIBS
393 #define BIGGEST_FIELD_ALIGNMENT 64
394 #else
395 /* An expression for the alignment of a structure field FIELD if the
396 alignment computed in the usual way is COMPUTED. GCC uses this
397 value instead of the value in `BIGGEST_ALIGNMENT' or
398 `BIGGEST_FIELD_ALIGNMENT', if defined, for structure fields only. */
399 #define ADJUST_FIELD_ALIGN(FIELD, COMPUTED) \
400 frv_adjust_field_align (FIELD, COMPUTED)
401 #endif
403 /* If defined, a C expression to compute the alignment for a static variable.
404 TYPE is the data type, and ALIGN is the alignment that the object
405 would ordinarily have. The value of this macro is used instead of that
406 alignment to align the object.
408 If this macro is not defined, then ALIGN is used.
410 One use of this macro is to increase alignment of medium-size data to make
411 it all fit in fewer cache lines. Another is to cause character arrays to be
412 word-aligned so that `strcpy' calls that copy constants to character arrays
413 can be done inline. */
414 #define DATA_ALIGNMENT(TYPE, ALIGN) \
415 (TREE_CODE (TYPE) == ARRAY_TYPE \
416 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
417 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
419 /* If defined, a C expression to compute the alignment given to a constant that
420 is being placed in memory. CONSTANT is the constant and ALIGN is the
421 alignment that the object would ordinarily have. The value of this macro is
422 used instead of that alignment to align the object.
424 If this macro is not defined, then ALIGN is used.
426 The typical use of this macro is to increase alignment for string constants
427 to be word aligned so that `strcpy' calls that copy constants can be done
428 inline. */
429 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
430 (TREE_CODE (EXP) == STRING_CST \
431 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
433 /* Define this macro to be the value 1 if instructions will fail to work if
434 given data not on the nominal alignment. If instructions will merely go
435 slower in that case, define this macro as 0. */
436 #define STRICT_ALIGNMENT 1
438 /* Define this if you wish to imitate the way many other C compilers handle
439 alignment of bitfields and the structures that contain them.
441 The behavior is that the type written for a bit-field (`int', `short', or
442 other integer type) imposes an alignment for the entire structure, as if the
443 structure really did contain an ordinary field of that type. In addition,
444 the bit-field is placed within the structure so that it would fit within such
445 a field, not crossing a boundary for it.
447 Thus, on most machines, a bit-field whose type is written as `int' would not
448 cross a four-byte boundary, and would force four-byte alignment for the
449 whole structure. (The alignment used may not be four bytes; it is
450 controlled by the other alignment parameters.)
452 If the macro is defined, its definition should be a C expression; a nonzero
453 value for the expression enables this behavior.
455 Note that if this macro is not defined, or its value is zero, some bitfields
456 may cross more than one alignment boundary. The compiler can support such
457 references if there are `insv', `extv', and `extzv' insns that can directly
458 reference memory.
460 The other known way of making bitfields work is to define
461 `STRUCTURE_SIZE_BOUNDARY' as large as `BIGGEST_ALIGNMENT'. Then every
462 structure can be accessed with fullwords.
464 Unless the machine has bit-field instructions or you define
465 `STRUCTURE_SIZE_BOUNDARY' that way, you must define
466 `PCC_BITFIELD_TYPE_MATTERS' to have a nonzero value.
468 If your aim is to make GCC use the same conventions for laying out
469 bitfields as are used by another compiler, here is how to investigate what
470 the other compiler does. Compile and run this program:
472 struct foo1
473 {
474 char x;
475 char :0;
476 char y;
477 };
479 struct foo2
480 {
481 char x;
482 int :0;
483 char y;
484 };
486 main ()
487 {
488 printf ("Size of foo1 is %d\n",
489 sizeof (struct foo1));
490 printf ("Size of foo2 is %d\n",
491 sizeof (struct foo2));
492 exit (0);
493 }
495 If this prints 2 and 5, then the compiler's behavior is what you would get
496 from `PCC_BITFIELD_TYPE_MATTERS'.
498 Defined in svr4.h. */
499 #define PCC_BITFIELD_TYPE_MATTERS 1
501 \f
502 /* Layout of Source Language Data Types. */
504 #define CHAR_TYPE_SIZE 8
505 #define SHORT_TYPE_SIZE 16
506 #define INT_TYPE_SIZE 32
507 #define LONG_TYPE_SIZE 32
508 #define LONG_LONG_TYPE_SIZE 64
509 #define FLOAT_TYPE_SIZE 32
510 #define DOUBLE_TYPE_SIZE 64
511 #define LONG_DOUBLE_TYPE_SIZE 64
513 /* An expression whose value is 1 or 0, according to whether the type `char'
514 should be signed or unsigned by default. The user can always override this
515 default with the options `-fsigned-char' and `-funsigned-char'. */
516 #define DEFAULT_SIGNED_CHAR 1
518 \f
519 /* General purpose registers. */
525 /* small data register */
526 #define SDA_BASE_REG ((unsigned)(TARGET_FDPIC ? -1 : flag_pic ? PIC_REGNO : (GPR_FIRST + 16)))
531 #define HARD_REGNO_RENAME_OK(from,to) (TARGET_FDPIC ? ((to) != FDPIC_REG) : 1)
533 #define OUR_FDPIC_REG get_hard_reg_initial_val (SImode, FDPIC_REGNO)
540 /* We reserve the last CR and CCR in each category to be used as a reload
541 register to reload the CR/CCR registers. This is a kludge. */
550 /* Amount to shift a value to locate a ICC or FCC register in the CCR
551 register and shift it to the bottom 4 bits. */
552 #define CC_SHIFT_RIGHT(REGNO) (((REGNO) - CC_FIRST) << 2)
554 /* Mask to isolate a single ICC/FCC value. */
555 #define CC_MASK 0xf
557 /* Masks to isolate the various bits in an ICC field. */
563 /* Mask to isolate the N/Z flags in an ICC. */
564 #define ICC_MASK_NZ (ICC_MASK_N | ICC_MASK_Z)
566 /* Mask to isolate the Z/C flags in an ICC. */
567 #define ICC_MASK_ZC (ICC_MASK_Z | ICC_MASK_C)
569 /* Masks to isolate the various bits in a FCC field. */
575 /* For CCR registers, the machine wants CR4..CR7 to be used for integer
576 code and CR0..CR3 to be used for floating point. */
586 /* Amount to shift a value to locate a CR register in the CCCR special purpose
587 register and shift it to the bottom 2 bits. */
588 #define CR_SHIFT_RIGHT(REGNO) (((REGNO) - CR_FIRST) << 1)
590 /* Mask to isolate a single CR value. */
591 #define CR_MASK 0x3
601 #define SPR_FIRST 169
602 #define SPR_LAST 172
603 #define LR_REGNO (SPR_FIRST)
604 #define LCR_REGNO (SPR_FIRST + 1)
605 #define IACC_FIRST (SPR_FIRST + 2)
606 #define IACC_LAST (SPR_FIRST + 3)
608 #define GPR_P(R) IN_RANGE_P (R, GPR_FIRST, GPR_LAST)
609 #define GPR_OR_AP_P(R) (GPR_P (R) || (R) == ARG_POINTER_REGNUM)
610 #define FPR_P(R) IN_RANGE_P (R, FPR_FIRST, FPR_LAST)
611 #define CC_P(R) IN_RANGE_P (R, CC_FIRST, CC_LAST)
612 #define ICC_P(R) IN_RANGE_P (R, ICC_FIRST, ICC_LAST)
613 #define FCC_P(R) IN_RANGE_P (R, FCC_FIRST, FCC_LAST)
614 #define CR_P(R) IN_RANGE_P (R, CR_FIRST, CR_LAST)
615 #define ICR_P(R) IN_RANGE_P (R, ICR_FIRST, ICR_LAST)
616 #define FCR_P(R) IN_RANGE_P (R, FCR_FIRST, FCR_LAST)
617 #define ACC_P(R) IN_RANGE_P (R, ACC_FIRST, ACC_LAST)
618 #define ACCG_P(R) IN_RANGE_P (R, ACCG_FIRST, ACCG_LAST)
619 #define SPR_P(R) IN_RANGE_P (R, SPR_FIRST, SPR_LAST)
621 #define GPR_OR_PSEUDO_P(R) (GPR_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
622 #define FPR_OR_PSEUDO_P(R) (FPR_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
623 #define GPR_AP_OR_PSEUDO_P(R) (GPR_OR_AP_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
624 #define CC_OR_PSEUDO_P(R) (CC_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
625 #define ICC_OR_PSEUDO_P(R) (ICC_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
626 #define FCC_OR_PSEUDO_P(R) (FCC_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
627 #define CR_OR_PSEUDO_P(R) (CR_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
628 #define ICR_OR_PSEUDO_P(R) (ICR_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
629 #define FCR_OR_PSEUDO_P(R) (FCR_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
630 #define ACC_OR_PSEUDO_P(R) (ACC_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
631 #define ACCG_OR_PSEUDO_P(R) (ACCG_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
633 #define MAX_STACK_IMMEDIATE_OFFSET 2047
635 \f
636 /* Register Basics. */
638 /* Number of hardware registers known to the compiler. They receive numbers 0
639 through `FIRST_PSEUDO_REGISTER-1'; thus, the first pseudo register's number
640 really is assigned the number `FIRST_PSEUDO_REGISTER'. */
641 #define FIRST_PSEUDO_REGISTER (SPR_LAST + 1)
643 /* The first/last register that can contain the arguments to a function. */
644 #define FIRST_ARG_REGNUM (GPR_FIRST + 8)
645 #define LAST_ARG_REGNUM (FIRST_ARG_REGNUM + FRV_NUM_ARG_REGS - 1)
647 /* Registers used by the exception handling functions. These should be
648 registers that are not otherwise used by the calling sequence. */
649 #define FIRST_EH_REGNUM 14
650 #define LAST_EH_REGNUM 15
652 /* Scratch registers used in the prologue, epilogue and thunks.
653 OFFSET_REGNO is for loading constant addends that are too big for a
654 single instruction. TEMP_REGNO is used for transferring SPRs to and from
655 the stack, and various other activities. */
656 #define OFFSET_REGNO 4
657 #define TEMP_REGNO 5
659 /* Registers used in the prologue. OLD_SP_REGNO is the old stack pointer,
660 which is sometimes used to set up the frame pointer. */
661 #define OLD_SP_REGNO 6
663 /* Registers used in the epilogue. STACKADJ_REGNO stores the exception
664 handler's stack adjustment. */
665 #define STACKADJ_REGNO 6
667 /* Registers used in thunks. JMP_REGNO is used for loading the target
668 address. */
669 #define JUMP_REGNO 6
671 #define EH_RETURN_DATA_REGNO(N) ((N) <= (LAST_EH_REGNUM - FIRST_EH_REGNUM)? \
672 (N) + FIRST_EH_REGNUM : INVALID_REGNUM)
673 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (SImode, STACKADJ_REGNO)
674 #define EH_RETURN_HANDLER_RTX RETURN_ADDR_RTX (0, frame_pointer_rtx)
676 #define EPILOGUE_USES(REGNO) ((REGNO) == LR_REGNO)
678 /* An initializer that says which registers are used for fixed purposes all
679 throughout the compiled code and are therefore not available for general
680 allocation. These would include the stack pointer, the frame pointer
681 (except on machines where that can be used as a general register when no
682 frame pointer is needed), the program counter on machines where that is
683 considered one of the addressable registers, and any other numbered register
684 with a standard use.
686 This information is expressed as a sequence of numbers, separated by commas
687 and surrounded by braces. The Nth number is 1 if register N is fixed, 0
688 otherwise.
690 The table initialized from this macro, and the table initialized by the
691 following one, may be overridden at run time either automatically, by the
692 actions of the macro `CONDITIONAL_REGISTER_USAGE', or by the user with the
693 command options `-ffixed-REG', `-fcall-used-REG' and `-fcall-saved-REG'. */
695 /* gr0 -- Hard Zero
696 gr1 -- Stack Pointer
697 gr2 -- Frame Pointer
698 gr3 -- Hidden Parameter
699 gr16 -- Small Data reserved
700 gr17 -- Pic reserved
701 gr28 -- OS reserved
702 gr29 -- OS reserved
703 gr30 -- OS reserved
704 gr31 -- OS reserved
705 cr3 -- reserved to reload FCC registers.
706 cr7 -- reserved to reload ICC registers. */
707 #define FIXED_REGISTERS \
741 }
743 /* Like `FIXED_REGISTERS' but has 1 for each register that is clobbered (in
744 general) by function calls as well as for fixed registers. This macro
745 therefore identifies the registers that are not available for general
746 allocation of values that must live across function calls.
748 If a register has 0 in `CALL_USED_REGISTERS', the compiler automatically
749 saves it on function entry and restores it on function exit, if the register
750 is used within the function. */
751 #define CALL_USED_REGISTERS \
785 }
787 \f
788 /* Order of allocation of registers. */
790 /* If defined, an initializer for a vector of integers, containing the numbers
791 of hard registers in the order in which GCC should prefer to use them
792 (from most preferred to least).
794 If this macro is not defined, registers are used lowest numbered first (all
795 else being equal).
797 One use of this macro is on machines where the highest numbered registers
798 must always be saved and the save-multiple-registers instruction supports
799 only sequences of consecutive registers. On such machines, define
800 `REG_ALLOC_ORDER' to be an initializer that lists the highest numbered
801 allocatable register first. */
803 /* On the FRV, allocate GR16 and GR17 after other saved registers so that we
804 have a better chance of allocating 2 registers at a time and can use the
805 double word load/store instructions in the prologue. */
806 #define REG_ALLOC_ORDER \
807 { \
809 GPR_FIRST + 4, GPR_FIRST + 5, GPR_FIRST + 6, GPR_FIRST + 7, \
810 GPR_FIRST + 8, GPR_FIRST + 9, GPR_FIRST + 10, GPR_FIRST + 11, \
811 GPR_FIRST + 12, GPR_FIRST + 13, GPR_FIRST + 14, GPR_FIRST + 15, \
812 GPR_FIRST + 32, GPR_FIRST + 33, GPR_FIRST + 34, GPR_FIRST + 35, \
813 GPR_FIRST + 36, GPR_FIRST + 37, GPR_FIRST + 38, GPR_FIRST + 39, \
814 GPR_FIRST + 40, GPR_FIRST + 41, GPR_FIRST + 42, GPR_FIRST + 43, \
815 GPR_FIRST + 44, GPR_FIRST + 45, GPR_FIRST + 46, GPR_FIRST + 47, \
816 \
817 FPR_FIRST + 0, FPR_FIRST + 1, FPR_FIRST + 2, FPR_FIRST + 3, \
818 FPR_FIRST + 4, FPR_FIRST + 5, FPR_FIRST + 6, FPR_FIRST + 7, \
819 FPR_FIRST + 8, FPR_FIRST + 9, FPR_FIRST + 10, FPR_FIRST + 11, \
820 FPR_FIRST + 12, FPR_FIRST + 13, FPR_FIRST + 14, FPR_FIRST + 15, \
821 FPR_FIRST + 32, FPR_FIRST + 33, FPR_FIRST + 34, FPR_FIRST + 35, \
822 FPR_FIRST + 36, FPR_FIRST + 37, FPR_FIRST + 38, FPR_FIRST + 39, \
823 FPR_FIRST + 40, FPR_FIRST + 41, FPR_FIRST + 42, FPR_FIRST + 43, \
824 FPR_FIRST + 44, FPR_FIRST + 45, FPR_FIRST + 46, FPR_FIRST + 47, \
825 \
826 ICC_FIRST + 0, ICC_FIRST + 1, ICC_FIRST + 2, ICC_FIRST + 3, \
827 FCC_FIRST + 0, FCC_FIRST + 1, FCC_FIRST + 2, FCC_FIRST + 3, \
828 CR_FIRST + 0, CR_FIRST + 1, CR_FIRST + 2, CR_FIRST + 3, \
829 CR_FIRST + 4, CR_FIRST + 5, CR_FIRST + 6, CR_FIRST + 7, \
830 \
832 GPR_FIRST + 18, GPR_FIRST + 19, \
833 GPR_FIRST + 20, GPR_FIRST + 21, GPR_FIRST + 22, GPR_FIRST + 23, \
834 GPR_FIRST + 24, GPR_FIRST + 25, GPR_FIRST + 26, GPR_FIRST + 27, \
835 GPR_FIRST + 48, GPR_FIRST + 49, GPR_FIRST + 50, GPR_FIRST + 51, \
836 GPR_FIRST + 52, GPR_FIRST + 53, GPR_FIRST + 54, GPR_FIRST + 55, \
837 GPR_FIRST + 56, GPR_FIRST + 57, GPR_FIRST + 58, GPR_FIRST + 59, \
838 GPR_FIRST + 60, GPR_FIRST + 61, GPR_FIRST + 62, GPR_FIRST + 63, \
839 GPR_FIRST + 16, GPR_FIRST + 17, \
840 \
841 FPR_FIRST + 16, FPR_FIRST + 17, FPR_FIRST + 18, FPR_FIRST + 19, \
842 FPR_FIRST + 20, FPR_FIRST + 21, FPR_FIRST + 22, FPR_FIRST + 23, \
843 FPR_FIRST + 24, FPR_FIRST + 25, FPR_FIRST + 26, FPR_FIRST + 27, \
844 FPR_FIRST + 28, FPR_FIRST + 29, FPR_FIRST + 30, FPR_FIRST + 31, \
845 FPR_FIRST + 48, FPR_FIRST + 49, FPR_FIRST + 50, FPR_FIRST + 51, \
846 FPR_FIRST + 52, FPR_FIRST + 53, FPR_FIRST + 54, FPR_FIRST + 55, \
847 FPR_FIRST + 56, FPR_FIRST + 57, FPR_FIRST + 58, FPR_FIRST + 59, \
848 FPR_FIRST + 60, FPR_FIRST + 61, FPR_FIRST + 62, FPR_FIRST + 63, \
849 \
851 GPR_FIRST + 0, GPR_FIRST + 1, GPR_FIRST + 2, GPR_FIRST + 3, \
852 GPR_FIRST + 28, GPR_FIRST + 29, GPR_FIRST + 30, GPR_FIRST + 31, \
853 ACC_FIRST + 0, ACC_FIRST + 1, ACC_FIRST + 2, ACC_FIRST + 3, \
854 ACC_FIRST + 4, ACC_FIRST + 5, ACC_FIRST + 6, ACC_FIRST + 7, \
855 ACC_FIRST + 8, ACC_FIRST + 9, ACC_FIRST + 10, ACC_FIRST + 11, \
856 ACCG_FIRST + 0, ACCG_FIRST + 1, ACCG_FIRST + 2, ACCG_FIRST + 3, \
857 ACCG_FIRST + 4, ACCG_FIRST + 5, ACCG_FIRST + 6, ACCG_FIRST + 7, \
858 ACCG_FIRST + 8, ACCG_FIRST + 9, ACCG_FIRST + 10, ACCG_FIRST + 11, \
859 AP_FIRST, LR_REGNO, LCR_REGNO, \
860 IACC_FIRST + 0, IACC_FIRST + 1 \
861 }
863 \f
864 /* How Values Fit in Registers. */
866 /* A C expression for the number of consecutive hard registers, starting at
867 register number REGNO, required to hold a value of mode MODE.
869 On a machine where all registers are exactly one word, a suitable definition
870 of this macro is
872 #define HARD_REGNO_NREGS(REGNO, MODE) \
873 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) \
874 / UNITS_PER_WORD)) */
876 /* On the FRV, make the CC modes take 3 words in the integer registers, so that
877 we can build the appropriate instructions to properly reload the values. */
878 #define HARD_REGNO_NREGS(REGNO, MODE) frv_hard_regno_nregs (REGNO, MODE)
880 /* A C expression that is nonzero if it is permissible to store a value of mode
881 MODE in hard register number REGNO (or in several registers starting with
882 that one). For a machine where all registers are equivalent, a suitable
883 definition is
885 #define HARD_REGNO_MODE_OK(REGNO, MODE) 1
887 It is not necessary for this macro to check for the numbers of fixed
888 registers, because the allocation mechanism considers them to be always
889 occupied.
891 On some machines, double-precision values must be kept in even/odd register
892 pairs. The way to implement that is to define this macro to reject odd
893 register numbers for such modes.
895 The minimum requirement for a mode to be OK in a register is that the
896 `movMODE' instruction pattern support moves between the register and any
897 other hard register for which the mode is OK; and that moving a value into
898 the register and back out not alter it.
900 Since the same instruction used to move `SImode' will work for all narrower
901 integer modes, it is not necessary on any machine for `HARD_REGNO_MODE_OK'
902 to distinguish between these modes, provided you define patterns `movhi',
903 etc., to take advantage of this. This is useful because of the interaction
904 between `HARD_REGNO_MODE_OK' and `MODES_TIEABLE_P'; it is very desirable for
905 all integer modes to be tieable.
907 Many machines have special registers for floating point arithmetic. Often
908 people assume that floating point machine modes are allowed only in floating
909 point registers. This is not true. Any registers that can hold integers
910 can safely *hold* a floating point machine mode, whether or not floating
911 arithmetic can be done on it in those registers. Integer move instructions
912 can be used to move the values.
914 On some machines, though, the converse is true: fixed-point machine modes
915 may not go in floating registers. This is true if the floating registers
916 normalize any value stored in them, because storing a non-floating value
917 there would garble it. In this case, `HARD_REGNO_MODE_OK' should reject
918 fixed-point machine modes in floating registers. But if the floating
919 registers do not automatically normalize, if you can store any bit pattern
920 in one and retrieve it unchanged without a trap, then any machine mode may
921 go in a floating register, so you can define this macro to say so.
923 The primary significance of special floating registers is rather that they
924 are the registers acceptable in floating point arithmetic instructions.
925 However, this is of no concern to `HARD_REGNO_MODE_OK'. You handle it by
926 writing the proper constraints for those instructions.
928 On some machines, the floating registers are especially slow to access, so
929 that it is better to store a value in a stack frame than in such a register
930 if floating point arithmetic is not being done. As long as the floating
931 registers are not in class `GENERAL_REGS', they will not be used unless some
932 pattern's constraint asks for one. */
933 #define HARD_REGNO_MODE_OK(REGNO, MODE) frv_hard_regno_mode_ok (REGNO, MODE)
935 /* A C expression that is nonzero if it is desirable to choose register
936 allocation so as to avoid move instructions between a value of mode MODE1
937 and a value of mode MODE2.
939 If `HARD_REGNO_MODE_OK (R, MODE1)' and `HARD_REGNO_MODE_OK (R, MODE2)' are
940 ever different for any R, then `MODES_TIEABLE_P (MODE1, MODE2)' must be
941 zero. */
942 #define MODES_TIEABLE_P(MODE1, MODE2) (MODE1 == MODE2)
944 /* Define this macro if the compiler should avoid copies to/from CCmode
945 registers. You should only define this macro if support fo copying to/from
946 CCmode is incomplete. */
947 #define AVOID_CCMODE_COPIES
949 \f
950 /* Register Classes. */
952 /* An enumeral type that must be defined with all the register class names as
953 enumeral values. `NO_REGS' must be first. `ALL_REGS' must be the last
954 register class, followed by one more enumeral value, `LIM_REG_CLASSES',
955 which is not a register class but rather tells how many classes there are.
957 Each register class has a number, which is the value of casting the class
958 name to type `int'. The number serves as an index in many of the tables
959 described below. */
960 enum reg_class
961 {
962 NO_REGS,
963 ICC_REGS,
964 FCC_REGS,
965 CC_REGS,
966 ICR_REGS,
967 FCR_REGS,
968 CR_REGS,
969 LCR_REG,
970 LR_REG,
971 GR8_REGS,
972 GR9_REGS,
973 GR89_REGS,
974 FDPIC_REGS,
975 FDPIC_FPTR_REGS,
976 FDPIC_CALL_REGS,
977 SPR_REGS,
978 QUAD_ACC_REGS,
979 EVEN_ACC_REGS,
980 ACC_REGS,
981 ACCG_REGS,
982 QUAD_FPR_REGS,
983 FEVEN_REGS,
984 FPR_REGS,
985 QUAD_REGS,
986 EVEN_REGS,
987 GPR_REGS,
988 ALL_REGS,
989 LIM_REG_CLASSES
990 };
992 #define GENERAL_REGS GPR_REGS
994 /* The number of distinct register classes, defined as follows:
996 #define N_REG_CLASSES (int) LIM_REG_CLASSES */
997 #define N_REG_CLASSES ((int) LIM_REG_CLASSES)
999 /* An initializer containing the names of the register classes as C string
1000 constants. These names are used in writing some of the debugging dumps. */
1001 #define REG_CLASS_NAMES { \
1029 }
1031 /* An initializer containing the contents of the register classes, as integers
1032 which are bit masks. The Nth integer specifies the contents of class N.
1033 The way the integer MASK is interpreted is that register R is in the class
1034 if `MASK & (1 << R)' is 1.
1036 When the machine has more than 32 registers, an integer does not suffice.
1037 Then the integers are replaced by sub-initializers, braced groupings
1038 containing several integers. Each sub-initializer must be suitable as an
1039 initializer for the type `HARD_REG_SET' which is defined in
1040 `hard-reg-set.h'. */
1041 #define REG_CLASS_CONTENTS \
1070 }
1072 /* The following macro defines cover classes for Integrated Register
1073 Allocator. Cover classes is a set of non-intersected register
1074 classes covering all hard registers used for register allocation
1075 purpose. Any move between two registers of a cover class should be
1076 cheaper than load or store of the registers. The macro value is
1077 array of register classes with LIM_REG_CLASSES used as the end
1078 marker. */
1080 #define IRA_COVER_CLASSES \
1081 { \
1082 GPR_REGS, FPR_REGS, ACC_REGS, ICR_REGS, FCR_REGS, ICC_REGS, FCC_REGS, \
1083 ACCG_REGS, SPR_REGS, \
1084 LIM_REG_CLASSES \
1085 }
1087 /* A C expression whose value is a register class containing hard register
1088 REGNO. In general there is more than one such class; choose a class which
1089 is "minimal", meaning that no smaller class also contains the register. */
1092 #define REGNO_REG_CLASS(REGNO) regno_reg_class [REGNO]
1094 /* A macro whose definition is the name of the class to which a valid base
1095 register must belong. A base register is one used in an address which is
1096 the register value plus a displacement. */
1097 #define BASE_REG_CLASS GPR_REGS
1099 /* A macro whose definition is the name of the class to which a valid index
1100 register must belong. An index register is one used in an address where its
1101 value is either multiplied by a scale factor or added to another register
1102 (as well as added to a displacement). */
1103 #define INDEX_REG_CLASS GPR_REGS
1105 /* A C expression which defines the machine-dependent operand constraint
1106 letters for register classes. If CHAR is such a letter, the value should be
1107 the register class corresponding to it. Otherwise, the value should be
1108 `NO_REGS'. The register letter `r', corresponding to class `GENERAL_REGS',
1109 will not be passed to this macro; you do not need to handle it.
1111 The following letters are unavailable, due to being used as
1112 constraints:
1113 '0'..'9'
1114 '<', '>'
1115 'E', 'F', 'G', 'H'
1116 'I', 'J', 'K', 'L', 'M', 'N', 'O', 'P'
1117 'Q', 'R', 'S', 'T', 'U'
1118 'V', 'X'
1119 'g', 'i', 'm', 'n', 'o', 'p', 'r', 's' */
1122 #define REG_CLASS_FROM_LETTER(CHAR) reg_class_from_letter [(unsigned char)(CHAR)]
1124 /* A C expression which is nonzero if register number NUM is suitable for use
1125 as a base register in operand addresses. It may be either a suitable hard
1126 register or a pseudo register that has been allocated such a hard register. */
1127 #define REGNO_OK_FOR_BASE_P(NUM) \
1128 ((NUM) < FIRST_PSEUDO_REGISTER \
1129 ? GPR_P (NUM) \
1130 : (reg_renumber [NUM] >= 0 && GPR_P (reg_renumber [NUM])))
1132 /* A C expression which is nonzero if register number NUM is suitable for use
1133 as an index register in operand addresses. It may be either a suitable hard
1134 register or a pseudo register that has been allocated such a hard register.
1136 The difference between an index register and a base register is that the
1137 index register may be scaled. If an address involves the sum of two
1138 registers, neither one of them scaled, then either one may be labeled the
1139 "base" and the other the "index"; but whichever labeling is used must fit
1140 the machine's constraints of which registers may serve in each capacity.
1141 The compiler will try both labelings, looking for one that is valid, and
1142 will reload one or both registers only if neither labeling works. */
1143 #define REGNO_OK_FOR_INDEX_P(NUM) \
1144 ((NUM) < FIRST_PSEUDO_REGISTER \
1145 ? GPR_P (NUM) \
1146 : (reg_renumber [NUM] >= 0 && GPR_P (reg_renumber [NUM])))
1148 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X) \
1149 frv_secondary_reload_class (CLASS, MODE, X)
1151 #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, X) \
1152 frv_secondary_reload_class (CLASS, MODE, X)
1154 /* A C expression for the maximum number of consecutive registers of
1155 class CLASS needed to hold a value of mode MODE.
1157 This is closely related to the macro `HARD_REGNO_NREGS'. In fact, the value
1158 of the macro `CLASS_MAX_NREGS (CLASS, MODE)' should be the maximum value of
1159 `HARD_REGNO_NREGS (REGNO, MODE)' for all REGNO values in the class CLASS.
1161 This macro helps control the handling of multiple-word values in
1162 the reload pass.
1164 This declaration is required. */
1165 #define CLASS_MAX_NREGS(CLASS, MODE) frv_class_max_nregs (CLASS, MODE)
1167 #define ZERO_P(x) (x == CONST0_RTX (GET_MODE (x)))
1169 /* 6-bit signed immediate. */
1170 #define CONST_OK_FOR_I(VALUE) IN_RANGE_P(VALUE, -32, 31)
1171 /* 10-bit signed immediate. */
1172 #define CONST_OK_FOR_J(VALUE) IN_RANGE_P(VALUE, -512, 511)
1173 /* Unused */
1174 #define CONST_OK_FOR_K(VALUE) 0
1175 /* 16-bit signed immediate. */
1176 #define CONST_OK_FOR_L(VALUE) IN_RANGE_P(VALUE, -32768, 32767)
1177 /* 16-bit unsigned immediate. */
1178 #define CONST_OK_FOR_M(VALUE) IN_RANGE_P (VALUE, 0, 65535)
1179 /* 12-bit signed immediate that is negative. */
1180 #define CONST_OK_FOR_N(VALUE) IN_RANGE_P(VALUE, -2048, -1)
1181 /* Zero */
1182 #define CONST_OK_FOR_O(VALUE) ((VALUE) == 0)
1183 /* 12-bit signed immediate that is negative. */
1184 #define CONST_OK_FOR_P(VALUE) IN_RANGE_P(VALUE, 1, 2047)
1186 /* A C expression that defines the machine-dependent operand constraint letters
1187 (`I', `J', `K', .. 'P') that specify particular ranges of integer values.
1188 If C is one of those letters, the expression should check that VALUE, an
1189 integer, is in the appropriate range and return 1 if so, 0 otherwise. If C
1190 is not one of those letters, the value should be 0 regardless of VALUE. */
1191 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
1200 : 0)
1203 /* A C expression that defines the machine-dependent operand constraint letters
1204 (`G', `H') that specify particular ranges of `const_double' values.
1206 If C is one of those letters, the expression should check that VALUE, an RTX
1207 of code `const_double', is in the appropriate range and return 1 if so, 0
1208 otherwise. If C is not one of those letters, the value should be 0
1209 regardless of VALUE.
1211 `const_double' is used for all floating-point constants and for `DImode'
1212 fixed-point constants. A given letter can accept either or both kinds of
1213 values. It can use `GET_MODE' to distinguish between these kinds. */
1215 #define CONST_DOUBLE_OK_FOR_G(VALUE) \
1216 ((GET_MODE (VALUE) == VOIDmode \
1217 && CONST_DOUBLE_LOW (VALUE) == 0 \
1218 && CONST_DOUBLE_HIGH (VALUE) == 0) \
1219 || ((GET_MODE (VALUE) == SFmode \
1220 || GET_MODE (VALUE) == DFmode) \
1221 && (VALUE) == CONST0_RTX (GET_MODE (VALUE))))
1223 #define CONST_DOUBLE_OK_FOR_H(VALUE) 0
1225 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
1228 : 0)
1230 /* A C expression that defines the optional machine-dependent constraint
1231 letters (`Q', `R', `S', `T', `U') that can be used to segregate specific
1232 types of operands, usually memory references, for the target machine.
1233 Normally this macro will not be defined. If it is required for a particular
1234 target machine, it should return 1 if VALUE corresponds to the operand type
1235 represented by the constraint letter C. If C is not defined as an extra
1236 constraint, the value returned should be 0 regardless of VALUE.
1238 For example, on the ROMP, load instructions cannot have their output in r0
1239 if the memory reference contains a symbolic address. Constraint letter `Q'
1240 is defined as representing a memory address that does *not* contain a
1241 symbolic address. An alternative is specified with a `Q' constraint on the
1242 input and `r' on the output. The next alternative specifies `m' on the
1243 input and a register class that does not include r0 on the output. */
1245 /* 12-bit relocations. */
1246 #define EXTRA_CONSTRAINT_FOR_Q(VALUE) \
1247 (got12_operand (VALUE, GET_MODE (VALUE)))
1249 /* Double word memory ops that take one instruction. */
1250 #define EXTRA_CONSTRAINT_FOR_R(VALUE) \
1251 (dbl_memory_one_insn_operand (VALUE, GET_MODE (VALUE)))
1253 /* SYMBOL_REF */
1254 #define EXTRA_CONSTRAINT_FOR_S(VALUE) \
1255 (CONSTANT_P (VALUE) && call_operand (VALUE, VOIDmode))
1257 /* Double word memory ops that take two instructions. */
1258 #define EXTRA_CONSTRAINT_FOR_T(VALUE) \
1259 (dbl_memory_two_insn_operand (VALUE, GET_MODE (VALUE)))
1261 /* Memory operand for conditional execution. */
1262 #define EXTRA_CONSTRAINT_FOR_U(VALUE) \
1263 (condexec_memory_operand (VALUE, GET_MODE (VALUE)))
1265 #define EXTRA_CONSTRAINT(VALUE, C) \
1271 : 0)
1273 #define EXTRA_MEMORY_CONSTRAINT(C,STR) \
1276 #define CONSTRAINT_LEN(C, STR) \
1279 #define REG_CLASS_FROM_CONSTRAINT(C, STR) \
1285 REG_CLASS_FROM_LETTER ((C)))
1287 \f
1288 /* Basic Stack Layout. */
1290 /* Structure to describe information about a saved range of registers */
1303 /* Register ranges to look into saving. */
1314 /* Values for save_p field. */
1319 /* Structure used to define the frv stack. */
1333 /* register range information */
1335 /* offset to store each register */
1337 /* whether to save register (& reg+1) */
1341 /* Define this macro if pushing a word onto the stack moves the stack pointer
1342 to a smaller address. */
1343 #define STACK_GROWS_DOWNWARD 1
1345 /* Define this macro to nonzero if the addresses of local variable slots
1346 are at negative offsets from the frame pointer. */
1347 #define FRAME_GROWS_DOWNWARD 1
1349 /* Offset from the frame pointer to the first local variable slot to be
1350 allocated.
1352 If `FRAME_GROWS_DOWNWARD', find the next slot's offset by subtracting the
1353 first slot's length from `STARTING_FRAME_OFFSET'. Otherwise, it is found by
1354 adding the length of the first slot to the value `STARTING_FRAME_OFFSET'. */
1355 #define STARTING_FRAME_OFFSET 0
1357 /* Offset from the stack pointer register to the first location at which
1358 outgoing arguments are placed. If not specified, the default value of zero
1359 is used. This is the proper value for most machines.
1361 If `ARGS_GROW_DOWNWARD', this is the offset to the location above the first
1362 location at which outgoing arguments are placed. */
1363 #define STACK_POINTER_OFFSET 0
1365 /* Offset from the argument pointer register to the first argument's address.
1366 On some machines it may depend on the data type of the function.
1368 If `ARGS_GROW_DOWNWARD', this is the offset to the location above the first
1369 argument's address. */
1370 #define FIRST_PARM_OFFSET(FUNDECL) 0
1372 /* A C expression whose value is RTL representing the address in a stack frame
1373 where the pointer to the caller's frame is stored. Assume that FRAMEADDR is
1374 an RTL expression for the address of the stack frame itself.
1376 If you don't define this macro, the default is to return the value of
1377 FRAMEADDR--that is, the stack frame address is also the address of the stack
1378 word that points to the previous frame. */
1379 #define DYNAMIC_CHAIN_ADDRESS(FRAMEADDR) frv_dynamic_chain_address (FRAMEADDR)
1381 /* A C expression whose value is RTL representing the value of the return
1382 address for the frame COUNT steps up from the current frame, after the
1383 prologue. FRAMEADDR is the frame pointer of the COUNT frame, or the frame
1384 pointer of the COUNT - 1 frame if `RETURN_ADDR_IN_PREVIOUS_FRAME' is
1385 defined.
1387 The value of the expression must always be the correct address when COUNT is
1388 zero, but may be `NULL_RTX' if there is not way to determine the return
1389 address of other frames. */
1390 #define RETURN_ADDR_RTX(COUNT, FRAMEADDR) frv_return_addr_rtx (COUNT, FRAMEADDR)
1392 #define RETURN_POINTER_REGNUM LR_REGNO
1394 /* A C expression whose value is RTL representing the location of the incoming
1395 return address at the beginning of any function, before the prologue. This
1396 RTL is either a `REG', indicating that the return value is saved in `REG',
1397 or a `MEM' representing a location in the stack.
1399 You only need to define this macro if you want to support call frame
1400 debugging information like that provided by DWARF 2. */
1401 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (SImode, RETURN_POINTER_REGNUM)
1403 \f
1404 /* Register That Address the Stack Frame. */
1406 /* The register number of the stack pointer register, which must also be a
1407 fixed register according to `FIXED_REGISTERS'. On most machines, the
1408 hardware determines which register this is. */
1409 #define STACK_POINTER_REGNUM (GPR_FIRST + 1)
1411 /* The register number of the frame pointer register, which is used to access
1412 automatic variables in the stack frame. On some machines, the hardware
1413 determines which register this is. On other machines, you can choose any
1414 register you wish for this purpose. */
1415 #define FRAME_POINTER_REGNUM (GPR_FIRST + 2)
1417 /* The register number of the arg pointer register, which is used to access the
1418 function's argument list. On some machines, this is the same as the frame
1419 pointer register. On some machines, the hardware determines which register
1420 this is. On other machines, you can choose any register you wish for this
1421 purpose. If this is not the same register as the frame pointer register,
1422 then you must mark it as a fixed register according to `FIXED_REGISTERS', or
1423 arrange to be able to eliminate it. */
1425 /* On frv this is a fake register that is eliminated in
1426 terms of either the frame pointer or stack pointer. */
1427 #define ARG_POINTER_REGNUM AP_FIRST
1429 /* Register numbers used for passing a function's static chain pointer. If
1430 register windows are used, the register number as seen by the called
1431 function is `STATIC_CHAIN_INCOMING_REGNUM', while the register number as
1432 seen by the calling function is `STATIC_CHAIN_REGNUM'. If these registers
1433 are the same, `STATIC_CHAIN_INCOMING_REGNUM' need not be defined.
1435 The static chain register need not be a fixed register.
1437 If the static chain is passed in memory, these macros should not be defined;
1438 instead, the next two macros should be defined. */
1439 #define STATIC_CHAIN_REGNUM (GPR_FIRST + 7)
1440 #define STATIC_CHAIN_INCOMING_REGNUM (GPR_FIRST + 7)
1442 \f
1443 /* Eliminating the Frame Pointer and the Arg Pointer. */
1445 /* If defined, this macro specifies a table of register pairs used to eliminate
1446 unneeded registers that point into the stack frame. If it is not defined,
1447 the only elimination attempted by the compiler is to replace references to
1448 the frame pointer with references to the stack pointer.
1450 The definition of this macro is a list of structure initializations, each of
1451 which specifies an original and replacement register.
1453 On some machines, the position of the argument pointer is not known until
1454 the compilation is completed. In such a case, a separate hard register must
1455 be used for the argument pointer. This register can be eliminated by
1456 replacing it with either the frame pointer or the argument pointer,
1457 depending on whether or not the frame pointer has been eliminated.
1459 In this case, you might specify:
1460 #define ELIMINABLE_REGS \
1461 {{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1462 {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
1463 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
1465 Note that the elimination of the argument pointer with the stack pointer is
1466 specified first since that is the preferred elimination. */
1468 #define ELIMINABLE_REGS \
1469 { \
1470 {ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1471 {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
1472 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM} \
1473 }
1475 /* This macro is similar to `INITIAL_FRAME_POINTER_OFFSET'. It specifies the
1476 initial difference between the specified pair of registers. This macro must
1477 be defined if `ELIMINABLE_REGS' is defined. */
1479 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
1480 (OFFSET) = frv_initial_elimination_offset (FROM, TO)
1482 \f
1483 /* Passing Function Arguments on the Stack. */
1485 /* If defined, the maximum amount of space required for outgoing arguments will
1486 be computed and placed into the variable
1487 `crtl->outgoing_args_size'. No space will be pushed onto the
1488 stack for each call; instead, the function prologue should increase the
1489 stack frame size by this amount.
1491 Defining both `PUSH_ROUNDING' and `ACCUMULATE_OUTGOING_ARGS' is not
1492 proper. */
1493 #define ACCUMULATE_OUTGOING_ARGS 1
1495 \f
1496 /* The number of register assigned to holding function arguments. */
1498 #define FRV_NUM_ARG_REGS 6
1500 /* A C type for declaring a variable that is used as the first argument of
1501 `FUNCTION_ARG' and other related values. For some target machines, the type
1502 `int' suffices and can hold the number of bytes of argument so far.
1504 There is no need to record in `CUMULATIVE_ARGS' anything about the arguments
1505 that have been passed on the stack. The compiler has other variables to
1506 keep track of that. For target machines on which all arguments are passed
1507 on the stack, there is no need to store anything in `CUMULATIVE_ARGS';
1508 however, the data structure must exist and should not be empty, so use
1509 `int'. */
1510 #define CUMULATIVE_ARGS int
1512 /* A C statement (sans semicolon) for initializing the variable CUM for the
1513 state at the beginning of the argument list. The variable has type
1514 `CUMULATIVE_ARGS'. The value of FNTYPE is the tree node for the data type
1515 of the function which will receive the args, or 0 if the args are to a
1516 compiler support library function. The value of INDIRECT is nonzero when
1517 processing an indirect call, for example a call through a function pointer.
1518 The value of INDIRECT is zero for a call to an explicitly named function, a
1519 library function call, or when `INIT_CUMULATIVE_ARGS' is used to find
1520 arguments for the function being compiled.
1522 When processing a call to a compiler support library function, LIBNAME
1523 identifies which one. It is a `symbol_ref' rtx which contains the name of
1524 the function, as a string. LIBNAME is 0 when an ordinary C function call is
1525 being processed. Thus, each time this macro is called, either LIBNAME or
1526 FNTYPE is nonzero, but never both of them at once. */
1528 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
1529 frv_init_cumulative_args (&CUM, FNTYPE, LIBNAME, FNDECL, FALSE)
1531 /* Like `INIT_CUMULATIVE_ARGS' but overrides it for the purposes of finding the
1532 arguments for the function being compiled. If this macro is undefined,
1533 `INIT_CUMULATIVE_ARGS' is used instead.
1535 The value passed for LIBNAME is always 0, since library routines with
1536 special calling conventions are never compiled with GCC. The argument
1537 LIBNAME exists for symmetry with `INIT_CUMULATIVE_ARGS'. */
1539 #define INIT_CUMULATIVE_INCOMING_ARGS(CUM, FNTYPE, LIBNAME) \
1540 frv_init_cumulative_args (&CUM, FNTYPE, LIBNAME, NULL, TRUE)
1542 /* A C expression that is nonzero if REGNO is the number of a hard register in
1543 which function arguments are sometimes passed. This does *not* include
1544 implicit arguments such as the static chain and the structure-value address.
1545 On many machines, no registers can be used for this purpose since all
1546 function arguments are pushed on the stack. */
1547 #define FUNCTION_ARG_REGNO_P(REGNO) \
1548 ((REGNO) >= FIRST_ARG_REGNUM && ((REGNO) <= LAST_ARG_REGNUM))
1550 \f
1551 /* How Scalar Function Values are Returned. */
1553 /* The number of the hard register that is used to return a scalar value from a
1554 function call. */
1555 #define RETURN_VALUE_REGNUM (GPR_FIRST + 8)
1557 #define FUNCTION_VALUE_REGNO_P(REGNO) frv_function_value_regno_p (REGNO)
1559 \f
1560 /* How Large Values are Returned. */
1562 /* The number of the register that is used to pass the structure
1563 value address. */
1564 #define FRV_STRUCT_VALUE_REGNUM (GPR_FIRST + 3)
1566 \f
1567 /* Function Entry and Exit. */
1569 /* Define this macro as a C expression that is nonzero if the return
1570 instruction or the function epilogue ignores the value of the stack pointer;
1571 in other words, if it is safe to delete an instruction to adjust the stack
1572 pointer before a return from the function.
1574 Note that this macro's value is relevant only for functions for which frame
1575 pointers are maintained. It is never safe to delete a final stack
1576 adjustment in a function that has no frame pointer, and the compiler knows
1577 this regardless of `EXIT_IGNORE_STACK'. */
1578 #define EXIT_IGNORE_STACK 1
1579 \f
1580 /* Generating Code for Profiling. */
1582 /* A C statement or compound statement to output to FILE some assembler code to
1583 call the profiling subroutine `mcount'. Before calling, the assembler code
1584 must load the address of a counter variable into a register where `mcount'
1585 expects to find the address. The name of this variable is `LP' followed by
1586 the number LABELNO, so you would generate the name using `LP%d' in a
1587 `fprintf'.
1589 The details of how the address should be passed to `mcount' are determined
1590 by your operating system environment, not by GCC. To figure them out,
1591 compile a small program for profiling using the system's installed C
1592 compiler and look at the assembler code that results.
1594 This declaration must be present, but it can be an abort if profiling is
1595 not implemented. */
1597 #define FUNCTION_PROFILER(FILE, LABELNO)
1599 /* Trampolines for Nested Functions. */
1601 /* A C expression for the size in bytes of the trampoline, as an integer. */
1602 #define TRAMPOLINE_SIZE frv_trampoline_size ()
1604 /* Alignment required for trampolines, in bits.
1606 If you don't define this macro, the value of `BIGGEST_ALIGNMENT' is used for
1607 aligning trampolines. */
1608 #define TRAMPOLINE_ALIGNMENT (TARGET_FDPIC ? 64 : 32)
1610 /* Define this macro if trampolines need a special subroutine to do their work.
1611 The macro should expand to a series of `asm' statements which will be
1612 compiled with GCC. They go in a library function named
1613 `__transfer_from_trampoline'.
1615 If you need to avoid executing the ordinary prologue code of a compiled C
1616 function when you jump to the subroutine, you can do so by placing a special
1617 label of your own in the assembler code. Use one `asm' statement to
1618 generate an assembler label, and another to make the label global. Then
1619 trampolines can use that label to jump directly to your special assembler
1620 code. */
1622 #ifdef __FRV_UNDERSCORE__
1624 #else
1626 #endif
1628 #define Twrite _write
1630 #if ! __FRV_FDPIC__
1631 #define TRANSFER_FROM_TRAMPOLINE \
1632 extern int Twrite (int, const void *, unsigned); \
1633 \
1634 void \
1635 __trampoline_setup (short * addr, int size, int fnaddr, int sc) \
1636 { \
1637 extern short __trampoline_template[]; \
1638 short * to = addr; \
1639 short * from = &__trampoline_template[0]; \
1640 int i; \
1641 \
1642 if (size < 20) \
1643 { \
1646 exit (-1); \
1647 } \
1648 \
1649 to[0] = from[0]; \
1650 to[1] = (short)(fnaddr); \
1651 to[2] = from[2]; \
1652 to[3] = (short)(sc); \
1653 to[4] = from[4]; \
1654 to[5] = (short)(fnaddr >> 16); \
1655 to[6] = from[6]; \
1656 to[7] = (short)(sc >> 16); \
1657 to[8] = from[8]; \
1658 to[9] = from[9]; \
1659 \
1660 for (i = 0; i < 20; i++) \
1662 } \
1663 \
1673 #else
1674 #define TRANSFER_FROM_TRAMPOLINE \
1675 extern int Twrite (int, const void *, unsigned); \
1676 \
1677 void \
1678 __trampoline_setup (addr, size, fnaddr, sc) \
1679 short * addr; \
1680 int size; \
1681 int fnaddr; \
1682 int sc; \
1683 { \
1684 extern short __trampoline_template[]; \
1685 short * from = &__trampoline_template[0]; \
1686 int i; \
1687 short **desc = (short **)addr; \
1688 short * to = addr + 4; \
1689 \
1690 if (size != 32) \
1691 { \
1694 exit (-1); \
1695 } \
1696 \
1697 /* Create a function descriptor with the address of the code below
1698 and NULL as the FDPIC value. We don't need the real GOT value
1699 here, since we don't use it, so we use NULL, that is just as
1701 desc[0] = to; \
1702 desc[1] = NULL; \
1703 size -= 8; \
1704 \
1705 to[0] = from[0]; \
1706 to[1] = (short)(fnaddr); \
1707 to[2] = from[2]; \
1708 to[3] = (short)(sc); \
1709 to[4] = from[4]; \
1710 to[5] = (short)(fnaddr >> 16); \
1711 to[6] = from[6]; \
1712 to[7] = (short)(sc >> 16); \
1713 to[8] = from[8]; \
1714 to[9] = from[9]; \
1715 to[10] = from[10]; \
1716 to[11] = from[11]; \
1717 \
1718 for (i = 0; i < size; i++) \
1720 } \
1721 \
1732 );
1733 #endif
1735 \f
1736 /* Addressing Modes. */
1738 /* A number, the maximum number of registers that can appear in a valid memory
1739 address. Note that it is up to you to specify a value equal to the maximum
1740 number that `TARGET_LEGITIMATE_ADDRESS_P' would ever accept. */
1741 #define MAX_REGS_PER_ADDRESS 2
1743 /* A C expression that is nonzero if X (assumed to be a `reg' RTX) is valid for
1744 use as a base register. For hard registers, it should always accept those
1745 which the hardware permits and reject the others. Whether the macro accepts
1746 or rejects pseudo registers must be controlled by `REG_OK_STRICT' as
1747 described above. This usually requires two variant definitions, of which
1748 `REG_OK_STRICT' controls the one actually used. */
1749 #ifdef REG_OK_STRICT
1750 #define REG_OK_FOR_BASE_P(X) GPR_P (REGNO (X))
1751 #else
1752 #define REG_OK_FOR_BASE_P(X) GPR_AP_OR_PSEUDO_P (REGNO (X))
1753 #endif
1755 /* A C expression that is nonzero if X (assumed to be a `reg' RTX) is valid for
1756 use as an index register.
1758 The difference between an index register and a base register is that the
1759 index register may be scaled. If an address involves the sum of two
1760 registers, neither one of them scaled, then either one may be labeled the
1761 "base" and the other the "index"; but whichever labeling is used must fit
1762 the machine's constraints of which registers may serve in each capacity.
1763 The compiler will try both labelings, looking for one that is valid, and
1764 will reload one or both registers only if neither labeling works. */
1765 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_BASE_P (X)
1767 #define FIND_BASE_TERM frv_find_base_term
1769 /* A C expression that is nonzero if X is a legitimate constant for an
1770 immediate operand on the target machine. You can assume that X satisfies
1771 `CONSTANT_P', so you need not check this. In fact, `1' is a suitable
1772 definition for this macro on machines where anything `CONSTANT_P' is valid. */
1773 #define LEGITIMATE_CONSTANT_P(X) frv_legitimate_constant_p (X)
1775 /* The load-and-update commands allow pre-modification in addresses.
1776 The index has to be in a register. */
1777 #define HAVE_PRE_MODIFY_REG 1
1779 \f
1780 /* We define extra CC modes in frv-modes.def so we need a selector. */
1782 #define SELECT_CC_MODE frv_select_cc_mode
1784 /* A C expression whose value is one if it is always safe to reverse a
1785 comparison whose mode is MODE. If `SELECT_CC_MODE' can ever return MODE for
1786 a floating-point inequality comparison, then `REVERSIBLE_CC_MODE (MODE)'
1787 must be zero.
1789 You need not define this macro if it would always returns zero or if the
1790 floating-point format is anything other than `IEEE_FLOAT_FORMAT'. For
1791 example, here is the definition used on the SPARC, where floating-point
1792 inequality comparisons are always given `CCFPEmode':
1794 #define REVERSIBLE_CC_MODE(MODE) ((MODE) != CCFPEmode) */
1796 /* On frv, don't consider floating point comparisons to be reversible. In
1797 theory, fp equality comparisons can be reversible. */
1798 #define REVERSIBLE_CC_MODE(MODE) \
1799 ((MODE) == CCmode || (MODE) == CC_UNSmode || (MODE) == CC_NZmode)
1801 /* Frv CCR_MODE's are not reversible. */
1802 #define REVERSE_CONDEXEC_PREDICATES_P(x,y) 0
1804 \f
1805 /* Describing Relative Costs of Operations. */
1807 /* A C expression for the cost of a branch instruction. A value of 1 is the
1808 default; other values are interpreted relative to that. */
1809 #define BRANCH_COST(speed_p, predictable_p) frv_branch_cost_int
1811 /* Define this macro as a C expression which is nonzero if accessing less than
1812 a word of memory (i.e. a `char' or a `short') is no faster than accessing a
1813 word of memory, i.e., if such access require more than one instruction or if
1814 there is no difference in cost between byte and (aligned) word loads.
1816 When this macro is not defined, the compiler will access a field by finding
1817 the smallest containing object; when it is defined, a fullword load will be
1818 used if alignment permits. Unless bytes accesses are faster than word
1819 accesses, using word accesses is preferable since it may eliminate
1820 subsequent memory access if subsequent accesses occur to other fields in the
1821 same word of the structure, but to different bytes. */
1822 #define SLOW_BYTE_ACCESS 1
1824 /* Define this macro if it is as good or better to call a constant function
1825 address than to call an address kept in a register. */
1826 #define NO_FUNCTION_CSE
1828 \f
1829 /* Dividing the output into sections. */
1831 /* A C expression whose value is a string containing the assembler operation
1832 that should precede instructions and read-only data. Normally `".text"' is
1833 right. */
1836 /* A C expression whose value is a string containing the assembler operation to
1837 identify the following data as writable initialized data. Normally
1838 `".data"' is right. */
1841 /* If defined, a C expression whose value is a string containing the
1842 assembler operation to identify the following data as
1843 uninitialized global data. If not defined, and neither
1844 `ASM_OUTPUT_BSS' nor `ASM_OUTPUT_ALIGNED_BSS' are defined,
1845 uninitialized global data will be output in the data section if
1846 `-fno-common' is passed, otherwise `ASM_OUTPUT_COMMON' will be
1847 used. */
1850 /* Short Data Support */
1853 /* On svr4, we *do* have support for the .init and .fini sections, and we
1854 can put stuff in there to be executed before and after `main'. We let
1855 crtstuff.c and other files know this by defining the following symbols.
1856 The definitions say how to change sections to the .init and .fini
1857 sections. This is the same for all known svr4 assemblers.
1859 The standard System V.4 macros will work, but they look ugly in the
1860 assembly output, so redefine them. */
1862 #undef INIT_SECTION_ASM_OP
1863 #undef FINI_SECTION_ASM_OP
1867 #undef CTORS_SECTION_ASM_OP
1868 #undef DTORS_SECTION_ASM_OP
1872 /* A C expression whose value is a string containing the assembler operation to
1873 switch to the fixup section that records all initialized pointers in a -fpic
1874 program so they can be changed program startup time if the program is loaded
1875 at a different address than linked for. */
1877 \f
1878 /* Position Independent Code. */
1880 /* A C expression that is nonzero if X is a legitimate immediate operand on the
1881 target machine when generating position independent code. You can assume
1882 that X satisfies `CONSTANT_P', so you need not check this. You can also
1883 assume FLAG_PIC is true, so you need not check it either. You need not
1884 define this macro if all constants (including `SYMBOL_REF') can be immediate
1885 operands when generating position independent code. */
1886 #define LEGITIMATE_PIC_OPERAND_P(X) \
1887 ( GET_CODE (X) == CONST_INT \
1888 || GET_CODE (X) == CONST_DOUBLE \
1889 || (GET_CODE (X) == HIGH && GET_CODE (XEXP (X, 0)) == CONST_INT) \
1890 || got12_operand (X, VOIDmode)) \
1892 \f
1893 /* The Overall Framework of an Assembler File. */
1895 /* A C string constant describing how to begin a comment in the target
1896 assembler language. The compiler assumes that the comment will end at the
1897 end of the line. */
1900 /* A C string constant for text to be output before each `asm' statement or
1901 group of consecutive ones. Normally this is `"#APP"', which is a comment
1902 that has no effect on most assemblers but tells the GNU assembler that it
1903 must check the lines that follow for all valid assembler constructs. */
1906 /* A C string constant for text to be output after each `asm' statement or
1907 group of consecutive ones. Normally this is `"#NO_APP"', which tells the
1908 GNU assembler to resume making the time-saving assumptions that are valid
1909 for ordinary compiler output. */
1912 \f
1913 /* Output of Data. */
1915 /* This is how to output a label to dwarf/dwarf2. */
1916 #define ASM_OUTPUT_DWARF_ADDR(STREAM, LABEL) \
1917 do { \
1919 assemble_name (STREAM, LABEL); \
1920 } while (0)
1922 /* Whether to emit the gas specific dwarf2 line number support. */
1923 #define DWARF2_ASM_LINE_DEBUG_INFO (TARGET_DEBUG_LOC)
1924 \f
1925 /* Output of Uninitialized Variables. */
1927 /* A C statement (sans semicolon) to output to the stdio stream STREAM the
1928 assembler definition of a local-common-label named NAME whose size is SIZE
1929 bytes. The variable ROUNDED is the size rounded up to whatever alignment
1930 the caller wants.
1932 Use the expression `assemble_name (STREAM, NAME)' to output the name itself;
1933 before and after that, output the additional assembler syntax for defining
1934 the name, and a newline.
1936 This macro controls how the assembler definitions of uninitialized static
1937 variables are output. */
1938 #undef ASM_OUTPUT_LOCAL
1940 /* Like `ASM_OUTPUT_LOCAL' except takes the required alignment as a separate,
1941 explicit argument. If you define this macro, it is used in place of
1942 `ASM_OUTPUT_LOCAL', and gives you more flexibility in handling the required
1943 alignment of the variable. The alignment is specified as the number of
1944 bits.
1946 Defined in svr4.h. */
1947 #undef ASM_OUTPUT_ALIGNED_LOCAL
1949 /* This is for final.c, because it is used by ASM_DECLARE_OBJECT_NAME. */
1952 /* Like `ASM_OUTPUT_ALIGNED_LOCAL' except that it takes an additional
1953 parameter - the DECL of variable to be output, if there is one.
1954 This macro can be called with DECL == NULL_TREE. If you define
1955 this macro, it is used in place of `ASM_OUTPUT_LOCAL' and
1956 `ASM_OUTPUT_ALIGNED_LOCAL', and gives you more flexibility in
1957 handling the destination of the variable. */
1958 #undef ASM_OUTPUT_ALIGNED_DECL_LOCAL
1959 #define ASM_OUTPUT_ALIGNED_DECL_LOCAL(STREAM, DECL, NAME, SIZE, ALIGN) \
1960 do { \
1961 if ((SIZE) > 0 && (SIZE) <= (unsigned HOST_WIDE_INT) g_switch_value) \
1963 else \
1964 switch_to_section (bss_section); \
1965 ASM_OUTPUT_ALIGN (STREAM, floor_log2 ((ALIGN) / BITS_PER_UNIT)); \
1966 ASM_DECLARE_OBJECT_NAME (STREAM, NAME, DECL); \
1967 ASM_OUTPUT_SKIP (STREAM, (SIZE) ? (SIZE) : 1); \
1968 } while (0)
1970 \f
1971 /* Output and Generation of Labels. */
1973 /* A C statement (sans semicolon) to output to the stdio stream STREAM the
1974 assembler definition of a label named NAME. Use the expression
1975 `assemble_name (STREAM, NAME)' to output the name itself; before and after
1976 that, output the additional assembler syntax for defining the name, and a
1977 newline. */
1978 #define ASM_OUTPUT_LABEL(STREAM, NAME) \
1979 do { \
1980 assemble_name (STREAM, NAME); \
1982 } while (0)
1984 /* Globalizing directive for a label. */
1987 /* A C statement to store into the string STRING a label whose name is made
1988 from the string PREFIX and the number NUM.
1990 This string, when output subsequently by `assemble_name', should produce the
1991 output that `(*targetm.asm_out.internal_label)' would produce with the same PREFIX
1992 and NUM.
1994 If the string begins with `*', then `assemble_name' will output the rest of
1995 the string unchanged. It is often convenient for
1996 `ASM_GENERATE_INTERNAL_LABEL' to use `*' in this way. If the string doesn't
1997 start with `*', then `ASM_OUTPUT_LABELREF' gets to output the string, and
1998 may change it. (Of course, `ASM_OUTPUT_LABELREF' is also part of your
1999 machine description, so you should know what it does on your machine.)
2001 Defined in svr4.h. */
2002 #undef ASM_GENERATE_INTERNAL_LABEL
2003 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
2004 do { \
2006 } while (0)
2008 \f
2009 /* Macros Controlling Initialization Routines. */
2011 /* If defined, a C string constant for the assembler operation to identify the
2012 following data as initialization code. If not defined, GCC will assume
2013 such a section does not exist. When you are using special sections for
2014 initialization and termination functions, this macro also controls how
2015 `crtstuff.c' and `libgcc2.c' arrange to run the initialization functions.
2017 Defined in svr4.h. */
2018 #undef INIT_SECTION_ASM_OP
2020 /* If defined, `main' will call `__main' despite the presence of
2021 `INIT_SECTION_ASM_OP'. This macro should be defined for systems where the
2022 init section is not actually run automatically, but is still useful for
2023 collecting the lists of constructors and destructors. */
2024 #define INVOKE__main
2025 \f
2026 /* Output of Assembler Instructions. */
2028 /* A C initializer containing the assembler's names for the machine registers,
2029 each one as a C string constant. This is what translates register numbers
2030 in the compiler into assembler language. */
2031 #define REGISTER_NAMES \
2032 { \
2041 \
2050 \
2058 }
2060 /* Define this macro if you are using an unusual assembler that
2061 requires different names for the machine instructions.
2063 The definition is a C statement or statements which output an
2064 assembler instruction opcode to the stdio stream STREAM. The
2065 macro-operand PTR is a variable of type `char *' which points to
2066 the opcode name in its "internal" form--the form that is written
2067 in the machine description. The definition should output the
2068 opcode name to STREAM, performing any translation you desire, and
2069 increment the variable PTR to point at the end of the opcode so
2070 that it will not be output twice.
2072 In fact, your macro definition may process less than the entire
2073 opcode name, or more than the opcode name; but if you want to
2074 process text that includes `%'-sequences to substitute operands,
2075 you must take care of the substitution yourself. Just be sure to
2076 increment PTR over whatever text should not be output normally.
2078 If you need to look at the operand values, they can be found as the
2079 elements of `recog_operand'.
2081 If the macro definition does nothing, the instruction is output in
2082 the usual way. */
2084 #define ASM_OUTPUT_OPCODE(STREAM, PTR)\
2085 (PTR) = frv_asm_output_opcode (STREAM, PTR)
2087 /* If defined, a C statement to be executed just prior to the output
2088 of assembler code for INSN, to modify the extracted operands so
2089 they will be output differently.
2091 Here the argument OPVEC is the vector containing the operands
2092 extracted from INSN, and NOPERANDS is the number of elements of
2093 the vector which contain meaningful data for this insn. The
2094 contents of this vector are what will be used to convert the insn
2095 template into assembler code, so you can change the assembler
2096 output by changing the contents of the vector.
2098 This macro is useful when various assembler syntaxes share a single
2099 file of instruction patterns; by defining this macro differently,
2100 you can cause a large class of instructions to be output
2101 differently (such as with rearranged operands). Naturally,
2102 variations in assembler syntax affecting individual insn patterns
2103 ought to be handled by writing conditional output routines in
2104 those patterns.
2106 If this macro is not defined, it is equivalent to a null statement. */
2108 #define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS)\
2109 frv_final_prescan_insn (INSN, OPVEC, NOPERANDS)
2111 /* If defined, C string expressions to be used for the `%R', `%L', `%U', and
2112 `%I' options of `asm_fprintf' (see `final.c'). These are useful when a
2113 single `md' file must support multiple assembler formats. In that case, the
2114 various `tm.h' files can define these macros differently.
2116 USER_LABEL_PREFIX is defined in svr4.h. */
2117 #undef USER_LABEL_PREFIX
2123 \f
2124 /* Output of dispatch tables. */
2126 /* This macro should be provided on machines where the addresses in a dispatch
2127 table are relative to the table's own address.
2129 The definition should be a C statement to output to the stdio stream STREAM
2130 an assembler pseudo-instruction to generate a difference between two labels.
2131 VALUE and REL are the numbers of two internal labels. The definitions of
2132 these labels are output using `(*targetm.asm_out.internal_label)', and they must be
2133 printed in the same way here. For example,
2135 fprintf (STREAM, "\t.word L%d-L%d\n", VALUE, REL) */
2136 #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \
2139 /* This macro should be provided on machines where the addresses in a dispatch
2140 table are absolute.
2142 The definition should be a C statement to output to the stdio stream STREAM
2143 an assembler pseudo-instruction to generate a reference to a label. VALUE
2144 is the number of an internal label whose definition is output using
2145 `(*targetm.asm_out.internal_label)'. For example,
2147 fprintf (STREAM, "\t.word L%d\n", VALUE) */
2148 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
2151 #define JUMP_TABLES_IN_TEXT_SECTION (flag_pic)
2152 \f
2153 /* Assembler Commands for Exception Regions. */
2155 /* Define this macro to 0 if your target supports DWARF 2 frame unwind
2156 information, but it does not yet work with exception handling. Otherwise,
2157 if your target supports this information (if it defines
2158 `INCOMING_RETURN_ADDR_RTX' and either `UNALIGNED_INT_ASM_OP' or
2159 `OBJECT_FORMAT_ELF'), GCC will provide a default definition of 1.
2161 If this macro is defined to 1, the DWARF 2 unwinder will be the default
2162 exception handling mechanism; otherwise, setjmp/longjmp will be used by
2163 default.
2165 If this macro is defined to anything, the DWARF 2 unwinder will be used
2166 instead of inline unwinders and __unwind_function in the non-setjmp case. */
2167 #define DWARF2_UNWIND_INFO 1
2169 #define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (LR_REGNO)
2170 \f
2171 /* Assembler Commands for Alignment. */
2173 /* A C statement to output to the stdio stream STREAM an assembler instruction
2174 to advance the location counter by NBYTES bytes. Those bytes should be zero
2175 when loaded. NBYTES will be a C expression of type `int'.
2177 Defined in svr4.h. */
2178 #undef ASM_OUTPUT_SKIP
2179 #define ASM_OUTPUT_SKIP(STREAM, NBYTES) \
2182 /* A C statement to output to the stdio stream STREAM an assembler command to
2183 advance the location counter to a multiple of 2 to the POWER bytes. POWER
2184 will be a C expression of type `int'. */
2185 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \
2188 /* Inside the text section, align with unpacked nops rather than zeros. */
2189 #define ASM_OUTPUT_ALIGN_WITH_NOP(STREAM, POWER) \
2191 \f
2192 /* Macros Affecting all Debug Formats. */
2194 /* A C expression that returns the DBX register number for the compiler
2195 register number REGNO. In simple cases, the value of this expression may be
2196 REGNO itself. But sometimes there are some registers that the compiler
2197 knows about and DBX does not, or vice versa. In such cases, some register
2198 may need to have one number in the compiler and another for DBX.
2200 If two registers have consecutive numbers inside GCC, and they can be
2201 used as a pair to hold a multiword value, then they *must* have consecutive
2202 numbers after renumbering with `DBX_REGISTER_NUMBER'. Otherwise, debuggers
2203 will be unable to access such a pair, because they expect register pairs to
2204 be consecutive in their own numbering scheme.
2206 If you find yourself defining `DBX_REGISTER_NUMBER' in way that does not
2207 preserve register pairs, then what you must do instead is redefine the
2208 actual register numbering scheme.
2210 This declaration is required. */
2211 #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
2213 /* A C expression that returns the type of debugging output GCC produces
2214 when the user specifies `-g' or `-ggdb'. Define this if you have arranged
2215 for GCC to support more than one format of debugging output. Currently,
2216 the allowable values are `DBX_DEBUG', `SDB_DEBUG', `DWARF_DEBUG',
2217 `DWARF2_DEBUG', and `XCOFF_DEBUG'.
2219 The value of this macro only affects the default debugging output; the user
2220 can always get a specific type of output by using `-gstabs', `-gcoff',
2221 `-gdwarf-1', `-gdwarf-2', or `-gxcoff'.
2223 Defined in svr4.h. */
2224 #undef PREFERRED_DEBUGGING_TYPE
2225 #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
2226 \f
2227 /* Miscellaneous Parameters. */
2229 /* An alias for a machine mode name. This is the machine mode that elements of
2230 a jump-table should have. */
2231 #define CASE_VECTOR_MODE SImode
2233 /* Define this macro if operations between registers with integral mode smaller
2234 than a word are always performed on the entire register. Most RISC machines
2235 have this property and most CISC machines do not. */
2236 #define WORD_REGISTER_OPERATIONS
2238 /* Define this macro to be a C expression indicating when insns that read
2239 memory in MODE, an integral mode narrower than a word, set the bits outside
2240 of MODE to be either the sign-extension or the zero-extension of the data
2241 read. Return `SIGN_EXTEND' for values of MODE for which the insn
2242 sign-extends, `ZERO_EXTEND' for which it zero-extends, and `UNKNOWN' for other
2243 modes.
2245 This macro is not called with MODE non-integral or with a width greater than
2246 or equal to `BITS_PER_WORD', so you may return any value in this case. Do
2247 not define this macro if it would always return `UNKNOWN'. On machines where
2248 this macro is defined, you will normally define it as the constant
2249 `SIGN_EXTEND' or `ZERO_EXTEND'. */
2250 #define LOAD_EXTEND_OP(MODE) SIGN_EXTEND
2252 /* Define if loading short immediate values into registers sign extends. */
2253 #define SHORT_IMMEDIATES_SIGN_EXTEND
2255 /* The maximum number of bytes that a single instruction can move quickly from
2256 memory to memory. */
2257 #define MOVE_MAX 8
2259 /* A C expression which is nonzero if on this machine it is safe to "convert"
2260 an integer of INPREC bits to one of OUTPREC bits (where OUTPREC is smaller
2261 than INPREC) by merely operating on it as if it had only OUTPREC bits.
2263 On many machines, this expression can be 1.
2265 When `TRULY_NOOP_TRUNCATION' returns 1 for a pair of sizes for modes for
2266 which `MODES_TIEABLE_P' is 0, suboptimal code can result. If this is the
2267 case, making `TRULY_NOOP_TRUNCATION' return 0 in such cases may improve
2268 things. */
2269 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
2271 /* An alias for the machine mode for pointers. On most machines, define this
2272 to be the integer mode corresponding to the width of a hardware pointer;
2273 `SImode' on 32-bit machine or `DImode' on 64-bit machines. On some machines
2274 you must define this to be one of the partial integer modes, such as
2275 `PSImode'.
2277 The width of `Pmode' must be at least as large as the value of
2278 `POINTER_SIZE'. If it is not equal, you must define the macro
2279 `POINTERS_EXTEND_UNSIGNED' to specify how pointers are extended to `Pmode'. */
2280 #define Pmode SImode
2282 /* An alias for the machine mode used for memory references to functions being
2283 called, in `call' RTL expressions. On most machines this should be
2284 `QImode'. */
2285 #define FUNCTION_MODE QImode
2287 /* A C expression for the maximum number of instructions to execute via
2288 conditional execution instructions instead of a branch. A value of
2289 BRANCH_COST+1 is the default if the machine does not use
2290 cc0, and 1 if it does use cc0. */
2291 #define MAX_CONDITIONAL_EXECUTE frv_condexec_insns
2293 /* A C expression to modify the code described by the conditional if
2294 information CE_INFO, possibly updating the tests in TRUE_EXPR, and
2295 FALSE_EXPR for converting if-then and if-then-else code to conditional
2296 instructions. Set either TRUE_EXPR or FALSE_EXPR to a null pointer if the
2297 tests cannot be converted. */
2298 #define IFCVT_MODIFY_TESTS(CE_INFO, TRUE_EXPR, FALSE_EXPR) \
2299 frv_ifcvt_modify_tests (CE_INFO, &TRUE_EXPR, &FALSE_EXPR)
2301 /* A C expression to modify the code described by the conditional if
2302 information CE_INFO, for the basic block BB, possibly updating the tests in
2303 TRUE_EXPR, and FALSE_EXPR for converting the && and || parts of if-then or
2304 if-then-else code to conditional instructions. OLD_TRUE and OLD_FALSE are
2305 the previous tests. Set either TRUE_EXPR or FALSE_EXPR to a null pointer if
2306 the tests cannot be converted. */
2307 #define IFCVT_MODIFY_MULTIPLE_TESTS(CE_INFO, BB, TRUE_EXPR, FALSE_EXPR) \
2308 frv_ifcvt_modify_multiple_tests (CE_INFO, BB, &TRUE_EXPR, &FALSE_EXPR)
2310 /* A C expression to modify the code described by the conditional if
2311 information CE_INFO with the new PATTERN in INSN. If PATTERN is a null
2312 pointer after the IFCVT_MODIFY_INSN macro executes, it is assumed that that
2313 insn cannot be converted to be executed conditionally. */
2314 #define IFCVT_MODIFY_INSN(CE_INFO, PATTERN, INSN) \
2315 (PATTERN) = frv_ifcvt_modify_insn (CE_INFO, PATTERN, INSN)
2317 /* A C expression to perform any final machine dependent modifications in
2318 converting code to conditional execution in the code described by the
2319 conditional if information CE_INFO. */
2320 #define IFCVT_MODIFY_FINAL(CE_INFO) frv_ifcvt_modify_final (CE_INFO)
2322 /* A C expression to cancel any machine dependent modifications in converting
2323 code to conditional execution in the code described by the conditional if
2324 information CE_INFO. */
2325 #define IFCVT_MODIFY_CANCEL(CE_INFO) frv_ifcvt_modify_cancel (CE_INFO)
2327 /* Initialize the extra fields provided by IFCVT_EXTRA_FIELDS. */
2328 #define IFCVT_INIT_EXTRA_FIELDS(CE_INFO) frv_ifcvt_init_extra_fields (CE_INFO)
2330 /* The definition of the following macro results in that the 2nd jump
2331 optimization (after the 2nd insn scheduling) is minimal. It is
2332 necessary to define when start cycle marks of insns (TImode is used
2333 for this) is used for VLIW insn packing. Some jump optimizations
2334 make such marks invalid. These marks are corrected for some
2335 (minimal) optimizations. ??? Probably the macro is temporary.
2336 Final solution could making the 2nd jump optimizations before the
2337 2nd instruction scheduling or corrections of the marks for all jump
2338 optimizations. Although some jump optimizations are actually
2339 deoptimizations for VLIW (super-scalar) processors. */
2341 #define MINIMAL_SECOND_JUMP_OPTIMIZATION
2344 /* If the following macro is defined and nonzero and deterministic
2345 finite state automata are used for pipeline hazard recognition, we
2346 will try to exchange insns in queue ready to improve the schedule.
2347 The more macro value, the more tries will be made. */
2348 #define FIRST_CYCLE_MULTIPASS_SCHEDULING 1
2350 /* The following macro is used only when value of
2351 FIRST_CYCLE_MULTIPASS_SCHEDULING is nonzero. The more macro value,
2352 the more tries will be made to choose better schedule. If the
2353 macro value is zero or negative there will be no multi-pass
2354 scheduling. */
2355 #define FIRST_CYCLE_MULTIPASS_SCHEDULING_LOOKAHEAD frv_sched_lookahead
2357 enum frv_builtins
2358 {
2359 FRV_BUILTIN_MAND,
2360 FRV_BUILTIN_MOR,
2361 FRV_BUILTIN_MXOR,
2362 FRV_BUILTIN_MNOT,
2363 FRV_BUILTIN_MAVEH,
2364 FRV_BUILTIN_MSATHS,
2365 FRV_BUILTIN_MSATHU,
2366 FRV_BUILTIN_MADDHSS,
2367 FRV_BUILTIN_MADDHUS,
2368 FRV_BUILTIN_MSUBHSS,
2369 FRV_BUILTIN_MSUBHUS,
2370 FRV_BUILTIN_MPACKH,
2371 FRV_BUILTIN_MQADDHSS,
2372 FRV_BUILTIN_MQADDHUS,
2373 FRV_BUILTIN_MQSUBHSS,
2374 FRV_BUILTIN_MQSUBHUS,
2375 FRV_BUILTIN_MUNPACKH,
2376 FRV_BUILTIN_MDPACKH,
2377 FRV_BUILTIN_MBTOH,
2378 FRV_BUILTIN_MHTOB,
2379 FRV_BUILTIN_MCOP1,
2380 FRV_BUILTIN_MCOP2,
2381 FRV_BUILTIN_MROTLI,
2382 FRV_BUILTIN_MROTRI,
2383 FRV_BUILTIN_MWCUT,
2384 FRV_BUILTIN_MSLLHI,
2385 FRV_BUILTIN_MSRLHI,
2386 FRV_BUILTIN_MSRAHI,
2387 FRV_BUILTIN_MEXPDHW,
2388 FRV_BUILTIN_MEXPDHD,
2389 FRV_BUILTIN_MMULHS,
2390 FRV_BUILTIN_MMULHU,
2391 FRV_BUILTIN_MMULXHS,
2392 FRV_BUILTIN_MMULXHU,
2393 FRV_BUILTIN_MMACHS,
2394 FRV_BUILTIN_MMACHU,
2395 FRV_BUILTIN_MMRDHS,
2396 FRV_BUILTIN_MMRDHU,
2397 FRV_BUILTIN_MQMULHS,
2398 FRV_BUILTIN_MQMULHU,
2399 FRV_BUILTIN_MQMULXHU,
2400 FRV_BUILTIN_MQMULXHS,
2401 FRV_BUILTIN_MQMACHS,
2402 FRV_BUILTIN_MQMACHU,
2403 FRV_BUILTIN_MCPXRS,
2404 FRV_BUILTIN_MCPXRU,
2405 FRV_BUILTIN_MCPXIS,
2406 FRV_BUILTIN_MCPXIU,
2407 FRV_BUILTIN_MQCPXRS,
2408 FRV_BUILTIN_MQCPXRU,
2409 FRV_BUILTIN_MQCPXIS,
2410 FRV_BUILTIN_MQCPXIU,
2411 FRV_BUILTIN_MCUT,
2412 FRV_BUILTIN_MCUTSS,
2413 FRV_BUILTIN_MWTACC,
2414 FRV_BUILTIN_MWTACCG,
2415 FRV_BUILTIN_MRDACC,
2416 FRV_BUILTIN_MRDACCG,
2417 FRV_BUILTIN_MTRAP,
2418 FRV_BUILTIN_MCLRACC,
2419 FRV_BUILTIN_MCLRACCA,
2420 FRV_BUILTIN_MDUNPACKH,
2421 FRV_BUILTIN_MBTOHE,
2422 FRV_BUILTIN_MQXMACHS,
2423 FRV_BUILTIN_MQXMACXHS,
2424 FRV_BUILTIN_MQMACXHS,
2425 FRV_BUILTIN_MADDACCS,
2426 FRV_BUILTIN_MSUBACCS,
2427 FRV_BUILTIN_MASACCS,
2428 FRV_BUILTIN_MDADDACCS,
2429 FRV_BUILTIN_MDSUBACCS,
2430 FRV_BUILTIN_MDASACCS,
2431 FRV_BUILTIN_MABSHS,
2432 FRV_BUILTIN_MDROTLI,
2433 FRV_BUILTIN_MCPLHI,
2434 FRV_BUILTIN_MCPLI,
2435 FRV_BUILTIN_MDCUTSSI,
2436 FRV_BUILTIN_MQSATHS,
2437 FRV_BUILTIN_MQLCLRHS,
2438 FRV_BUILTIN_MQLMTHS,
2439 FRV_BUILTIN_MQSLLHI,
2440 FRV_BUILTIN_MQSRAHI,
2441 FRV_BUILTIN_MHSETLOS,
2442 FRV_BUILTIN_MHSETLOH,
2443 FRV_BUILTIN_MHSETHIS,
2444 FRV_BUILTIN_MHSETHIH,
2445 FRV_BUILTIN_MHDSETS,
2446 FRV_BUILTIN_MHDSETH,
2447 FRV_BUILTIN_SMUL,
2448 FRV_BUILTIN_UMUL,
2449 FRV_BUILTIN_PREFETCH0,
2450 FRV_BUILTIN_PREFETCH,
2451 FRV_BUILTIN_SMASS,
2452 FRV_BUILTIN_SMSSS,
2453 FRV_BUILTIN_SMU,
2454 FRV_BUILTIN_SCUTSS,
2455 FRV_BUILTIN_ADDSS,
2456 FRV_BUILTIN_SUBSS,
2457 FRV_BUILTIN_SLASS,
2458 FRV_BUILTIN_IACCreadll,
2459 FRV_BUILTIN_IACCreadl,
2460 FRV_BUILTIN_IACCsetll,
2461 FRV_BUILTIN_IACCsetl,
2462 FRV_BUILTIN_SCAN,
2463 FRV_BUILTIN_READ8,
2464 FRV_BUILTIN_READ16,
2465 FRV_BUILTIN_READ32,
2466 FRV_BUILTIN_READ64,
2467 FRV_BUILTIN_WRITE8,
2468 FRV_BUILTIN_WRITE16,
2469 FRV_BUILTIN_WRITE32,
2470 FRV_BUILTIN_WRITE64
2471 };
2472 #define FRV_BUILTIN_FIRST_NONMEDIA FRV_BUILTIN_SMUL
2474 /* Enable prototypes on the call rtl functions. */
2475 #define MD_CALL_PROTOTYPES 1
2477 #define CPU_UNITS_QUERY 1
2479 #ifdef __FRV_FDPIC__
2480 #define CRT_GET_RFIB_DATA(dbase) \
2481 ({ extern void *_GLOBAL_OFFSET_TABLE_; (dbase) = &_GLOBAL_OFFSET_TABLE_; })
2482 #endif