| blob | 463f6ad1ecc75be418754d48c95b7a30d770b82c |
1 /* Target macros for the FRV port of GCC.
2 Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009,
3 2010
4 Free Software Foundation, Inc.
5 Contributed by Red Hat Inc.
7 This file is part of GCC.
9 GCC is free software; you can redistribute it and/or modify it
10 under the terms of the GNU General Public License as published
11 by the Free Software Foundation; either version 3, or (at your
12 option) any later version.
14 GCC is distributed in the hope that it will be useful, but WITHOUT
15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
17 License for more details.
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING3. If not see
21 <http://www.gnu.org/licenses/>. */
23 #ifndef __FRV_H__
24 #define __FRV_H__
26 /* Frv general purpose macros. */
27 /* Align an address. */
28 #define ADDR_ALIGN(addr,align) (((addr) + (align) - 1) & ~((align) - 1))
30 /* Return true if a value is inside a range. */
31 #define IN_RANGE_P(VALUE, LOW, HIGH) \
32 ( (((HOST_WIDE_INT)(VALUE)) >= (HOST_WIDE_INT)(LOW)) \
33 && (((HOST_WIDE_INT)(VALUE)) <= ((HOST_WIDE_INT)(HIGH))))
35 \f
36 /* Driver configuration. */
38 /* A C expression which determines whether the option `-CHAR' takes arguments.
39 The value should be the number of arguments that option takes-zero, for many
40 options.
42 By default, this macro is defined to handle the standard options properly.
43 You need not define it unless you wish to add additional options which take
44 arguments.
46 Defined in svr4.h. */
47 #undef SWITCH_TAKES_ARG
48 #define SWITCH_TAKES_ARG(CHAR) \
51 /* A C expression which determines whether the option `-NAME' takes arguments.
52 The value should be the number of arguments that option takes-zero, for many
53 options. This macro rather than `SWITCH_TAKES_ARG' is used for
54 multi-character option names.
56 By default, this macro is defined as `DEFAULT_WORD_SWITCH_TAKES_ARG', which
57 handles the standard options properly. You need not define
58 `WORD_SWITCH_TAKES_ARG' unless you wish to add additional options which take
59 arguments. Any redefinition should call `DEFAULT_WORD_SWITCH_TAKES_ARG' and
60 then check for additional options.
62 Defined in svr4.h. */
63 #undef WORD_SWITCH_TAKES_ARG
65 /* -fpic and -fPIC used to imply the -mlibrary-pic multilib, but with
66 FDPIC which multilib to use depends on whether FDPIC is in use or
67 not. The trick we use is to introduce -multilib-library-pic as a
68 pseudo-flag that selects the library-pic multilib, and map fpic
69 and fPIC to it only if fdpic is not selected. Also, if fdpic is
70 selected and no PIC/PIE options are present, we imply -fPIE.
71 Otherwise, if -fpic or -fPIC are enabled and we're optimizing for
72 speed, or if we have -On with n>=3, enable inlining of PLTs. As
73 for -mgprel-ro, we want to enable it by default, but not for -fpic or
74 -fpie. */
76 #define DRIVER_SELF_SPECS SUBTARGET_DRIVER_SELF_SPECS \
77 "%{mno-pack:\
78 %{!mhard-float:-msoft-float}\
79 %{!mmedia:-mno-media}}\
80 %{!mfdpic:%{fpic|fPIC: -multilib-library-pic}}\
81 %{mfdpic:%{!fpic:%{!fpie:%{!fPIC:%{!fPIE:\
82 %{!fno-pic:%{!fno-pie:%{!fno-PIC:%{!fno-PIE:-fPIE}}}}}}}} \
83 %{!mno-inline-plt:%{O*:%{!O0:%{!Os:%{fpic|fPIC:-minline-plt} \
84 %{!fpic:%{!fPIC:%{!O:%{!O1:%{!O2:-minline-plt}}}}}}}}} \
85 %{!mno-gprel-ro:%{!fpic:%{!fpie:-mgprel-ro}}}} \
86 "
87 #ifndef SUBTARGET_DRIVER_SELF_SPECS
88 # define SUBTARGET_DRIVER_SELF_SPECS
89 #endif
91 /* A C string constant that tells the GCC driver program options to pass to
92 the assembler. It can also specify how to translate options you give to GNU
93 CC into options for GCC to pass to the assembler. See the file `sun3.h'
94 for an example of this.
96 Do not define this macro if it does not need to do anything.
98 Defined in svr4.h. */
99 #undef ASM_SPEC
101 %{G*} %{v} %{n} %{T} %{Ym,*} %{Yd,*} %{Wa,*:%*} \
102 %{mtomcat-stats} \
103 %{!mno-eflags: \
104 %{mcpu=*} \
105 %{mgpr-*} %{mfpr-*} \
106 %{msoft-float} %{mhard-float} \
107 %{mdword} %{mno-dword} \
108 %{mdouble} %{mno-double} \
109 %{mmedia} %{mno-media} \
110 %{mmuladd} %{mno-muladd} \
111 %{mpack} %{mno-pack} \
112 %{mno-fdpic:-mnopic} %{mfdpic} \
113 %{fpic|fpie: -mpic} %{fPIC|fPIE: -mPIC} %{mlibrary-pic}}"
115 /* Another C string constant used much like `LINK_SPEC'. The difference
116 between the two is that `STARTFILE_SPEC' is used at the very beginning of
117 the command given to the linker.
119 If this macro is not defined, a default is provided that loads the standard
120 C startup file from the usual place. See `gcc.c'.
122 Defined in svr4.h. */
123 #undef STARTFILE_SPEC
126 /* Another C string constant used much like `LINK_SPEC'. The difference
127 between the two is that `ENDFILE_SPEC' is used at the very end of the
128 command given to the linker.
130 Do not define this macro if it does not need to do anything.
132 Defined in svr4.h. */
133 #undef ENDFILE_SPEC
137 #define MASK_DEFAULT_FRV \
138 (MASK_MEDIA \
139 | MASK_DOUBLE \
140 | MASK_MULADD \
141 | MASK_DWORD \
142 | MASK_PACK)
144 #define MASK_DEFAULT_FR500 \
145 (MASK_MEDIA | MASK_DWORD | MASK_PACK)
147 #define MASK_DEFAULT_FR550 \
148 (MASK_MEDIA | MASK_DWORD | MASK_PACK)
150 #define MASK_DEFAULT_FR450 \
151 (MASK_GPR_32 \
152 | MASK_FPR_32 \
153 | MASK_MEDIA \
154 | MASK_SOFT_FLOAT \
155 | MASK_DWORD \
156 | MASK_PACK)
158 #define MASK_DEFAULT_FR400 \
159 (MASK_GPR_32 \
160 | MASK_FPR_32 \
161 | MASK_MEDIA \
162 | MASK_ACC_4 \
163 | MASK_SOFT_FLOAT \
164 | MASK_DWORD \
165 | MASK_PACK)
167 #define MASK_DEFAULT_SIMPLE \
168 (MASK_GPR_32 | MASK_SOFT_FLOAT)
170 /* A C string constant that tells the GCC driver program options to pass to
171 `cc1'. It can also specify how to translate options you give to GCC into
172 options for GCC to pass to the `cc1'.
174 Do not define this macro if it does not need to do anything. */
175 /* For ABI compliance, we need to put bss data into the normal data section. */
178 /* A C string constant that tells the GCC driver program options to pass to
179 the linker. It can also specify how to translate options you give to GCC
180 into options for GCC to pass to the linker.
182 Do not define this macro if it does not need to do anything.
184 Defined in svr4.h. */
185 /* Override the svr4.h version with one that dispenses without the svr4
186 shared library options, notably -G. */
187 #undef LINK_SPEC
189 %{h*} %{v:-V} \
190 %{b} \
191 %{mfdpic:-melf32frvfd -z text} \
192 %{static:-dn -Bstatic} \
193 %{shared:-Bdynamic} \
194 %{symbolic:-Bsymbolic} \
195 %{G*} \
196 %{YP,*} \
197 %{Qy:} %{!Qn:-Qy}"
199 /* Another C string constant used much like `LINK_SPEC'. The difference
200 between the two is that `LIB_SPEC' is used at the end of the command given
201 to the linker.
203 If this macro is not defined, a default is provided that loads the standard
204 C library from the usual place. See `gcc.c'.
206 Defined in svr4.h. */
208 #undef LIB_SPEC
211 #ifndef CPU_TYPE
212 #define CPU_TYPE FRV_CPU_FR500
213 #endif
215 /* Run-time target specifications */
217 #define TARGET_CPU_CPP_BUILTINS() \
218 do \
219 { \
220 int issue_rate; \
221 \
224 \
225 issue_rate = frv_issue_rate (); \
226 if (issue_rate > 1) \
231 \
232 switch (frv_cpu_type) \
233 { \
234 case FRV_CPU_GENERIC: \
236 break; \
237 case FRV_CPU_FR550: \
239 break; \
240 case FRV_CPU_FR500: \
241 case FRV_CPU_TOMCAT: \
243 break; \
244 case FRV_CPU_FR450: \
246 break; \
247 case FRV_CPU_FR405: \
249 break; \
250 case FRV_CPU_FR400: \
252 break; \
253 case FRV_CPU_FR300: \
254 case FRV_CPU_SIMPLE: \
256 break; \
257 } \
258 \
259 if (TARGET_HARD_FLOAT) \
261 if (TARGET_DWORD) \
263 if (TARGET_FDPIC) \
265 if (flag_leading_underscore > 0) \
267 } \
268 while (0)
270 \f
271 #define TARGET_HAS_FPRS (TARGET_HARD_FLOAT || TARGET_MEDIA)
273 #define NUM_GPRS (TARGET_GPR_32? 32 : 64)
274 #define NUM_FPRS (!TARGET_HAS_FPRS? 0 : TARGET_FPR_32? 32 : 64)
275 #define NUM_ACCS (!TARGET_MEDIA? 0 : TARGET_ACC_4? 4 : 8)
277 /* X is a valid accumulator number if (X & ACC_MASK) == X. */
278 #define ACC_MASK \
279 (!TARGET_MEDIA ? 0 \
280 : TARGET_ACC_4 ? 3 \
281 : frv_cpu_type == FRV_CPU_FR450 ? 11 \
282 : 7)
284 /* Macros to identify the blend of media instructions available. Revision 1
285 is the one found on the FR500. Revision 2 includes the changes made for
286 the FR400.
288 Treat the generic processor as a revision 1 machine for now, for
289 compatibility with earlier releases. */
291 #define TARGET_MEDIA_REV1 \
292 (TARGET_MEDIA \
293 && (frv_cpu_type == FRV_CPU_GENERIC \
294 || frv_cpu_type == FRV_CPU_FR500))
296 #define TARGET_MEDIA_REV2 \
297 (TARGET_MEDIA \
298 && (frv_cpu_type == FRV_CPU_FR400 \
299 || frv_cpu_type == FRV_CPU_FR405 \
300 || frv_cpu_type == FRV_CPU_FR450 \
301 || frv_cpu_type == FRV_CPU_FR550))
303 #define TARGET_MEDIA_FR450 \
304 (frv_cpu_type == FRV_CPU_FR450)
306 #define TARGET_FR500_FR550_BUILTINS \
307 (frv_cpu_type == FRV_CPU_FR500 \
308 || frv_cpu_type == FRV_CPU_FR550)
310 #define TARGET_FR405_BUILTINS \
311 (frv_cpu_type == FRV_CPU_FR405 \
312 || frv_cpu_type == FRV_CPU_FR450)
314 #ifndef HAVE_AS_TLS
315 #define HAVE_AS_TLS 0
316 #endif
318 /* This macro is a C statement to print on `stderr' a string describing the
319 particular machine description choice. Every machine description should
320 define `TARGET_VERSION'. For example:
322 #ifdef MOTOROLA
323 #define TARGET_VERSION \
324 fprintf (stderr, " (68k, Motorola syntax)");
325 #else
326 #define TARGET_VERSION \
327 fprintf (stderr, " (68k, MIT syntax)");
328 #endif */
331 /* Define this macro if debugging can be performed even without a frame
332 pointer. If this macro is defined, GCC will turn on the
333 `-fomit-frame-pointer' option whenever `-O' is specified. */
334 /* Frv needs a specific frame layout that includes the frame pointer. */
336 #define CAN_DEBUG_WITHOUT_FP
338 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) (TARGET_ALIGN_LABELS ? 3 : 0)
339 \f
340 /* Small Data Area Support. */
341 /* Maximum size of variables that go in .sdata/.sbss.
342 The -msdata=foo switch also controls how small variables are handled. */
343 #ifndef SDATA_DEFAULT_SIZE
344 #define SDATA_DEFAULT_SIZE 8
345 #endif
348 /* Storage Layout */
350 /* Define this macro to have the value 1 if the most significant bit in a byte
351 has the lowest number; otherwise define it to have the value zero. This
352 means that bit-field instructions count from the most significant bit. If
353 the machine has no bit-field instructions, then this must still be defined,
354 but it doesn't matter which value it is defined to. This macro need not be
355 a constant.
357 This macro does not affect the way structure fields are packed into bytes or
358 words; that is controlled by `BYTES_BIG_ENDIAN'. */
359 #define BITS_BIG_ENDIAN 1
361 /* Define this macro to have the value 1 if the most significant byte in a word
362 has the lowest number. This macro need not be a constant. */
363 #define BYTES_BIG_ENDIAN 1
365 /* Define this macro to have the value 1 if, in a multiword object, the most
366 significant word has the lowest number. This applies to both memory
367 locations and registers; GCC fundamentally assumes that the order of
368 words in memory is the same as the order in registers. This macro need not
369 be a constant. */
370 #define WORDS_BIG_ENDIAN 1
372 /* Number of storage units in a word; normally 4. */
373 #define UNITS_PER_WORD 4
375 /* A macro to update MODE and UNSIGNEDP when an object whose type is TYPE and
376 which has the specified mode and signedness is to be stored in a register.
377 This macro is only called when TYPE is a scalar type.
379 On most RISC machines, which only have operations that operate on a full
380 register, define this macro to set M to `word_mode' if M is an integer mode
381 narrower than `BITS_PER_WORD'. In most cases, only integer modes should be
382 widened because wider-precision floating-point operations are usually more
383 expensive than their narrower counterparts.
385 For most machines, the macro definition does not change UNSIGNEDP. However,
386 some machines, have instructions that preferentially handle either signed or
387 unsigned quantities of certain modes. For example, on the DEC Alpha, 32-bit
388 loads from memory and 32-bit add instructions sign-extend the result to 64
389 bits. On such machines, set UNSIGNEDP according to which kind of extension
390 is more efficient.
392 Do not define this macro if it would never modify MODE. */
393 #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \
394 do \
395 { \
396 if (GET_MODE_CLASS (MODE) == MODE_INT \
397 && GET_MODE_SIZE (MODE) < 4) \
398 (MODE) = SImode; \
399 } \
400 while (0)
402 /* Normal alignment required for function parameters on the stack, in bits.
403 All stack parameters receive at least this much alignment regardless of data
404 type. On most machines, this is the same as the size of an integer. */
405 #define PARM_BOUNDARY 32
407 /* Define this macro if you wish to preserve a certain alignment for the stack
408 pointer. The definition is a C expression for the desired alignment
409 (measured in bits).
411 If `PUSH_ROUNDING' is not defined, the stack will always be aligned to the
412 specified boundary. If `PUSH_ROUNDING' is defined and specifies a less
413 strict alignment than `STACK_BOUNDARY', the stack may be momentarily
414 unaligned while pushing arguments. */
415 #define STACK_BOUNDARY 64
417 /* Alignment required for a function entry point, in bits. */
418 #define FUNCTION_BOUNDARY 128
420 /* Biggest alignment that any data type can require on this machine,
421 in bits. */
422 #define BIGGEST_ALIGNMENT 64
424 /* @@@ A hack, needed because libobjc wants to use ADJUST_FIELD_ALIGN for
425 some reason. */
426 #ifdef IN_TARGET_LIBS
427 #define BIGGEST_FIELD_ALIGNMENT 64
428 #else
429 /* An expression for the alignment of a structure field FIELD if the
430 alignment computed in the usual way is COMPUTED. GCC uses this
431 value instead of the value in `BIGGEST_ALIGNMENT' or
432 `BIGGEST_FIELD_ALIGNMENT', if defined, for structure fields only. */
433 #define ADJUST_FIELD_ALIGN(FIELD, COMPUTED) \
434 frv_adjust_field_align (FIELD, COMPUTED)
435 #endif
437 /* If defined, a C expression to compute the alignment for a static variable.
438 TYPE is the data type, and ALIGN is the alignment that the object
439 would ordinarily have. The value of this macro is used instead of that
440 alignment to align the object.
442 If this macro is not defined, then ALIGN is used.
444 One use of this macro is to increase alignment of medium-size data to make
445 it all fit in fewer cache lines. Another is to cause character arrays to be
446 word-aligned so that `strcpy' calls that copy constants to character arrays
447 can be done inline. */
448 #define DATA_ALIGNMENT(TYPE, ALIGN) \
449 (TREE_CODE (TYPE) == ARRAY_TYPE \
450 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
451 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
453 /* If defined, a C expression to compute the alignment given to a constant that
454 is being placed in memory. CONSTANT is the constant and ALIGN is the
455 alignment that the object would ordinarily have. The value of this macro is
456 used instead of that alignment to align the object.
458 If this macro is not defined, then ALIGN is used.
460 The typical use of this macro is to increase alignment for string constants
461 to be word aligned so that `strcpy' calls that copy constants can be done
462 inline. */
463 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
464 (TREE_CODE (EXP) == STRING_CST \
465 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
467 /* Define this macro to be the value 1 if instructions will fail to work if
468 given data not on the nominal alignment. If instructions will merely go
469 slower in that case, define this macro as 0. */
470 #define STRICT_ALIGNMENT 1
472 /* Define this if you wish to imitate the way many other C compilers handle
473 alignment of bitfields and the structures that contain them.
475 The behavior is that the type written for a bit-field (`int', `short', or
476 other integer type) imposes an alignment for the entire structure, as if the
477 structure really did contain an ordinary field of that type. In addition,
478 the bit-field is placed within the structure so that it would fit within such
479 a field, not crossing a boundary for it.
481 Thus, on most machines, a bit-field whose type is written as `int' would not
482 cross a four-byte boundary, and would force four-byte alignment for the
483 whole structure. (The alignment used may not be four bytes; it is
484 controlled by the other alignment parameters.)
486 If the macro is defined, its definition should be a C expression; a nonzero
487 value for the expression enables this behavior.
489 Note that if this macro is not defined, or its value is zero, some bitfields
490 may cross more than one alignment boundary. The compiler can support such
491 references if there are `insv', `extv', and `extzv' insns that can directly
492 reference memory.
494 The other known way of making bitfields work is to define
495 `STRUCTURE_SIZE_BOUNDARY' as large as `BIGGEST_ALIGNMENT'. Then every
496 structure can be accessed with fullwords.
498 Unless the machine has bit-field instructions or you define
499 `STRUCTURE_SIZE_BOUNDARY' that way, you must define
500 `PCC_BITFIELD_TYPE_MATTERS' to have a nonzero value.
502 If your aim is to make GCC use the same conventions for laying out
503 bitfields as are used by another compiler, here is how to investigate what
504 the other compiler does. Compile and run this program:
506 struct foo1
507 {
508 char x;
509 char :0;
510 char y;
511 };
513 struct foo2
514 {
515 char x;
516 int :0;
517 char y;
518 };
520 main ()
521 {
522 printf ("Size of foo1 is %d\n",
523 sizeof (struct foo1));
524 printf ("Size of foo2 is %d\n",
525 sizeof (struct foo2));
526 exit (0);
527 }
529 If this prints 2 and 5, then the compiler's behavior is what you would get
530 from `PCC_BITFIELD_TYPE_MATTERS'.
532 Defined in svr4.h. */
533 #define PCC_BITFIELD_TYPE_MATTERS 1
535 \f
536 /* Layout of Source Language Data Types. */
538 #define CHAR_TYPE_SIZE 8
539 #define SHORT_TYPE_SIZE 16
540 #define INT_TYPE_SIZE 32
541 #define LONG_TYPE_SIZE 32
542 #define LONG_LONG_TYPE_SIZE 64
543 #define FLOAT_TYPE_SIZE 32
544 #define DOUBLE_TYPE_SIZE 64
545 #define LONG_DOUBLE_TYPE_SIZE 64
547 /* An expression whose value is 1 or 0, according to whether the type `char'
548 should be signed or unsigned by default. The user can always override this
549 default with the options `-fsigned-char' and `-funsigned-char'. */
550 #define DEFAULT_SIGNED_CHAR 1
552 \f
553 /* General purpose registers. */
559 /* small data register */
560 #define SDA_BASE_REG ((unsigned)(TARGET_FDPIC ? -1 : flag_pic ? PIC_REGNO : (GPR_FIRST + 16)))
565 #define HARD_REGNO_RENAME_OK(from,to) (TARGET_FDPIC ? ((to) != FDPIC_REG) : 1)
567 #define OUR_FDPIC_REG get_hard_reg_initial_val (SImode, FDPIC_REGNO)
574 /* We reserve the last CR and CCR in each category to be used as a reload
575 register to reload the CR/CCR registers. This is a kludge. */
584 /* Amount to shift a value to locate a ICC or FCC register in the CCR
585 register and shift it to the bottom 4 bits. */
586 #define CC_SHIFT_RIGHT(REGNO) (((REGNO) - CC_FIRST) << 2)
588 /* Mask to isolate a single ICC/FCC value. */
589 #define CC_MASK 0xf
591 /* Masks to isolate the various bits in an ICC field. */
597 /* Mask to isolate the N/Z flags in an ICC. */
598 #define ICC_MASK_NZ (ICC_MASK_N | ICC_MASK_Z)
600 /* Mask to isolate the Z/C flags in an ICC. */
601 #define ICC_MASK_ZC (ICC_MASK_Z | ICC_MASK_C)
603 /* Masks to isolate the various bits in a FCC field. */
609 /* For CCR registers, the machine wants CR4..CR7 to be used for integer
610 code and CR0..CR3 to be used for floating point. */
620 /* Amount to shift a value to locate a CR register in the CCCR special purpose
621 register and shift it to the bottom 2 bits. */
622 #define CR_SHIFT_RIGHT(REGNO) (((REGNO) - CR_FIRST) << 1)
624 /* Mask to isolate a single CR value. */
625 #define CR_MASK 0x3
635 #define SPR_FIRST 169
636 #define SPR_LAST 172
637 #define LR_REGNO (SPR_FIRST)
638 #define LCR_REGNO (SPR_FIRST + 1)
639 #define IACC_FIRST (SPR_FIRST + 2)
640 #define IACC_LAST (SPR_FIRST + 3)
642 #define GPR_P(R) IN_RANGE_P (R, GPR_FIRST, GPR_LAST)
643 #define GPR_OR_AP_P(R) (GPR_P (R) || (R) == ARG_POINTER_REGNUM)
644 #define FPR_P(R) IN_RANGE_P (R, FPR_FIRST, FPR_LAST)
645 #define CC_P(R) IN_RANGE_P (R, CC_FIRST, CC_LAST)
646 #define ICC_P(R) IN_RANGE_P (R, ICC_FIRST, ICC_LAST)
647 #define FCC_P(R) IN_RANGE_P (R, FCC_FIRST, FCC_LAST)
648 #define CR_P(R) IN_RANGE_P (R, CR_FIRST, CR_LAST)
649 #define ICR_P(R) IN_RANGE_P (R, ICR_FIRST, ICR_LAST)
650 #define FCR_P(R) IN_RANGE_P (R, FCR_FIRST, FCR_LAST)
651 #define ACC_P(R) IN_RANGE_P (R, ACC_FIRST, ACC_LAST)
652 #define ACCG_P(R) IN_RANGE_P (R, ACCG_FIRST, ACCG_LAST)
653 #define SPR_P(R) IN_RANGE_P (R, SPR_FIRST, SPR_LAST)
655 #define GPR_OR_PSEUDO_P(R) (GPR_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
656 #define FPR_OR_PSEUDO_P(R) (FPR_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
657 #define GPR_AP_OR_PSEUDO_P(R) (GPR_OR_AP_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
658 #define CC_OR_PSEUDO_P(R) (CC_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
659 #define ICC_OR_PSEUDO_P(R) (ICC_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
660 #define FCC_OR_PSEUDO_P(R) (FCC_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
661 #define CR_OR_PSEUDO_P(R) (CR_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
662 #define ICR_OR_PSEUDO_P(R) (ICR_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
663 #define FCR_OR_PSEUDO_P(R) (FCR_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
664 #define ACC_OR_PSEUDO_P(R) (ACC_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
665 #define ACCG_OR_PSEUDO_P(R) (ACCG_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
667 #define MAX_STACK_IMMEDIATE_OFFSET 2047
669 \f
670 /* Register Basics. */
672 /* Number of hardware registers known to the compiler. They receive numbers 0
673 through `FIRST_PSEUDO_REGISTER-1'; thus, the first pseudo register's number
674 really is assigned the number `FIRST_PSEUDO_REGISTER'. */
675 #define FIRST_PSEUDO_REGISTER (SPR_LAST + 1)
677 /* The first/last register that can contain the arguments to a function. */
678 #define FIRST_ARG_REGNUM (GPR_FIRST + 8)
679 #define LAST_ARG_REGNUM (FIRST_ARG_REGNUM + FRV_NUM_ARG_REGS - 1)
681 /* Registers used by the exception handling functions. These should be
682 registers that are not otherwise used by the calling sequence. */
683 #define FIRST_EH_REGNUM 14
684 #define LAST_EH_REGNUM 15
686 /* Scratch registers used in the prologue, epilogue and thunks.
687 OFFSET_REGNO is for loading constant addends that are too big for a
688 single instruction. TEMP_REGNO is used for transferring SPRs to and from
689 the stack, and various other activities. */
690 #define OFFSET_REGNO 4
691 #define TEMP_REGNO 5
693 /* Registers used in the prologue. OLD_SP_REGNO is the old stack pointer,
694 which is sometimes used to set up the frame pointer. */
695 #define OLD_SP_REGNO 6
697 /* Registers used in the epilogue. STACKADJ_REGNO stores the exception
698 handler's stack adjustment. */
699 #define STACKADJ_REGNO 6
701 /* Registers used in thunks. JMP_REGNO is used for loading the target
702 address. */
703 #define JUMP_REGNO 6
705 #define EH_RETURN_DATA_REGNO(N) ((N) <= (LAST_EH_REGNUM - FIRST_EH_REGNUM)? \
706 (N) + FIRST_EH_REGNUM : INVALID_REGNUM)
707 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (SImode, STACKADJ_REGNO)
708 #define EH_RETURN_HANDLER_RTX RETURN_ADDR_RTX (0, frame_pointer_rtx)
710 #define EPILOGUE_USES(REGNO) ((REGNO) == LR_REGNO)
712 /* An initializer that says which registers are used for fixed purposes all
713 throughout the compiled code and are therefore not available for general
714 allocation. These would include the stack pointer, the frame pointer
715 (except on machines where that can be used as a general register when no
716 frame pointer is needed), the program counter on machines where that is
717 considered one of the addressable registers, and any other numbered register
718 with a standard use.
720 This information is expressed as a sequence of numbers, separated by commas
721 and surrounded by braces. The Nth number is 1 if register N is fixed, 0
722 otherwise.
724 The table initialized from this macro, and the table initialized by the
725 following one, may be overridden at run time either automatically, by the
726 actions of the macro `CONDITIONAL_REGISTER_USAGE', or by the user with the
727 command options `-ffixed-REG', `-fcall-used-REG' and `-fcall-saved-REG'. */
729 /* gr0 -- Hard Zero
730 gr1 -- Stack Pointer
731 gr2 -- Frame Pointer
732 gr3 -- Hidden Parameter
733 gr16 -- Small Data reserved
734 gr17 -- Pic reserved
735 gr28 -- OS reserved
736 gr29 -- OS reserved
737 gr30 -- OS reserved
738 gr31 -- OS reserved
739 cr3 -- reserved to reload FCC registers.
740 cr7 -- reserved to reload ICC registers. */
741 #define FIXED_REGISTERS \
775 }
777 /* Like `FIXED_REGISTERS' but has 1 for each register that is clobbered (in
778 general) by function calls as well as for fixed registers. This macro
779 therefore identifies the registers that are not available for general
780 allocation of values that must live across function calls.
782 If a register has 0 in `CALL_USED_REGISTERS', the compiler automatically
783 saves it on function entry and restores it on function exit, if the register
784 is used within the function. */
785 #define CALL_USED_REGISTERS \
819 }
821 /* Zero or more C statements that may conditionally modify two variables
822 `fixed_regs' and `call_used_regs' (both of type `char []') after they have
823 been initialized from the two preceding macros.
825 This is necessary in case the fixed or call-clobbered registers depend on
826 target flags.
828 You need not define this macro if it has no work to do.
830 If the usage of an entire class of registers depends on the target flags,
831 you may indicate this to GCC by using this macro to modify `fixed_regs' and
832 `call_used_regs' to 1 for each of the registers in the classes which should
833 not be used by GCC. Also define the macro `REG_CLASS_FROM_LETTER' to return
834 `NO_REGS' if it is called with a letter for a class that shouldn't be used.
836 (However, if this class is not included in `GENERAL_REGS' and all of the
837 insn patterns whose constraints permit this class are controlled by target
838 switches, then GCC will automatically avoid using these registers when the
839 target switches are opposed to them.) */
841 #define CONDITIONAL_REGISTER_USAGE frv_conditional_register_usage ()
843 \f
844 /* Order of allocation of registers. */
846 /* If defined, an initializer for a vector of integers, containing the numbers
847 of hard registers in the order in which GCC should prefer to use them
848 (from most preferred to least).
850 If this macro is not defined, registers are used lowest numbered first (all
851 else being equal).
853 One use of this macro is on machines where the highest numbered registers
854 must always be saved and the save-multiple-registers instruction supports
855 only sequences of consecutive registers. On such machines, define
856 `REG_ALLOC_ORDER' to be an initializer that lists the highest numbered
857 allocatable register first. */
859 /* On the FRV, allocate GR16 and GR17 after other saved registers so that we
860 have a better chance of allocating 2 registers at a time and can use the
861 double word load/store instructions in the prologue. */
862 #define REG_ALLOC_ORDER \
863 { \
865 GPR_FIRST + 4, GPR_FIRST + 5, GPR_FIRST + 6, GPR_FIRST + 7, \
866 GPR_FIRST + 8, GPR_FIRST + 9, GPR_FIRST + 10, GPR_FIRST + 11, \
867 GPR_FIRST + 12, GPR_FIRST + 13, GPR_FIRST + 14, GPR_FIRST + 15, \
868 GPR_FIRST + 32, GPR_FIRST + 33, GPR_FIRST + 34, GPR_FIRST + 35, \
869 GPR_FIRST + 36, GPR_FIRST + 37, GPR_FIRST + 38, GPR_FIRST + 39, \
870 GPR_FIRST + 40, GPR_FIRST + 41, GPR_FIRST + 42, GPR_FIRST + 43, \
871 GPR_FIRST + 44, GPR_FIRST + 45, GPR_FIRST + 46, GPR_FIRST + 47, \
872 \
873 FPR_FIRST + 0, FPR_FIRST + 1, FPR_FIRST + 2, FPR_FIRST + 3, \
874 FPR_FIRST + 4, FPR_FIRST + 5, FPR_FIRST + 6, FPR_FIRST + 7, \
875 FPR_FIRST + 8, FPR_FIRST + 9, FPR_FIRST + 10, FPR_FIRST + 11, \
876 FPR_FIRST + 12, FPR_FIRST + 13, FPR_FIRST + 14, FPR_FIRST + 15, \
877 FPR_FIRST + 32, FPR_FIRST + 33, FPR_FIRST + 34, FPR_FIRST + 35, \
878 FPR_FIRST + 36, FPR_FIRST + 37, FPR_FIRST + 38, FPR_FIRST + 39, \
879 FPR_FIRST + 40, FPR_FIRST + 41, FPR_FIRST + 42, FPR_FIRST + 43, \
880 FPR_FIRST + 44, FPR_FIRST + 45, FPR_FIRST + 46, FPR_FIRST + 47, \
881 \
882 ICC_FIRST + 0, ICC_FIRST + 1, ICC_FIRST + 2, ICC_FIRST + 3, \
883 FCC_FIRST + 0, FCC_FIRST + 1, FCC_FIRST + 2, FCC_FIRST + 3, \
884 CR_FIRST + 0, CR_FIRST + 1, CR_FIRST + 2, CR_FIRST + 3, \
885 CR_FIRST + 4, CR_FIRST + 5, CR_FIRST + 6, CR_FIRST + 7, \
886 \
888 GPR_FIRST + 18, GPR_FIRST + 19, \
889 GPR_FIRST + 20, GPR_FIRST + 21, GPR_FIRST + 22, GPR_FIRST + 23, \
890 GPR_FIRST + 24, GPR_FIRST + 25, GPR_FIRST + 26, GPR_FIRST + 27, \
891 GPR_FIRST + 48, GPR_FIRST + 49, GPR_FIRST + 50, GPR_FIRST + 51, \
892 GPR_FIRST + 52, GPR_FIRST + 53, GPR_FIRST + 54, GPR_FIRST + 55, \
893 GPR_FIRST + 56, GPR_FIRST + 57, GPR_FIRST + 58, GPR_FIRST + 59, \
894 GPR_FIRST + 60, GPR_FIRST + 61, GPR_FIRST + 62, GPR_FIRST + 63, \
895 GPR_FIRST + 16, GPR_FIRST + 17, \
896 \
897 FPR_FIRST + 16, FPR_FIRST + 17, FPR_FIRST + 18, FPR_FIRST + 19, \
898 FPR_FIRST + 20, FPR_FIRST + 21, FPR_FIRST + 22, FPR_FIRST + 23, \
899 FPR_FIRST + 24, FPR_FIRST + 25, FPR_FIRST + 26, FPR_FIRST + 27, \
900 FPR_FIRST + 28, FPR_FIRST + 29, FPR_FIRST + 30, FPR_FIRST + 31, \
901 FPR_FIRST + 48, FPR_FIRST + 49, FPR_FIRST + 50, FPR_FIRST + 51, \
902 FPR_FIRST + 52, FPR_FIRST + 53, FPR_FIRST + 54, FPR_FIRST + 55, \
903 FPR_FIRST + 56, FPR_FIRST + 57, FPR_FIRST + 58, FPR_FIRST + 59, \
904 FPR_FIRST + 60, FPR_FIRST + 61, FPR_FIRST + 62, FPR_FIRST + 63, \
905 \
907 GPR_FIRST + 0, GPR_FIRST + 1, GPR_FIRST + 2, GPR_FIRST + 3, \
908 GPR_FIRST + 28, GPR_FIRST + 29, GPR_FIRST + 30, GPR_FIRST + 31, \
909 ACC_FIRST + 0, ACC_FIRST + 1, ACC_FIRST + 2, ACC_FIRST + 3, \
910 ACC_FIRST + 4, ACC_FIRST + 5, ACC_FIRST + 6, ACC_FIRST + 7, \
911 ACC_FIRST + 8, ACC_FIRST + 9, ACC_FIRST + 10, ACC_FIRST + 11, \
912 ACCG_FIRST + 0, ACCG_FIRST + 1, ACCG_FIRST + 2, ACCG_FIRST + 3, \
913 ACCG_FIRST + 4, ACCG_FIRST + 5, ACCG_FIRST + 6, ACCG_FIRST + 7, \
914 ACCG_FIRST + 8, ACCG_FIRST + 9, ACCG_FIRST + 10, ACCG_FIRST + 11, \
915 AP_FIRST, LR_REGNO, LCR_REGNO, \
916 IACC_FIRST + 0, IACC_FIRST + 1 \
917 }
919 \f
920 /* How Values Fit in Registers. */
922 /* A C expression for the number of consecutive hard registers, starting at
923 register number REGNO, required to hold a value of mode MODE.
925 On a machine where all registers are exactly one word, a suitable definition
926 of this macro is
928 #define HARD_REGNO_NREGS(REGNO, MODE) \
929 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) \
930 / UNITS_PER_WORD)) */
932 /* On the FRV, make the CC modes take 3 words in the integer registers, so that
933 we can build the appropriate instructions to properly reload the values. */
934 #define HARD_REGNO_NREGS(REGNO, MODE) frv_hard_regno_nregs (REGNO, MODE)
936 /* A C expression that is nonzero if it is permissible to store a value of mode
937 MODE in hard register number REGNO (or in several registers starting with
938 that one). For a machine where all registers are equivalent, a suitable
939 definition is
941 #define HARD_REGNO_MODE_OK(REGNO, MODE) 1
943 It is not necessary for this macro to check for the numbers of fixed
944 registers, because the allocation mechanism considers them to be always
945 occupied.
947 On some machines, double-precision values must be kept in even/odd register
948 pairs. The way to implement that is to define this macro to reject odd
949 register numbers for such modes.
951 The minimum requirement for a mode to be OK in a register is that the
952 `movMODE' instruction pattern support moves between the register and any
953 other hard register for which the mode is OK; and that moving a value into
954 the register and back out not alter it.
956 Since the same instruction used to move `SImode' will work for all narrower
957 integer modes, it is not necessary on any machine for `HARD_REGNO_MODE_OK'
958 to distinguish between these modes, provided you define patterns `movhi',
959 etc., to take advantage of this. This is useful because of the interaction
960 between `HARD_REGNO_MODE_OK' and `MODES_TIEABLE_P'; it is very desirable for
961 all integer modes to be tieable.
963 Many machines have special registers for floating point arithmetic. Often
964 people assume that floating point machine modes are allowed only in floating
965 point registers. This is not true. Any registers that can hold integers
966 can safely *hold* a floating point machine mode, whether or not floating
967 arithmetic can be done on it in those registers. Integer move instructions
968 can be used to move the values.
970 On some machines, though, the converse is true: fixed-point machine modes
971 may not go in floating registers. This is true if the floating registers
972 normalize any value stored in them, because storing a non-floating value
973 there would garble it. In this case, `HARD_REGNO_MODE_OK' should reject
974 fixed-point machine modes in floating registers. But if the floating
975 registers do not automatically normalize, if you can store any bit pattern
976 in one and retrieve it unchanged without a trap, then any machine mode may
977 go in a floating register, so you can define this macro to say so.
979 The primary significance of special floating registers is rather that they
980 are the registers acceptable in floating point arithmetic instructions.
981 However, this is of no concern to `HARD_REGNO_MODE_OK'. You handle it by
982 writing the proper constraints for those instructions.
984 On some machines, the floating registers are especially slow to access, so
985 that it is better to store a value in a stack frame than in such a register
986 if floating point arithmetic is not being done. As long as the floating
987 registers are not in class `GENERAL_REGS', they will not be used unless some
988 pattern's constraint asks for one. */
989 #define HARD_REGNO_MODE_OK(REGNO, MODE) frv_hard_regno_mode_ok (REGNO, MODE)
991 /* A C expression that is nonzero if it is desirable to choose register
992 allocation so as to avoid move instructions between a value of mode MODE1
993 and a value of mode MODE2.
995 If `HARD_REGNO_MODE_OK (R, MODE1)' and `HARD_REGNO_MODE_OK (R, MODE2)' are
996 ever different for any R, then `MODES_TIEABLE_P (MODE1, MODE2)' must be
997 zero. */
998 #define MODES_TIEABLE_P(MODE1, MODE2) (MODE1 == MODE2)
1000 /* Define this macro if the compiler should avoid copies to/from CCmode
1001 registers. You should only define this macro if support fo copying to/from
1002 CCmode is incomplete. */
1003 #define AVOID_CCMODE_COPIES
1005 \f
1006 /* Register Classes. */
1008 /* An enumeral type that must be defined with all the register class names as
1009 enumeral values. `NO_REGS' must be first. `ALL_REGS' must be the last
1010 register class, followed by one more enumeral value, `LIM_REG_CLASSES',
1011 which is not a register class but rather tells how many classes there are.
1013 Each register class has a number, which is the value of casting the class
1014 name to type `int'. The number serves as an index in many of the tables
1015 described below. */
1016 enum reg_class
1017 {
1018 NO_REGS,
1019 ICC_REGS,
1020 FCC_REGS,
1021 CC_REGS,
1022 ICR_REGS,
1023 FCR_REGS,
1024 CR_REGS,
1025 LCR_REG,
1026 LR_REG,
1027 GR8_REGS,
1028 GR9_REGS,
1029 GR89_REGS,
1030 FDPIC_REGS,
1031 FDPIC_FPTR_REGS,
1032 FDPIC_CALL_REGS,
1033 SPR_REGS,
1034 QUAD_ACC_REGS,
1035 EVEN_ACC_REGS,
1036 ACC_REGS,
1037 ACCG_REGS,
1038 QUAD_FPR_REGS,
1039 FEVEN_REGS,
1040 FPR_REGS,
1041 QUAD_REGS,
1042 EVEN_REGS,
1043 GPR_REGS,
1044 ALL_REGS,
1045 LIM_REG_CLASSES
1046 };
1048 #define GENERAL_REGS GPR_REGS
1050 /* The number of distinct register classes, defined as follows:
1052 #define N_REG_CLASSES (int) LIM_REG_CLASSES */
1053 #define N_REG_CLASSES ((int) LIM_REG_CLASSES)
1055 /* An initializer containing the names of the register classes as C string
1056 constants. These names are used in writing some of the debugging dumps. */
1057 #define REG_CLASS_NAMES { \
1085 }
1087 /* An initializer containing the contents of the register classes, as integers
1088 which are bit masks. The Nth integer specifies the contents of class N.
1089 The way the integer MASK is interpreted is that register R is in the class
1090 if `MASK & (1 << R)' is 1.
1092 When the machine has more than 32 registers, an integer does not suffice.
1093 Then the integers are replaced by sub-initializers, braced groupings
1094 containing several integers. Each sub-initializer must be suitable as an
1095 initializer for the type `HARD_REG_SET' which is defined in
1096 `hard-reg-set.h'. */
1097 #define REG_CLASS_CONTENTS \
1126 }
1128 /* The following macro defines cover classes for Integrated Register
1129 Allocator. Cover classes is a set of non-intersected register
1130 classes covering all hard registers used for register allocation
1131 purpose. Any move between two registers of a cover class should be
1132 cheaper than load or store of the registers. The macro value is
1133 array of register classes with LIM_REG_CLASSES used as the end
1134 marker. */
1136 #define IRA_COVER_CLASSES \
1137 { \
1138 GPR_REGS, FPR_REGS, ACC_REGS, ICR_REGS, FCR_REGS, ICC_REGS, FCC_REGS, \
1139 ACCG_REGS, SPR_REGS, \
1140 LIM_REG_CLASSES \
1141 }
1143 /* A C expression whose value is a register class containing hard register
1144 REGNO. In general there is more than one such class; choose a class which
1145 is "minimal", meaning that no smaller class also contains the register. */
1148 #define REGNO_REG_CLASS(REGNO) regno_reg_class [REGNO]
1150 /* A macro whose definition is the name of the class to which a valid base
1151 register must belong. A base register is one used in an address which is
1152 the register value plus a displacement. */
1153 #define BASE_REG_CLASS GPR_REGS
1155 /* A macro whose definition is the name of the class to which a valid index
1156 register must belong. An index register is one used in an address where its
1157 value is either multiplied by a scale factor or added to another register
1158 (as well as added to a displacement). */
1159 #define INDEX_REG_CLASS GPR_REGS
1161 /* A C expression which defines the machine-dependent operand constraint
1162 letters for register classes. If CHAR is such a letter, the value should be
1163 the register class corresponding to it. Otherwise, the value should be
1164 `NO_REGS'. The register letter `r', corresponding to class `GENERAL_REGS',
1165 will not be passed to this macro; you do not need to handle it.
1167 The following letters are unavailable, due to being used as
1168 constraints:
1169 '0'..'9'
1170 '<', '>'
1171 'E', 'F', 'G', 'H'
1172 'I', 'J', 'K', 'L', 'M', 'N', 'O', 'P'
1173 'Q', 'R', 'S', 'T', 'U'
1174 'V', 'X'
1175 'g', 'i', 'm', 'n', 'o', 'p', 'r', 's' */
1178 #define REG_CLASS_FROM_LETTER(CHAR) reg_class_from_letter [(unsigned char)(CHAR)]
1180 /* A C expression which is nonzero if register number NUM is suitable for use
1181 as a base register in operand addresses. It may be either a suitable hard
1182 register or a pseudo register that has been allocated such a hard register. */
1183 #define REGNO_OK_FOR_BASE_P(NUM) \
1184 ((NUM) < FIRST_PSEUDO_REGISTER \
1185 ? GPR_P (NUM) \
1186 : (reg_renumber [NUM] >= 0 && GPR_P (reg_renumber [NUM])))
1188 /* A C expression which is nonzero if register number NUM is suitable for use
1189 as an index register in operand addresses. It may be either a suitable hard
1190 register or a pseudo register that has been allocated such a hard register.
1192 The difference between an index register and a base register is that the
1193 index register may be scaled. If an address involves the sum of two
1194 registers, neither one of them scaled, then either one may be labeled the
1195 "base" and the other the "index"; but whichever labeling is used must fit
1196 the machine's constraints of which registers may serve in each capacity.
1197 The compiler will try both labelings, looking for one that is valid, and
1198 will reload one or both registers only if neither labeling works. */
1199 #define REGNO_OK_FOR_INDEX_P(NUM) \
1200 ((NUM) < FIRST_PSEUDO_REGISTER \
1201 ? GPR_P (NUM) \
1202 : (reg_renumber [NUM] >= 0 && GPR_P (reg_renumber [NUM])))
1204 /* A C expression that places additional restrictions on the register class to
1205 use when it is necessary to copy value X into a register in class CLASS.
1206 The value is a register class; perhaps CLASS, or perhaps another, smaller
1207 class. On many machines, the following definition is safe:
1209 #define PREFERRED_RELOAD_CLASS(X,CLASS) CLASS
1211 Sometimes returning a more restrictive class makes better code. For
1212 example, on the 68000, when X is an integer constant that is in range for a
1213 `moveq' instruction, the value of this macro is always `DATA_REGS' as long
1214 as CLASS includes the data registers. Requiring a data register guarantees
1215 that a `moveq' will be used.
1217 If X is a `const_double', by returning `NO_REGS' you can force X into a
1218 memory constant. This is useful on certain machines where immediate
1219 floating values cannot be loaded into certain kinds of registers.
1221 This declaration must be present. */
1222 #define PREFERRED_RELOAD_CLASS(X, CLASS) CLASS
1224 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X) \
1225 frv_secondary_reload_class (CLASS, MODE, X)
1227 #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, X) \
1228 frv_secondary_reload_class (CLASS, MODE, X)
1230 /* A C expression for the maximum number of consecutive registers of
1231 class CLASS needed to hold a value of mode MODE.
1233 This is closely related to the macro `HARD_REGNO_NREGS'. In fact, the value
1234 of the macro `CLASS_MAX_NREGS (CLASS, MODE)' should be the maximum value of
1235 `HARD_REGNO_NREGS (REGNO, MODE)' for all REGNO values in the class CLASS.
1237 This macro helps control the handling of multiple-word values in
1238 the reload pass.
1240 This declaration is required. */
1241 #define CLASS_MAX_NREGS(CLASS, MODE) frv_class_max_nregs (CLASS, MODE)
1243 #define ZERO_P(x) (x == CONST0_RTX (GET_MODE (x)))
1245 /* 6-bit signed immediate. */
1246 #define CONST_OK_FOR_I(VALUE) IN_RANGE_P(VALUE, -32, 31)
1247 /* 10-bit signed immediate. */
1248 #define CONST_OK_FOR_J(VALUE) IN_RANGE_P(VALUE, -512, 511)
1249 /* Unused */
1250 #define CONST_OK_FOR_K(VALUE) 0
1251 /* 16-bit signed immediate. */
1252 #define CONST_OK_FOR_L(VALUE) IN_RANGE_P(VALUE, -32768, 32767)
1253 /* 16-bit unsigned immediate. */
1254 #define CONST_OK_FOR_M(VALUE) IN_RANGE_P (VALUE, 0, 65535)
1255 /* 12-bit signed immediate that is negative. */
1256 #define CONST_OK_FOR_N(VALUE) IN_RANGE_P(VALUE, -2048, -1)
1257 /* Zero */
1258 #define CONST_OK_FOR_O(VALUE) ((VALUE) == 0)
1259 /* 12-bit signed immediate that is negative. */
1260 #define CONST_OK_FOR_P(VALUE) IN_RANGE_P(VALUE, 1, 2047)
1262 /* A C expression that defines the machine-dependent operand constraint letters
1263 (`I', `J', `K', .. 'P') that specify particular ranges of integer values.
1264 If C is one of those letters, the expression should check that VALUE, an
1265 integer, is in the appropriate range and return 1 if so, 0 otherwise. If C
1266 is not one of those letters, the value should be 0 regardless of VALUE. */
1267 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
1276 : 0)
1279 /* A C expression that defines the machine-dependent operand constraint letters
1280 (`G', `H') that specify particular ranges of `const_double' values.
1282 If C is one of those letters, the expression should check that VALUE, an RTX
1283 of code `const_double', is in the appropriate range and return 1 if so, 0
1284 otherwise. If C is not one of those letters, the value should be 0
1285 regardless of VALUE.
1287 `const_double' is used for all floating-point constants and for `DImode'
1288 fixed-point constants. A given letter can accept either or both kinds of
1289 values. It can use `GET_MODE' to distinguish between these kinds. */
1291 #define CONST_DOUBLE_OK_FOR_G(VALUE) \
1292 ((GET_MODE (VALUE) == VOIDmode \
1293 && CONST_DOUBLE_LOW (VALUE) == 0 \
1294 && CONST_DOUBLE_HIGH (VALUE) == 0) \
1295 || ((GET_MODE (VALUE) == SFmode \
1296 || GET_MODE (VALUE) == DFmode) \
1297 && (VALUE) == CONST0_RTX (GET_MODE (VALUE))))
1299 #define CONST_DOUBLE_OK_FOR_H(VALUE) 0
1301 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
1304 : 0)
1306 /* A C expression that defines the optional machine-dependent constraint
1307 letters (`Q', `R', `S', `T', `U') that can be used to segregate specific
1308 types of operands, usually memory references, for the target machine.
1309 Normally this macro will not be defined. If it is required for a particular
1310 target machine, it should return 1 if VALUE corresponds to the operand type
1311 represented by the constraint letter C. If C is not defined as an extra
1312 constraint, the value returned should be 0 regardless of VALUE.
1314 For example, on the ROMP, load instructions cannot have their output in r0
1315 if the memory reference contains a symbolic address. Constraint letter `Q'
1316 is defined as representing a memory address that does *not* contain a
1317 symbolic address. An alternative is specified with a `Q' constraint on the
1318 input and `r' on the output. The next alternative specifies `m' on the
1319 input and a register class that does not include r0 on the output. */
1321 /* 12-bit relocations. */
1322 #define EXTRA_CONSTRAINT_FOR_Q(VALUE) \
1323 (got12_operand (VALUE, GET_MODE (VALUE)))
1325 /* Double word memory ops that take one instruction. */
1326 #define EXTRA_CONSTRAINT_FOR_R(VALUE) \
1327 (dbl_memory_one_insn_operand (VALUE, GET_MODE (VALUE)))
1329 /* SYMBOL_REF */
1330 #define EXTRA_CONSTRAINT_FOR_S(VALUE) \
1331 (CONSTANT_P (VALUE) && call_operand (VALUE, VOIDmode))
1333 /* Double word memory ops that take two instructions. */
1334 #define EXTRA_CONSTRAINT_FOR_T(VALUE) \
1335 (dbl_memory_two_insn_operand (VALUE, GET_MODE (VALUE)))
1337 /* Memory operand for conditional execution. */
1338 #define EXTRA_CONSTRAINT_FOR_U(VALUE) \
1339 (condexec_memory_operand (VALUE, GET_MODE (VALUE)))
1341 #define EXTRA_CONSTRAINT(VALUE, C) \
1347 : 0)
1349 #define EXTRA_MEMORY_CONSTRAINT(C,STR) \
1352 #define CONSTRAINT_LEN(C, STR) \
1355 #define REG_CLASS_FROM_CONSTRAINT(C, STR) \
1361 REG_CLASS_FROM_LETTER ((C)))
1363 \f
1364 /* Basic Stack Layout. */
1366 /* Structure to describe information about a saved range of registers */
1379 /* Register ranges to look into saving. */
1390 /* Values for save_p field. */
1395 /* Structure used to define the frv stack. */
1409 /* register range information */
1411 /* offset to store each register */
1413 /* whether to save register (& reg+1) */
1417 /* Define this macro if pushing a word onto the stack moves the stack pointer
1418 to a smaller address. */
1419 #define STACK_GROWS_DOWNWARD 1
1421 /* Define this macro to nonzero if the addresses of local variable slots
1422 are at negative offsets from the frame pointer. */
1423 #define FRAME_GROWS_DOWNWARD 1
1425 /* Offset from the frame pointer to the first local variable slot to be
1426 allocated.
1428 If `FRAME_GROWS_DOWNWARD', find the next slot's offset by subtracting the
1429 first slot's length from `STARTING_FRAME_OFFSET'. Otherwise, it is found by
1430 adding the length of the first slot to the value `STARTING_FRAME_OFFSET'. */
1431 #define STARTING_FRAME_OFFSET 0
1433 /* Offset from the stack pointer register to the first location at which
1434 outgoing arguments are placed. If not specified, the default value of zero
1435 is used. This is the proper value for most machines.
1437 If `ARGS_GROW_DOWNWARD', this is the offset to the location above the first
1438 location at which outgoing arguments are placed. */
1439 #define STACK_POINTER_OFFSET 0
1441 /* Offset from the argument pointer register to the first argument's address.
1442 On some machines it may depend on the data type of the function.
1444 If `ARGS_GROW_DOWNWARD', this is the offset to the location above the first
1445 argument's address. */
1446 #define FIRST_PARM_OFFSET(FUNDECL) 0
1448 /* A C expression whose value is RTL representing the address in a stack frame
1449 where the pointer to the caller's frame is stored. Assume that FRAMEADDR is
1450 an RTL expression for the address of the stack frame itself.
1452 If you don't define this macro, the default is to return the value of
1453 FRAMEADDR--that is, the stack frame address is also the address of the stack
1454 word that points to the previous frame. */
1455 #define DYNAMIC_CHAIN_ADDRESS(FRAMEADDR) frv_dynamic_chain_address (FRAMEADDR)
1457 /* A C expression whose value is RTL representing the value of the return
1458 address for the frame COUNT steps up from the current frame, after the
1459 prologue. FRAMEADDR is the frame pointer of the COUNT frame, or the frame
1460 pointer of the COUNT - 1 frame if `RETURN_ADDR_IN_PREVIOUS_FRAME' is
1461 defined.
1463 The value of the expression must always be the correct address when COUNT is
1464 zero, but may be `NULL_RTX' if there is not way to determine the return
1465 address of other frames. */
1466 #define RETURN_ADDR_RTX(COUNT, FRAMEADDR) frv_return_addr_rtx (COUNT, FRAMEADDR)
1468 #define RETURN_POINTER_REGNUM LR_REGNO
1470 /* A C expression whose value is RTL representing the location of the incoming
1471 return address at the beginning of any function, before the prologue. This
1472 RTL is either a `REG', indicating that the return value is saved in `REG',
1473 or a `MEM' representing a location in the stack.
1475 You only need to define this macro if you want to support call frame
1476 debugging information like that provided by DWARF 2. */
1477 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (SImode, RETURN_POINTER_REGNUM)
1479 \f
1480 /* Register That Address the Stack Frame. */
1482 /* The register number of the stack pointer register, which must also be a
1483 fixed register according to `FIXED_REGISTERS'. On most machines, the
1484 hardware determines which register this is. */
1485 #define STACK_POINTER_REGNUM (GPR_FIRST + 1)
1487 /* The register number of the frame pointer register, which is used to access
1488 automatic variables in the stack frame. On some machines, the hardware
1489 determines which register this is. On other machines, you can choose any
1490 register you wish for this purpose. */
1491 #define FRAME_POINTER_REGNUM (GPR_FIRST + 2)
1493 /* The register number of the arg pointer register, which is used to access the
1494 function's argument list. On some machines, this is the same as the frame
1495 pointer register. On some machines, the hardware determines which register
1496 this is. On other machines, you can choose any register you wish for this
1497 purpose. If this is not the same register as the frame pointer register,
1498 then you must mark it as a fixed register according to `FIXED_REGISTERS', or
1499 arrange to be able to eliminate it. */
1501 /* On frv this is a fake register that is eliminated in
1502 terms of either the frame pointer or stack pointer. */
1503 #define ARG_POINTER_REGNUM AP_FIRST
1505 /* Register numbers used for passing a function's static chain pointer. If
1506 register windows are used, the register number as seen by the called
1507 function is `STATIC_CHAIN_INCOMING_REGNUM', while the register number as
1508 seen by the calling function is `STATIC_CHAIN_REGNUM'. If these registers
1509 are the same, `STATIC_CHAIN_INCOMING_REGNUM' need not be defined.
1511 The static chain register need not be a fixed register.
1513 If the static chain is passed in memory, these macros should not be defined;
1514 instead, the next two macros should be defined. */
1515 #define STATIC_CHAIN_REGNUM (GPR_FIRST + 7)
1516 #define STATIC_CHAIN_INCOMING_REGNUM (GPR_FIRST + 7)
1518 \f
1519 /* Eliminating the Frame Pointer and the Arg Pointer. */
1521 /* If defined, this macro specifies a table of register pairs used to eliminate
1522 unneeded registers that point into the stack frame. If it is not defined,
1523 the only elimination attempted by the compiler is to replace references to
1524 the frame pointer with references to the stack pointer.
1526 The definition of this macro is a list of structure initializations, each of
1527 which specifies an original and replacement register.
1529 On some machines, the position of the argument pointer is not known until
1530 the compilation is completed. In such a case, a separate hard register must
1531 be used for the argument pointer. This register can be eliminated by
1532 replacing it with either the frame pointer or the argument pointer,
1533 depending on whether or not the frame pointer has been eliminated.
1535 In this case, you might specify:
1536 #define ELIMINABLE_REGS \
1537 {{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1538 {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
1539 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
1541 Note that the elimination of the argument pointer with the stack pointer is
1542 specified first since that is the preferred elimination. */
1544 #define ELIMINABLE_REGS \
1545 { \
1546 {ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1547 {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
1548 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM} \
1549 }
1551 /* This macro is similar to `INITIAL_FRAME_POINTER_OFFSET'. It specifies the
1552 initial difference between the specified pair of registers. This macro must
1553 be defined if `ELIMINABLE_REGS' is defined. */
1555 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
1556 (OFFSET) = frv_initial_elimination_offset (FROM, TO)
1558 \f
1559 /* Passing Function Arguments on the Stack. */
1561 /* If defined, the maximum amount of space required for outgoing arguments will
1562 be computed and placed into the variable
1563 `crtl->outgoing_args_size'. No space will be pushed onto the
1564 stack for each call; instead, the function prologue should increase the
1565 stack frame size by this amount.
1567 Defining both `PUSH_ROUNDING' and `ACCUMULATE_OUTGOING_ARGS' is not
1568 proper. */
1569 #define ACCUMULATE_OUTGOING_ARGS 1
1571 \f
1572 /* The number of register assigned to holding function arguments. */
1574 #define FRV_NUM_ARG_REGS 6
1576 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1577 frv_function_arg (&CUM, MODE, TYPE, NAMED, FALSE)
1579 /* Define this macro if the target machine has "register windows", so that the
1580 register in which a function sees an arguments is not necessarily the same
1581 as the one in which the caller passed the argument.
1583 For such machines, `FUNCTION_ARG' computes the register in which the caller
1584 passes the value, and `FUNCTION_INCOMING_ARG' should be defined in a similar
1585 fashion to tell the function being called where the arguments will arrive.
1587 If `FUNCTION_INCOMING_ARG' is not defined, `FUNCTION_ARG' serves both
1588 purposes. */
1590 #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
1591 frv_function_arg (&CUM, MODE, TYPE, NAMED, TRUE)
1593 /* A C type for declaring a variable that is used as the first argument of
1594 `FUNCTION_ARG' and other related values. For some target machines, the type
1595 `int' suffices and can hold the number of bytes of argument so far.
1597 There is no need to record in `CUMULATIVE_ARGS' anything about the arguments
1598 that have been passed on the stack. The compiler has other variables to
1599 keep track of that. For target machines on which all arguments are passed
1600 on the stack, there is no need to store anything in `CUMULATIVE_ARGS';
1601 however, the data structure must exist and should not be empty, so use
1602 `int'. */
1603 #define CUMULATIVE_ARGS int
1605 /* A C statement (sans semicolon) for initializing the variable CUM for the
1606 state at the beginning of the argument list. The variable has type
1607 `CUMULATIVE_ARGS'. The value of FNTYPE is the tree node for the data type
1608 of the function which will receive the args, or 0 if the args are to a
1609 compiler support library function. The value of INDIRECT is nonzero when
1610 processing an indirect call, for example a call through a function pointer.
1611 The value of INDIRECT is zero for a call to an explicitly named function, a
1612 library function call, or when `INIT_CUMULATIVE_ARGS' is used to find
1613 arguments for the function being compiled.
1615 When processing a call to a compiler support library function, LIBNAME
1616 identifies which one. It is a `symbol_ref' rtx which contains the name of
1617 the function, as a string. LIBNAME is 0 when an ordinary C function call is
1618 being processed. Thus, each time this macro is called, either LIBNAME or
1619 FNTYPE is nonzero, but never both of them at once. */
1621 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
1622 frv_init_cumulative_args (&CUM, FNTYPE, LIBNAME, FNDECL, FALSE)
1624 /* Like `INIT_CUMULATIVE_ARGS' but overrides it for the purposes of finding the
1625 arguments for the function being compiled. If this macro is undefined,
1626 `INIT_CUMULATIVE_ARGS' is used instead.
1628 The value passed for LIBNAME is always 0, since library routines with
1629 special calling conventions are never compiled with GCC. The argument
1630 LIBNAME exists for symmetry with `INIT_CUMULATIVE_ARGS'. */
1632 #define INIT_CUMULATIVE_INCOMING_ARGS(CUM, FNTYPE, LIBNAME) \
1633 frv_init_cumulative_args (&CUM, FNTYPE, LIBNAME, NULL, TRUE)
1635 /* A C statement (sans semicolon) to update the summarizer variable CUM to
1636 advance past an argument in the argument list. The values MODE, TYPE and
1637 NAMED describe that argument. Once this is done, the variable CUM is
1638 suitable for analyzing the *following* argument with `FUNCTION_ARG', etc.
1640 This macro need not do anything if the argument in question was passed on
1641 the stack. The compiler knows how to track the amount of stack space used
1642 for arguments without any special help. */
1643 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
1644 frv_function_arg_advance (&CUM, MODE, TYPE, NAMED)
1646 /* If defined, a C expression that gives the alignment boundary, in bits, of an
1647 argument with the specified mode and type. If it is not defined,
1648 `PARM_BOUNDARY' is used for all arguments. */
1650 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
1651 frv_function_arg_boundary (MODE, TYPE)
1653 /* A C expression that is nonzero if REGNO is the number of a hard register in
1654 which function arguments are sometimes passed. This does *not* include
1655 implicit arguments such as the static chain and the structure-value address.
1656 On many machines, no registers can be used for this purpose since all
1657 function arguments are pushed on the stack. */
1658 #define FUNCTION_ARG_REGNO_P(REGNO) \
1659 ((REGNO) >= FIRST_ARG_REGNUM && ((REGNO) <= LAST_ARG_REGNUM))
1661 \f
1662 /* How Scalar Function Values are Returned. */
1664 /* The number of the hard register that is used to return a scalar value from a
1665 function call. */
1666 #define RETURN_VALUE_REGNUM (GPR_FIRST + 8)
1668 #define FUNCTION_VALUE_REGNO_P(REGNO) frv_function_value_regno_p (REGNO)
1670 \f
1671 /* How Large Values are Returned. */
1673 /* The number of the register that is used to pass the structure
1674 value address. */
1675 #define FRV_STRUCT_VALUE_REGNUM (GPR_FIRST + 3)
1677 \f
1678 /* Function Entry and Exit. */
1680 /* Define this macro as a C expression that is nonzero if the return
1681 instruction or the function epilogue ignores the value of the stack pointer;
1682 in other words, if it is safe to delete an instruction to adjust the stack
1683 pointer before a return from the function.
1685 Note that this macro's value is relevant only for functions for which frame
1686 pointers are maintained. It is never safe to delete a final stack
1687 adjustment in a function that has no frame pointer, and the compiler knows
1688 this regardless of `EXIT_IGNORE_STACK'. */
1689 #define EXIT_IGNORE_STACK 1
1690 \f
1691 /* Generating Code for Profiling. */
1693 /* A C statement or compound statement to output to FILE some assembler code to
1694 call the profiling subroutine `mcount'. Before calling, the assembler code
1695 must load the address of a counter variable into a register where `mcount'
1696 expects to find the address. The name of this variable is `LP' followed by
1697 the number LABELNO, so you would generate the name using `LP%d' in a
1698 `fprintf'.
1700 The details of how the address should be passed to `mcount' are determined
1701 by your operating system environment, not by GCC. To figure them out,
1702 compile a small program for profiling using the system's installed C
1703 compiler and look at the assembler code that results.
1705 This declaration must be present, but it can be an abort if profiling is
1706 not implemented. */
1708 #define FUNCTION_PROFILER(FILE, LABELNO)
1710 /* Trampolines for Nested Functions. */
1712 /* A C expression for the size in bytes of the trampoline, as an integer. */
1713 #define TRAMPOLINE_SIZE frv_trampoline_size ()
1715 /* Alignment required for trampolines, in bits.
1717 If you don't define this macro, the value of `BIGGEST_ALIGNMENT' is used for
1718 aligning trampolines. */
1719 #define TRAMPOLINE_ALIGNMENT (TARGET_FDPIC ? 64 : 32)
1721 /* Define this macro if trampolines need a special subroutine to do their work.
1722 The macro should expand to a series of `asm' statements which will be
1723 compiled with GCC. They go in a library function named
1724 `__transfer_from_trampoline'.
1726 If you need to avoid executing the ordinary prologue code of a compiled C
1727 function when you jump to the subroutine, you can do so by placing a special
1728 label of your own in the assembler code. Use one `asm' statement to
1729 generate an assembler label, and another to make the label global. Then
1730 trampolines can use that label to jump directly to your special assembler
1731 code. */
1733 #ifdef __FRV_UNDERSCORE__
1735 #else
1737 #endif
1739 #define Twrite _write
1741 #if ! __FRV_FDPIC__
1742 #define TRANSFER_FROM_TRAMPOLINE \
1743 extern int Twrite (int, const void *, unsigned); \
1744 \
1745 void \
1746 __trampoline_setup (short * addr, int size, int fnaddr, int sc) \
1747 { \
1748 extern short __trampoline_template[]; \
1749 short * to = addr; \
1750 short * from = &__trampoline_template[0]; \
1751 int i; \
1752 \
1753 if (size < 20) \
1754 { \
1757 exit (-1); \
1758 } \
1759 \
1760 to[0] = from[0]; \
1761 to[1] = (short)(fnaddr); \
1762 to[2] = from[2]; \
1763 to[3] = (short)(sc); \
1764 to[4] = from[4]; \
1765 to[5] = (short)(fnaddr >> 16); \
1766 to[6] = from[6]; \
1767 to[7] = (short)(sc >> 16); \
1768 to[8] = from[8]; \
1769 to[9] = from[9]; \
1770 \
1771 for (i = 0; i < 20; i++) \
1773 } \
1774 \
1784 #else
1785 #define TRANSFER_FROM_TRAMPOLINE \
1786 extern int Twrite (int, const void *, unsigned); \
1787 \
1788 void \
1789 __trampoline_setup (addr, size, fnaddr, sc) \
1790 short * addr; \
1791 int size; \
1792 int fnaddr; \
1793 int sc; \
1794 { \
1795 extern short __trampoline_template[]; \
1796 short * from = &__trampoline_template[0]; \
1797 int i; \
1798 short **desc = (short **)addr; \
1799 short * to = addr + 4; \
1800 \
1801 if (size != 32) \
1802 { \
1805 exit (-1); \
1806 } \
1807 \
1808 /* Create a function descriptor with the address of the code below
1809 and NULL as the FDPIC value. We don't need the real GOT value
1810 here, since we don't use it, so we use NULL, that is just as
1812 desc[0] = to; \
1813 desc[1] = NULL; \
1814 size -= 8; \
1815 \
1816 to[0] = from[0]; \
1817 to[1] = (short)(fnaddr); \
1818 to[2] = from[2]; \
1819 to[3] = (short)(sc); \
1820 to[4] = from[4]; \
1821 to[5] = (short)(fnaddr >> 16); \
1822 to[6] = from[6]; \
1823 to[7] = (short)(sc >> 16); \
1824 to[8] = from[8]; \
1825 to[9] = from[9]; \
1826 to[10] = from[10]; \
1827 to[11] = from[11]; \
1828 \
1829 for (i = 0; i < size; i++) \
1831 } \
1832 \
1843 );
1844 #endif
1846 \f
1847 /* Addressing Modes. */
1849 /* A number, the maximum number of registers that can appear in a valid memory
1850 address. Note that it is up to you to specify a value equal to the maximum
1851 number that `TARGET_LEGITIMATE_ADDRESS_P' would ever accept. */
1852 #define MAX_REGS_PER_ADDRESS 2
1854 /* A C expression that is nonzero if X (assumed to be a `reg' RTX) is valid for
1855 use as a base register. For hard registers, it should always accept those
1856 which the hardware permits and reject the others. Whether the macro accepts
1857 or rejects pseudo registers must be controlled by `REG_OK_STRICT' as
1858 described above. This usually requires two variant definitions, of which
1859 `REG_OK_STRICT' controls the one actually used. */
1860 #ifdef REG_OK_STRICT
1861 #define REG_OK_FOR_BASE_P(X) GPR_P (REGNO (X))
1862 #else
1863 #define REG_OK_FOR_BASE_P(X) GPR_AP_OR_PSEUDO_P (REGNO (X))
1864 #endif
1866 /* A C expression that is nonzero if X (assumed to be a `reg' RTX) is valid for
1867 use as an index register.
1869 The difference between an index register and a base register is that the
1870 index register may be scaled. If an address involves the sum of two
1871 registers, neither one of them scaled, then either one may be labeled the
1872 "base" and the other the "index"; but whichever labeling is used must fit
1873 the machine's constraints of which registers may serve in each capacity.
1874 The compiler will try both labelings, looking for one that is valid, and
1875 will reload one or both registers only if neither labeling works. */
1876 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_BASE_P (X)
1878 #define FIND_BASE_TERM frv_find_base_term
1880 /* A C expression that is nonzero if X is a legitimate constant for an
1881 immediate operand on the target machine. You can assume that X satisfies
1882 `CONSTANT_P', so you need not check this. In fact, `1' is a suitable
1883 definition for this macro on machines where anything `CONSTANT_P' is valid. */
1884 #define LEGITIMATE_CONSTANT_P(X) frv_legitimate_constant_p (X)
1886 /* The load-and-update commands allow pre-modification in addresses.
1887 The index has to be in a register. */
1888 #define HAVE_PRE_MODIFY_REG 1
1890 \f
1891 /* We define extra CC modes in frv-modes.def so we need a selector. */
1893 #define SELECT_CC_MODE frv_select_cc_mode
1895 /* A C expression whose value is one if it is always safe to reverse a
1896 comparison whose mode is MODE. If `SELECT_CC_MODE' can ever return MODE for
1897 a floating-point inequality comparison, then `REVERSIBLE_CC_MODE (MODE)'
1898 must be zero.
1900 You need not define this macro if it would always returns zero or if the
1901 floating-point format is anything other than `IEEE_FLOAT_FORMAT'. For
1902 example, here is the definition used on the SPARC, where floating-point
1903 inequality comparisons are always given `CCFPEmode':
1905 #define REVERSIBLE_CC_MODE(MODE) ((MODE) != CCFPEmode) */
1907 /* On frv, don't consider floating point comparisons to be reversible. In
1908 theory, fp equality comparisons can be reversible. */
1909 #define REVERSIBLE_CC_MODE(MODE) \
1910 ((MODE) == CCmode || (MODE) == CC_UNSmode || (MODE) == CC_NZmode)
1912 /* Frv CCR_MODE's are not reversible. */
1913 #define REVERSE_CONDEXEC_PREDICATES_P(x,y) 0
1915 \f
1916 /* Describing Relative Costs of Operations. */
1918 /* A C expression for the cost of a branch instruction. A value of 1 is the
1919 default; other values are interpreted relative to that. */
1920 #define BRANCH_COST(speed_p, predictable_p) frv_branch_cost_int
1922 /* Define this macro as a C expression which is nonzero if accessing less than
1923 a word of memory (i.e. a `char' or a `short') is no faster than accessing a
1924 word of memory, i.e., if such access require more than one instruction or if
1925 there is no difference in cost between byte and (aligned) word loads.
1927 When this macro is not defined, the compiler will access a field by finding
1928 the smallest containing object; when it is defined, a fullword load will be
1929 used if alignment permits. Unless bytes accesses are faster than word
1930 accesses, using word accesses is preferable since it may eliminate
1931 subsequent memory access if subsequent accesses occur to other fields in the
1932 same word of the structure, but to different bytes. */
1933 #define SLOW_BYTE_ACCESS 1
1935 /* Define this macro if it is as good or better to call a constant function
1936 address than to call an address kept in a register. */
1937 #define NO_FUNCTION_CSE
1939 \f
1940 /* Dividing the output into sections. */
1942 /* A C expression whose value is a string containing the assembler operation
1943 that should precede instructions and read-only data. Normally `".text"' is
1944 right. */
1947 /* A C expression whose value is a string containing the assembler operation to
1948 identify the following data as writable initialized data. Normally
1949 `".data"' is right. */
1952 /* If defined, a C expression whose value is a string containing the
1953 assembler operation to identify the following data as
1954 uninitialized global data. If not defined, and neither
1955 `ASM_OUTPUT_BSS' nor `ASM_OUTPUT_ALIGNED_BSS' are defined,
1956 uninitialized global data will be output in the data section if
1957 `-fno-common' is passed, otherwise `ASM_OUTPUT_COMMON' will be
1958 used. */
1961 /* Short Data Support */
1964 /* On svr4, we *do* have support for the .init and .fini sections, and we
1965 can put stuff in there to be executed before and after `main'. We let
1966 crtstuff.c and other files know this by defining the following symbols.
1967 The definitions say how to change sections to the .init and .fini
1968 sections. This is the same for all known svr4 assemblers.
1970 The standard System V.4 macros will work, but they look ugly in the
1971 assembly output, so redefine them. */
1973 #undef INIT_SECTION_ASM_OP
1974 #undef FINI_SECTION_ASM_OP
1978 #undef CTORS_SECTION_ASM_OP
1979 #undef DTORS_SECTION_ASM_OP
1983 /* A C expression whose value is a string containing the assembler operation to
1984 switch to the fixup section that records all initialized pointers in a -fpic
1985 program so they can be changed program startup time if the program is loaded
1986 at a different address than linked for. */
1988 \f
1989 /* Position Independent Code. */
1991 /* A C expression that is nonzero if X is a legitimate immediate operand on the
1992 target machine when generating position independent code. You can assume
1993 that X satisfies `CONSTANT_P', so you need not check this. You can also
1994 assume FLAG_PIC is true, so you need not check it either. You need not
1995 define this macro if all constants (including `SYMBOL_REF') can be immediate
1996 operands when generating position independent code. */
1997 #define LEGITIMATE_PIC_OPERAND_P(X) \
1998 ( GET_CODE (X) == CONST_INT \
1999 || GET_CODE (X) == CONST_DOUBLE \
2000 || (GET_CODE (X) == HIGH && GET_CODE (XEXP (X, 0)) == CONST_INT) \
2001 || got12_operand (X, VOIDmode)) \
2003 \f
2004 /* The Overall Framework of an Assembler File. */
2006 /* A C string constant describing how to begin a comment in the target
2007 assembler language. The compiler assumes that the comment will end at the
2008 end of the line. */
2011 /* A C string constant for text to be output before each `asm' statement or
2012 group of consecutive ones. Normally this is `"#APP"', which is a comment
2013 that has no effect on most assemblers but tells the GNU assembler that it
2014 must check the lines that follow for all valid assembler constructs. */
2017 /* A C string constant for text to be output after each `asm' statement or
2018 group of consecutive ones. Normally this is `"#NO_APP"', which tells the
2019 GNU assembler to resume making the time-saving assumptions that are valid
2020 for ordinary compiler output. */
2023 \f
2024 /* Output of Data. */
2026 /* This is how to output a label to dwarf/dwarf2. */
2027 #define ASM_OUTPUT_DWARF_ADDR(STREAM, LABEL) \
2028 do { \
2030 assemble_name (STREAM, LABEL); \
2031 } while (0)
2033 /* Whether to emit the gas specific dwarf2 line number support. */
2034 #define DWARF2_ASM_LINE_DEBUG_INFO (TARGET_DEBUG_LOC)
2035 \f
2036 /* Output of Uninitialized Variables. */
2038 /* A C statement (sans semicolon) to output to the stdio stream STREAM the
2039 assembler definition of a local-common-label named NAME whose size is SIZE
2040 bytes. The variable ROUNDED is the size rounded up to whatever alignment
2041 the caller wants.
2043 Use the expression `assemble_name (STREAM, NAME)' to output the name itself;
2044 before and after that, output the additional assembler syntax for defining
2045 the name, and a newline.
2047 This macro controls how the assembler definitions of uninitialized static
2048 variables are output. */
2049 #undef ASM_OUTPUT_LOCAL
2051 /* Like `ASM_OUTPUT_LOCAL' except takes the required alignment as a separate,
2052 explicit argument. If you define this macro, it is used in place of
2053 `ASM_OUTPUT_LOCAL', and gives you more flexibility in handling the required
2054 alignment of the variable. The alignment is specified as the number of
2055 bits.
2057 Defined in svr4.h. */
2058 #undef ASM_OUTPUT_ALIGNED_LOCAL
2060 /* This is for final.c, because it is used by ASM_DECLARE_OBJECT_NAME. */
2063 /* Like `ASM_OUTPUT_ALIGNED_LOCAL' except that it takes an additional
2064 parameter - the DECL of variable to be output, if there is one.
2065 This macro can be called with DECL == NULL_TREE. If you define
2066 this macro, it is used in place of `ASM_OUTPUT_LOCAL' and
2067 `ASM_OUTPUT_ALIGNED_LOCAL', and gives you more flexibility in
2068 handling the destination of the variable. */
2069 #undef ASM_OUTPUT_ALIGNED_DECL_LOCAL
2070 #define ASM_OUTPUT_ALIGNED_DECL_LOCAL(STREAM, DECL, NAME, SIZE, ALIGN) \
2071 do { \
2072 if ((SIZE) > 0 && (SIZE) <= g_switch_value) \
2074 else \
2075 switch_to_section (bss_section); \
2076 ASM_OUTPUT_ALIGN (STREAM, floor_log2 ((ALIGN) / BITS_PER_UNIT)); \
2077 ASM_DECLARE_OBJECT_NAME (STREAM, NAME, DECL); \
2078 ASM_OUTPUT_SKIP (STREAM, (SIZE) ? (SIZE) : 1); \
2079 } while (0)
2081 \f
2082 /* Output and Generation of Labels. */
2084 /* A C statement (sans semicolon) to output to the stdio stream STREAM the
2085 assembler definition of a label named NAME. Use the expression
2086 `assemble_name (STREAM, NAME)' to output the name itself; before and after
2087 that, output the additional assembler syntax for defining the name, and a
2088 newline. */
2089 #define ASM_OUTPUT_LABEL(STREAM, NAME) \
2090 do { \
2091 assemble_name (STREAM, NAME); \
2093 } while (0)
2095 /* Globalizing directive for a label. */
2098 /* A C statement to store into the string STRING a label whose name is made
2099 from the string PREFIX and the number NUM.
2101 This string, when output subsequently by `assemble_name', should produce the
2102 output that `(*targetm.asm_out.internal_label)' would produce with the same PREFIX
2103 and NUM.
2105 If the string begins with `*', then `assemble_name' will output the rest of
2106 the string unchanged. It is often convenient for
2107 `ASM_GENERATE_INTERNAL_LABEL' to use `*' in this way. If the string doesn't
2108 start with `*', then `ASM_OUTPUT_LABELREF' gets to output the string, and
2109 may change it. (Of course, `ASM_OUTPUT_LABELREF' is also part of your
2110 machine description, so you should know what it does on your machine.)
2112 Defined in svr4.h. */
2113 #undef ASM_GENERATE_INTERNAL_LABEL
2114 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
2115 do { \
2117 } while (0)
2119 \f
2120 /* Macros Controlling Initialization Routines. */
2122 /* If defined, a C string constant for the assembler operation to identify the
2123 following data as initialization code. If not defined, GCC will assume
2124 such a section does not exist. When you are using special sections for
2125 initialization and termination functions, this macro also controls how
2126 `crtstuff.c' and `libgcc2.c' arrange to run the initialization functions.
2128 Defined in svr4.h. */
2129 #undef INIT_SECTION_ASM_OP
2131 /* If defined, `main' will call `__main' despite the presence of
2132 `INIT_SECTION_ASM_OP'. This macro should be defined for systems where the
2133 init section is not actually run automatically, but is still useful for
2134 collecting the lists of constructors and destructors. */
2135 #define INVOKE__main
2136 \f
2137 /* Output of Assembler Instructions. */
2139 /* A C initializer containing the assembler's names for the machine registers,
2140 each one as a C string constant. This is what translates register numbers
2141 in the compiler into assembler language. */
2142 #define REGISTER_NAMES \
2143 { \
2152 \
2161 \
2169 }
2171 /* Define this macro if you are using an unusual assembler that
2172 requires different names for the machine instructions.
2174 The definition is a C statement or statements which output an
2175 assembler instruction opcode to the stdio stream STREAM. The
2176 macro-operand PTR is a variable of type `char *' which points to
2177 the opcode name in its "internal" form--the form that is written
2178 in the machine description. The definition should output the
2179 opcode name to STREAM, performing any translation you desire, and
2180 increment the variable PTR to point at the end of the opcode so
2181 that it will not be output twice.
2183 In fact, your macro definition may process less than the entire
2184 opcode name, or more than the opcode name; but if you want to
2185 process text that includes `%'-sequences to substitute operands,
2186 you must take care of the substitution yourself. Just be sure to
2187 increment PTR over whatever text should not be output normally.
2189 If you need to look at the operand values, they can be found as the
2190 elements of `recog_operand'.
2192 If the macro definition does nothing, the instruction is output in
2193 the usual way. */
2195 #define ASM_OUTPUT_OPCODE(STREAM, PTR)\
2196 (PTR) = frv_asm_output_opcode (STREAM, PTR)
2198 /* If defined, a C statement to be executed just prior to the output
2199 of assembler code for INSN, to modify the extracted operands so
2200 they will be output differently.
2202 Here the argument OPVEC is the vector containing the operands
2203 extracted from INSN, and NOPERANDS is the number of elements of
2204 the vector which contain meaningful data for this insn. The
2205 contents of this vector are what will be used to convert the insn
2206 template into assembler code, so you can change the assembler
2207 output by changing the contents of the vector.
2209 This macro is useful when various assembler syntaxes share a single
2210 file of instruction patterns; by defining this macro differently,
2211 you can cause a large class of instructions to be output
2212 differently (such as with rearranged operands). Naturally,
2213 variations in assembler syntax affecting individual insn patterns
2214 ought to be handled by writing conditional output routines in
2215 those patterns.
2217 If this macro is not defined, it is equivalent to a null statement. */
2219 #define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS)\
2220 frv_final_prescan_insn (INSN, OPVEC, NOPERANDS)
2222 /* If defined, C string expressions to be used for the `%R', `%L', `%U', and
2223 `%I' options of `asm_fprintf' (see `final.c'). These are useful when a
2224 single `md' file must support multiple assembler formats. In that case, the
2225 various `tm.h' files can define these macros differently.
2227 USER_LABEL_PREFIX is defined in svr4.h. */
2228 #undef USER_LABEL_PREFIX
2234 \f
2235 /* Output of dispatch tables. */
2237 /* This macro should be provided on machines where the addresses in a dispatch
2238 table are relative to the table's own address.
2240 The definition should be a C statement to output to the stdio stream STREAM
2241 an assembler pseudo-instruction to generate a difference between two labels.
2242 VALUE and REL are the numbers of two internal labels. The definitions of
2243 these labels are output using `(*targetm.asm_out.internal_label)', and they must be
2244 printed in the same way here. For example,
2246 fprintf (STREAM, "\t.word L%d-L%d\n", VALUE, REL) */
2247 #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \
2250 /* This macro should be provided on machines where the addresses in a dispatch
2251 table are absolute.
2253 The definition should be a C statement to output to the stdio stream STREAM
2254 an assembler pseudo-instruction to generate a reference to a label. VALUE
2255 is the number of an internal label whose definition is output using
2256 `(*targetm.asm_out.internal_label)'. For example,
2258 fprintf (STREAM, "\t.word L%d\n", VALUE) */
2259 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
2262 #define JUMP_TABLES_IN_TEXT_SECTION (flag_pic)
2263 \f
2264 /* Assembler Commands for Exception Regions. */
2266 /* Define this macro to 0 if your target supports DWARF 2 frame unwind
2267 information, but it does not yet work with exception handling. Otherwise,
2268 if your target supports this information (if it defines
2269 `INCOMING_RETURN_ADDR_RTX' and either `UNALIGNED_INT_ASM_OP' or
2270 `OBJECT_FORMAT_ELF'), GCC will provide a default definition of 1.
2272 If this macro is defined to 1, the DWARF 2 unwinder will be the default
2273 exception handling mechanism; otherwise, setjmp/longjmp will be used by
2274 default.
2276 If this macro is defined to anything, the DWARF 2 unwinder will be used
2277 instead of inline unwinders and __unwind_function in the non-setjmp case. */
2278 #define DWARF2_UNWIND_INFO 1
2280 #define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (LR_REGNO)
2281 \f
2282 /* Assembler Commands for Alignment. */
2284 /* A C statement to output to the stdio stream STREAM an assembler instruction
2285 to advance the location counter by NBYTES bytes. Those bytes should be zero
2286 when loaded. NBYTES will be a C expression of type `int'.
2288 Defined in svr4.h. */
2289 #undef ASM_OUTPUT_SKIP
2290 #define ASM_OUTPUT_SKIP(STREAM, NBYTES) \
2293 /* A C statement to output to the stdio stream STREAM an assembler command to
2294 advance the location counter to a multiple of 2 to the POWER bytes. POWER
2295 will be a C expression of type `int'. */
2296 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \
2299 /* Inside the text section, align with unpacked nops rather than zeros. */
2300 #define ASM_OUTPUT_ALIGN_WITH_NOP(STREAM, POWER) \
2302 \f
2303 /* Macros Affecting all Debug Formats. */
2305 /* A C expression that returns the DBX register number for the compiler
2306 register number REGNO. In simple cases, the value of this expression may be
2307 REGNO itself. But sometimes there are some registers that the compiler
2308 knows about and DBX does not, or vice versa. In such cases, some register
2309 may need to have one number in the compiler and another for DBX.
2311 If two registers have consecutive numbers inside GCC, and they can be
2312 used as a pair to hold a multiword value, then they *must* have consecutive
2313 numbers after renumbering with `DBX_REGISTER_NUMBER'. Otherwise, debuggers
2314 will be unable to access such a pair, because they expect register pairs to
2315 be consecutive in their own numbering scheme.
2317 If you find yourself defining `DBX_REGISTER_NUMBER' in way that does not
2318 preserve register pairs, then what you must do instead is redefine the
2319 actual register numbering scheme.
2321 This declaration is required. */
2322 #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
2324 /* A C expression that returns the type of debugging output GCC produces
2325 when the user specifies `-g' or `-ggdb'. Define this if you have arranged
2326 for GCC to support more than one format of debugging output. Currently,
2327 the allowable values are `DBX_DEBUG', `SDB_DEBUG', `DWARF_DEBUG',
2328 `DWARF2_DEBUG', and `XCOFF_DEBUG'.
2330 The value of this macro only affects the default debugging output; the user
2331 can always get a specific type of output by using `-gstabs', `-gcoff',
2332 `-gdwarf-1', `-gdwarf-2', or `-gxcoff'.
2334 Defined in svr4.h. */
2335 #undef PREFERRED_DEBUGGING_TYPE
2336 #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
2337 \f
2338 /* Miscellaneous Parameters. */
2340 /* An alias for a machine mode name. This is the machine mode that elements of
2341 a jump-table should have. */
2342 #define CASE_VECTOR_MODE SImode
2344 /* Define this macro if operations between registers with integral mode smaller
2345 than a word are always performed on the entire register. Most RISC machines
2346 have this property and most CISC machines do not. */
2347 #define WORD_REGISTER_OPERATIONS
2349 /* Define this macro to be a C expression indicating when insns that read
2350 memory in MODE, an integral mode narrower than a word, set the bits outside
2351 of MODE to be either the sign-extension or the zero-extension of the data
2352 read. Return `SIGN_EXTEND' for values of MODE for which the insn
2353 sign-extends, `ZERO_EXTEND' for which it zero-extends, and `UNKNOWN' for other
2354 modes.
2356 This macro is not called with MODE non-integral or with a width greater than
2357 or equal to `BITS_PER_WORD', so you may return any value in this case. Do
2358 not define this macro if it would always return `UNKNOWN'. On machines where
2359 this macro is defined, you will normally define it as the constant
2360 `SIGN_EXTEND' or `ZERO_EXTEND'. */
2361 #define LOAD_EXTEND_OP(MODE) SIGN_EXTEND
2363 /* Define if loading short immediate values into registers sign extends. */
2364 #define SHORT_IMMEDIATES_SIGN_EXTEND
2366 /* The maximum number of bytes that a single instruction can move quickly from
2367 memory to memory. */
2368 #define MOVE_MAX 8
2370 /* A C expression which is nonzero if on this machine it is safe to "convert"
2371 an integer of INPREC bits to one of OUTPREC bits (where OUTPREC is smaller
2372 than INPREC) by merely operating on it as if it had only OUTPREC bits.
2374 On many machines, this expression can be 1.
2376 When `TRULY_NOOP_TRUNCATION' returns 1 for a pair of sizes for modes for
2377 which `MODES_TIEABLE_P' is 0, suboptimal code can result. If this is the
2378 case, making `TRULY_NOOP_TRUNCATION' return 0 in such cases may improve
2379 things. */
2380 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
2382 /* An alias for the machine mode for pointers. On most machines, define this
2383 to be the integer mode corresponding to the width of a hardware pointer;
2384 `SImode' on 32-bit machine or `DImode' on 64-bit machines. On some machines
2385 you must define this to be one of the partial integer modes, such as
2386 `PSImode'.
2388 The width of `Pmode' must be at least as large as the value of
2389 `POINTER_SIZE'. If it is not equal, you must define the macro
2390 `POINTERS_EXTEND_UNSIGNED' to specify how pointers are extended to `Pmode'. */
2391 #define Pmode SImode
2393 /* An alias for the machine mode used for memory references to functions being
2394 called, in `call' RTL expressions. On most machines this should be
2395 `QImode'. */
2396 #define FUNCTION_MODE QImode
2398 /* Define this macro to handle System V style pragmas: #pragma pack and
2399 #pragma weak. Note, #pragma weak will only be supported if SUPPORT_WEAK is
2400 defined.
2402 Defined in svr4.h. */
2403 #define HANDLE_SYSV_PRAGMA 1
2405 /* A C expression for the maximum number of instructions to execute via
2406 conditional execution instructions instead of a branch. A value of
2407 BRANCH_COST+1 is the default if the machine does not use
2408 cc0, and 1 if it does use cc0. */
2409 #define MAX_CONDITIONAL_EXECUTE frv_condexec_insns
2411 /* A C expression to modify the code described by the conditional if
2412 information CE_INFO, possibly updating the tests in TRUE_EXPR, and
2413 FALSE_EXPR for converting if-then and if-then-else code to conditional
2414 instructions. Set either TRUE_EXPR or FALSE_EXPR to a null pointer if the
2415 tests cannot be converted. */
2416 #define IFCVT_MODIFY_TESTS(CE_INFO, TRUE_EXPR, FALSE_EXPR) \
2417 frv_ifcvt_modify_tests (CE_INFO, &TRUE_EXPR, &FALSE_EXPR)
2419 /* A C expression to modify the code described by the conditional if
2420 information CE_INFO, for the basic block BB, possibly updating the tests in
2421 TRUE_EXPR, and FALSE_EXPR for converting the && and || parts of if-then or
2422 if-then-else code to conditional instructions. OLD_TRUE and OLD_FALSE are
2423 the previous tests. Set either TRUE_EXPR or FALSE_EXPR to a null pointer if
2424 the tests cannot be converted. */
2425 #define IFCVT_MODIFY_MULTIPLE_TESTS(CE_INFO, BB, TRUE_EXPR, FALSE_EXPR) \
2426 frv_ifcvt_modify_multiple_tests (CE_INFO, BB, &TRUE_EXPR, &FALSE_EXPR)
2428 /* A C expression to modify the code described by the conditional if
2429 information CE_INFO with the new PATTERN in INSN. If PATTERN is a null
2430 pointer after the IFCVT_MODIFY_INSN macro executes, it is assumed that that
2431 insn cannot be converted to be executed conditionally. */
2432 #define IFCVT_MODIFY_INSN(CE_INFO, PATTERN, INSN) \
2433 (PATTERN) = frv_ifcvt_modify_insn (CE_INFO, PATTERN, INSN)
2435 /* A C expression to perform any final machine dependent modifications in
2436 converting code to conditional execution in the code described by the
2437 conditional if information CE_INFO. */
2438 #define IFCVT_MODIFY_FINAL(CE_INFO) frv_ifcvt_modify_final (CE_INFO)
2440 /* A C expression to cancel any machine dependent modifications in converting
2441 code to conditional execution in the code described by the conditional if
2442 information CE_INFO. */
2443 #define IFCVT_MODIFY_CANCEL(CE_INFO) frv_ifcvt_modify_cancel (CE_INFO)
2445 /* Initialize the extra fields provided by IFCVT_EXTRA_FIELDS. */
2446 #define IFCVT_INIT_EXTRA_FIELDS(CE_INFO) frv_ifcvt_init_extra_fields (CE_INFO)
2448 /* The definition of the following macro results in that the 2nd jump
2449 optimization (after the 2nd insn scheduling) is minimal. It is
2450 necessary to define when start cycle marks of insns (TImode is used
2451 for this) is used for VLIW insn packing. Some jump optimizations
2452 make such marks invalid. These marks are corrected for some
2453 (minimal) optimizations. ??? Probably the macro is temporary.
2454 Final solution could making the 2nd jump optimizations before the
2455 2nd instruction scheduling or corrections of the marks for all jump
2456 optimizations. Although some jump optimizations are actually
2457 deoptimizations for VLIW (super-scalar) processors. */
2459 #define MINIMAL_SECOND_JUMP_OPTIMIZATION
2462 /* If the following macro is defined and nonzero and deterministic
2463 finite state automata are used for pipeline hazard recognition, the
2464 code making resource-constrained software pipelining is on. */
2465 #define RCSP_SOFTWARE_PIPELINING 1
2467 /* If the following macro is defined and nonzero and deterministic
2468 finite state automata are used for pipeline hazard recognition, we
2469 will try to exchange insns in queue ready to improve the schedule.
2470 The more macro value, the more tries will be made. */
2471 #define FIRST_CYCLE_MULTIPASS_SCHEDULING 1
2473 /* The following macro is used only when value of
2474 FIRST_CYCLE_MULTIPASS_SCHEDULING is nonzero. The more macro value,
2475 the more tries will be made to choose better schedule. If the
2476 macro value is zero or negative there will be no multi-pass
2477 scheduling. */
2478 #define FIRST_CYCLE_MULTIPASS_SCHEDULING_LOOKAHEAD frv_sched_lookahead
2480 enum frv_builtins
2481 {
2482 FRV_BUILTIN_MAND,
2483 FRV_BUILTIN_MOR,
2484 FRV_BUILTIN_MXOR,
2485 FRV_BUILTIN_MNOT,
2486 FRV_BUILTIN_MAVEH,
2487 FRV_BUILTIN_MSATHS,
2488 FRV_BUILTIN_MSATHU,
2489 FRV_BUILTIN_MADDHSS,
2490 FRV_BUILTIN_MADDHUS,
2491 FRV_BUILTIN_MSUBHSS,
2492 FRV_BUILTIN_MSUBHUS,
2493 FRV_BUILTIN_MPACKH,
2494 FRV_BUILTIN_MQADDHSS,
2495 FRV_BUILTIN_MQADDHUS,
2496 FRV_BUILTIN_MQSUBHSS,
2497 FRV_BUILTIN_MQSUBHUS,
2498 FRV_BUILTIN_MUNPACKH,
2499 FRV_BUILTIN_MDPACKH,
2500 FRV_BUILTIN_MBTOH,
2501 FRV_BUILTIN_MHTOB,
2502 FRV_BUILTIN_MCOP1,
2503 FRV_BUILTIN_MCOP2,
2504 FRV_BUILTIN_MROTLI,
2505 FRV_BUILTIN_MROTRI,
2506 FRV_BUILTIN_MWCUT,
2507 FRV_BUILTIN_MSLLHI,
2508 FRV_BUILTIN_MSRLHI,
2509 FRV_BUILTIN_MSRAHI,
2510 FRV_BUILTIN_MEXPDHW,
2511 FRV_BUILTIN_MEXPDHD,
2512 FRV_BUILTIN_MMULHS,
2513 FRV_BUILTIN_MMULHU,
2514 FRV_BUILTIN_MMULXHS,
2515 FRV_BUILTIN_MMULXHU,
2516 FRV_BUILTIN_MMACHS,
2517 FRV_BUILTIN_MMACHU,
2518 FRV_BUILTIN_MMRDHS,
2519 FRV_BUILTIN_MMRDHU,
2520 FRV_BUILTIN_MQMULHS,
2521 FRV_BUILTIN_MQMULHU,
2522 FRV_BUILTIN_MQMULXHU,
2523 FRV_BUILTIN_MQMULXHS,
2524 FRV_BUILTIN_MQMACHS,
2525 FRV_BUILTIN_MQMACHU,
2526 FRV_BUILTIN_MCPXRS,
2527 FRV_BUILTIN_MCPXRU,
2528 FRV_BUILTIN_MCPXIS,
2529 FRV_BUILTIN_MCPXIU,
2530 FRV_BUILTIN_MQCPXRS,
2531 FRV_BUILTIN_MQCPXRU,
2532 FRV_BUILTIN_MQCPXIS,
2533 FRV_BUILTIN_MQCPXIU,
2534 FRV_BUILTIN_MCUT,
2535 FRV_BUILTIN_MCUTSS,
2536 FRV_BUILTIN_MWTACC,
2537 FRV_BUILTIN_MWTACCG,
2538 FRV_BUILTIN_MRDACC,
2539 FRV_BUILTIN_MRDACCG,
2540 FRV_BUILTIN_MTRAP,
2541 FRV_BUILTIN_MCLRACC,
2542 FRV_BUILTIN_MCLRACCA,
2543 FRV_BUILTIN_MDUNPACKH,
2544 FRV_BUILTIN_MBTOHE,
2545 FRV_BUILTIN_MQXMACHS,
2546 FRV_BUILTIN_MQXMACXHS,
2547 FRV_BUILTIN_MQMACXHS,
2548 FRV_BUILTIN_MADDACCS,
2549 FRV_BUILTIN_MSUBACCS,
2550 FRV_BUILTIN_MASACCS,
2551 FRV_BUILTIN_MDADDACCS,
2552 FRV_BUILTIN_MDSUBACCS,
2553 FRV_BUILTIN_MDASACCS,
2554 FRV_BUILTIN_MABSHS,
2555 FRV_BUILTIN_MDROTLI,
2556 FRV_BUILTIN_MCPLHI,
2557 FRV_BUILTIN_MCPLI,
2558 FRV_BUILTIN_MDCUTSSI,
2559 FRV_BUILTIN_MQSATHS,
2560 FRV_BUILTIN_MQLCLRHS,
2561 FRV_BUILTIN_MQLMTHS,
2562 FRV_BUILTIN_MQSLLHI,
2563 FRV_BUILTIN_MQSRAHI,
2564 FRV_BUILTIN_MHSETLOS,
2565 FRV_BUILTIN_MHSETLOH,
2566 FRV_BUILTIN_MHSETHIS,
2567 FRV_BUILTIN_MHSETHIH,
2568 FRV_BUILTIN_MHDSETS,
2569 FRV_BUILTIN_MHDSETH,
2570 FRV_BUILTIN_SMUL,
2571 FRV_BUILTIN_UMUL,
2572 FRV_BUILTIN_PREFETCH0,
2573 FRV_BUILTIN_PREFETCH,
2574 FRV_BUILTIN_SMASS,
2575 FRV_BUILTIN_SMSSS,
2576 FRV_BUILTIN_SMU,
2577 FRV_BUILTIN_SCUTSS,
2578 FRV_BUILTIN_ADDSS,
2579 FRV_BUILTIN_SUBSS,
2580 FRV_BUILTIN_SLASS,
2581 FRV_BUILTIN_IACCreadll,
2582 FRV_BUILTIN_IACCreadl,
2583 FRV_BUILTIN_IACCsetll,
2584 FRV_BUILTIN_IACCsetl,
2585 FRV_BUILTIN_SCAN,
2586 FRV_BUILTIN_READ8,
2587 FRV_BUILTIN_READ16,
2588 FRV_BUILTIN_READ32,
2589 FRV_BUILTIN_READ64,
2590 FRV_BUILTIN_WRITE8,
2591 FRV_BUILTIN_WRITE16,
2592 FRV_BUILTIN_WRITE32,
2593 FRV_BUILTIN_WRITE64
2594 };
2595 #define FRV_BUILTIN_FIRST_NONMEDIA FRV_BUILTIN_SMUL
2597 /* Enable prototypes on the call rtl functions. */
2598 #define MD_CALL_PROTOTYPES 1
2600 #define CPU_UNITS_QUERY 1
2602 #ifdef __FRV_FDPIC__
2603 #define CRT_GET_RFIB_DATA(dbase) \
2604 ({ extern void *_GLOBAL_OFFSET_TABLE_; (dbase) = &_GLOBAL_OFFSET_TABLE_; })
2605 #endif