1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains support functions for creating rtl expressions
26 and manipulating them in the doubly-linked chain of insns.
28 The patterns of the insns are created by machine-dependent
29 routines in insn-emit.c, which is generated automatically from
30 the machine description. These routines make the individual rtx's
31 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
32 which are automatically generated from rtl.def; what is machine
33 dependent is the kind of rtx's they make and what arguments they
38 #include "coretypes.h"
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
53 #include "fixed-value.h"
55 #include "basic-block.h"
58 #include "langhooks.h"
59 #include "tree-pass.h"
62 /* Commonly used modes. */
64 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
65 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
66 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
67 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
69 /* Datastructures maintained for currently processed function in RTL form. */
71 struct rtl_data x_rtl
;
73 /* Indexed by pseudo register number, gives the rtx for that pseudo.
74 Allocated in parallel with regno_pointer_align.
75 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
76 with length attribute nested in top level structures. */
80 /* This is *not* reset after each function. It gives each CODE_LABEL
81 in the entire compilation a unique label number. */
83 static GTY(()) int label_num
= 1;
85 /* Nonzero means do not generate NOTEs for source line numbers. */
87 static int no_line_numbers
;
89 /* Commonly used rtx's, so that we only need space for one copy.
90 These are initialized once for the entire compilation.
91 All of these are unique; no other rtx-object will be equal to any
94 rtx global_rtl
[GR_MAX
];
96 /* Commonly used RTL for hard registers. These objects are not necessarily
97 unique, so we allocate them separately from global_rtl. They are
98 initialized once per compilation unit, then copied into regno_reg_rtx
99 at the beginning of each function. */
100 static GTY(()) rtx static_regno_reg_rtx
[FIRST_PSEUDO_REGISTER
];
102 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
103 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
104 record a copy of const[012]_rtx. */
106 rtx const_tiny_rtx
[3][(int) MAX_MACHINE_MODE
];
110 REAL_VALUE_TYPE dconst0
;
111 REAL_VALUE_TYPE dconst1
;
112 REAL_VALUE_TYPE dconst2
;
113 REAL_VALUE_TYPE dconstm1
;
114 REAL_VALUE_TYPE dconsthalf
;
116 /* Record fixed-point constant 0 and 1. */
117 FIXED_VALUE_TYPE fconst0
[MAX_FCONST0
];
118 FIXED_VALUE_TYPE fconst1
[MAX_FCONST1
];
120 /* All references to the following fixed hard registers go through
121 these unique rtl objects. On machines where the frame-pointer and
122 arg-pointer are the same register, they use the same unique object.
124 After register allocation, other rtl objects which used to be pseudo-regs
125 may be clobbered to refer to the frame-pointer register.
126 But references that were originally to the frame-pointer can be
127 distinguished from the others because they contain frame_pointer_rtx.
129 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
130 tricky: until register elimination has taken place hard_frame_pointer_rtx
131 should be used if it is being set, and frame_pointer_rtx otherwise. After
132 register elimination hard_frame_pointer_rtx should always be used.
133 On machines where the two registers are same (most) then these are the
136 In an inline procedure, the stack and frame pointer rtxs may not be
137 used for anything else. */
138 rtx static_chain_rtx
; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
139 rtx static_chain_incoming_rtx
; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
140 rtx pic_offset_table_rtx
; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
142 /* This is used to implement __builtin_return_address for some machines.
143 See for instance the MIPS port. */
144 rtx return_address_pointer_rtx
; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
146 /* We make one copy of (const_int C) where C is in
147 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
148 to save space during the compilation and simplify comparisons of
151 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
153 /* A hash table storing CONST_INTs whose absolute value is greater
154 than MAX_SAVED_CONST_INT. */
156 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
157 htab_t const_int_htab
;
159 /* A hash table storing memory attribute structures. */
160 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs
)))
161 htab_t mem_attrs_htab
;
163 /* A hash table storing register attribute structures. */
164 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs
)))
165 htab_t reg_attrs_htab
;
167 /* A hash table storing all CONST_DOUBLEs. */
168 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
169 htab_t const_double_htab
;
171 /* A hash table storing all CONST_FIXEDs. */
172 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
173 htab_t const_fixed_htab
;
175 #define first_insn (crtl->emit.x_first_insn)
176 #define last_insn (crtl->emit.x_last_insn)
177 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
178 #define last_location (crtl->emit.x_last_location)
179 #define first_label_num (crtl->emit.x_first_label_num)
181 static rtx
make_call_insn_raw (rtx
);
182 static rtx
change_address_1 (rtx
, enum machine_mode
, rtx
, int);
183 static void set_used_decls (tree
);
184 static void mark_label_nuses (rtx
);
185 static hashval_t
const_int_htab_hash (const void *);
186 static int const_int_htab_eq (const void *, const void *);
187 static hashval_t
const_double_htab_hash (const void *);
188 static int const_double_htab_eq (const void *, const void *);
189 static rtx
lookup_const_double (rtx
);
190 static hashval_t
const_fixed_htab_hash (const void *);
191 static int const_fixed_htab_eq (const void *, const void *);
192 static rtx
lookup_const_fixed (rtx
);
193 static hashval_t
mem_attrs_htab_hash (const void *);
194 static int mem_attrs_htab_eq (const void *, const void *);
195 static mem_attrs
*get_mem_attrs (alias_set_type
, tree
, rtx
, rtx
, unsigned int,
197 static hashval_t
reg_attrs_htab_hash (const void *);
198 static int reg_attrs_htab_eq (const void *, const void *);
199 static reg_attrs
*get_reg_attrs (tree
, int);
200 static tree
component_ref_for_mem_expr (tree
);
201 static rtx
gen_const_vector (enum machine_mode
, int);
202 static void copy_rtx_if_shared_1 (rtx
*orig
);
204 /* Probability of the conditional branch currently proceeded by try_split.
205 Set to -1 otherwise. */
206 int split_branch_probability
= -1;
208 /* Returns a hash code for X (which is a really a CONST_INT). */
211 const_int_htab_hash (const void *x
)
213 return (hashval_t
) INTVAL ((const_rtx
) x
);
216 /* Returns nonzero if the value represented by X (which is really a
217 CONST_INT) is the same as that given by Y (which is really a
221 const_int_htab_eq (const void *x
, const void *y
)
223 return (INTVAL ((const_rtx
) x
) == *((const HOST_WIDE_INT
*) y
));
226 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
228 const_double_htab_hash (const void *x
)
230 const_rtx
const value
= (const_rtx
) x
;
233 if (GET_MODE (value
) == VOIDmode
)
234 h
= CONST_DOUBLE_LOW (value
) ^ CONST_DOUBLE_HIGH (value
);
237 h
= real_hash (CONST_DOUBLE_REAL_VALUE (value
));
238 /* MODE is used in the comparison, so it should be in the hash. */
239 h
^= GET_MODE (value
);
244 /* Returns nonzero if the value represented by X (really a ...)
245 is the same as that represented by Y (really a ...) */
247 const_double_htab_eq (const void *x
, const void *y
)
249 const_rtx
const a
= (const_rtx
)x
, b
= (const_rtx
)y
;
251 if (GET_MODE (a
) != GET_MODE (b
))
253 if (GET_MODE (a
) == VOIDmode
)
254 return (CONST_DOUBLE_LOW (a
) == CONST_DOUBLE_LOW (b
)
255 && CONST_DOUBLE_HIGH (a
) == CONST_DOUBLE_HIGH (b
));
257 return real_identical (CONST_DOUBLE_REAL_VALUE (a
),
258 CONST_DOUBLE_REAL_VALUE (b
));
261 /* Returns a hash code for X (which is really a CONST_FIXED). */
264 const_fixed_htab_hash (const void *x
)
266 const_rtx
const value
= (const_rtx
) x
;
269 h
= fixed_hash (CONST_FIXED_VALUE (value
));
270 /* MODE is used in the comparison, so it should be in the hash. */
271 h
^= GET_MODE (value
);
275 /* Returns nonzero if the value represented by X (really a ...)
276 is the same as that represented by Y (really a ...). */
279 const_fixed_htab_eq (const void *x
, const void *y
)
281 const_rtx
const a
= (const_rtx
) x
, b
= (const_rtx
) y
;
283 if (GET_MODE (a
) != GET_MODE (b
))
285 return fixed_identical (CONST_FIXED_VALUE (a
), CONST_FIXED_VALUE (b
));
288 /* Returns a hash code for X (which is a really a mem_attrs *). */
291 mem_attrs_htab_hash (const void *x
)
293 const mem_attrs
*const p
= (const mem_attrs
*) x
;
295 return (p
->alias
^ (p
->align
* 1000)
296 ^ ((p
->offset
? INTVAL (p
->offset
) : 0) * 50000)
297 ^ ((p
->size
? INTVAL (p
->size
) : 0) * 2500000)
298 ^ (size_t) iterative_hash_expr (p
->expr
, 0));
301 /* Returns nonzero if the value represented by X (which is really a
302 mem_attrs *) is the same as that given by Y (which is also really a
306 mem_attrs_htab_eq (const void *x
, const void *y
)
308 const mem_attrs
*const p
= (const mem_attrs
*) x
;
309 const mem_attrs
*const q
= (const mem_attrs
*) y
;
311 return (p
->alias
== q
->alias
&& p
->offset
== q
->offset
312 && p
->size
== q
->size
&& p
->align
== q
->align
313 && (p
->expr
== q
->expr
314 || (p
->expr
!= NULL_TREE
&& q
->expr
!= NULL_TREE
315 && operand_equal_p (p
->expr
, q
->expr
, 0))));
318 /* Allocate a new mem_attrs structure and insert it into the hash table if
319 one identical to it is not already in the table. We are doing this for
323 get_mem_attrs (alias_set_type alias
, tree expr
, rtx offset
, rtx size
,
324 unsigned int align
, enum machine_mode mode
)
329 /* If everything is the default, we can just return zero.
330 This must match what the corresponding MEM_* macros return when the
331 field is not present. */
332 if (alias
== 0 && expr
== 0 && offset
== 0
334 || (mode
!= BLKmode
&& GET_MODE_SIZE (mode
) == INTVAL (size
)))
335 && (STRICT_ALIGNMENT
&& mode
!= BLKmode
336 ? align
== GET_MODE_ALIGNMENT (mode
) : align
== BITS_PER_UNIT
))
341 attrs
.offset
= offset
;
345 slot
= htab_find_slot (mem_attrs_htab
, &attrs
, INSERT
);
348 *slot
= ggc_alloc (sizeof (mem_attrs
));
349 memcpy (*slot
, &attrs
, sizeof (mem_attrs
));
352 return (mem_attrs
*) *slot
;
355 /* Returns a hash code for X (which is a really a reg_attrs *). */
358 reg_attrs_htab_hash (const void *x
)
360 const reg_attrs
*const p
= (const reg_attrs
*) x
;
362 return ((p
->offset
* 1000) ^ (long) p
->decl
);
365 /* Returns nonzero if the value represented by X (which is really a
366 reg_attrs *) is the same as that given by Y (which is also really a
370 reg_attrs_htab_eq (const void *x
, const void *y
)
372 const reg_attrs
*const p
= (const reg_attrs
*) x
;
373 const reg_attrs
*const q
= (const reg_attrs
*) y
;
375 return (p
->decl
== q
->decl
&& p
->offset
== q
->offset
);
377 /* Allocate a new reg_attrs structure and insert it into the hash table if
378 one identical to it is not already in the table. We are doing this for
382 get_reg_attrs (tree decl
, int offset
)
387 /* If everything is the default, we can just return zero. */
388 if (decl
== 0 && offset
== 0)
392 attrs
.offset
= offset
;
394 slot
= htab_find_slot (reg_attrs_htab
, &attrs
, INSERT
);
397 *slot
= ggc_alloc (sizeof (reg_attrs
));
398 memcpy (*slot
, &attrs
, sizeof (reg_attrs
));
401 return (reg_attrs
*) *slot
;
406 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule
412 rtx x
= gen_rtx_ASM_INPUT (VOIDmode
, "");
413 MEM_VOLATILE_P (x
) = true;
419 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
420 don't attempt to share with the various global pieces of rtl (such as
421 frame_pointer_rtx). */
424 gen_raw_REG (enum machine_mode mode
, int regno
)
426 rtx x
= gen_rtx_raw_REG (mode
, regno
);
427 ORIGINAL_REGNO (x
) = regno
;
431 /* There are some RTL codes that require special attention; the generation
432 functions do the raw handling. If you add to this list, modify
433 special_rtx in gengenrtl.c as well. */
436 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED
, HOST_WIDE_INT arg
)
440 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
441 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
443 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
444 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
445 return const_true_rtx
;
448 /* Look up the CONST_INT in the hash table. */
449 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
450 (hashval_t
) arg
, INSERT
);
452 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
458 gen_int_mode (HOST_WIDE_INT c
, enum machine_mode mode
)
460 return GEN_INT (trunc_int_for_mode (c
, mode
));
463 /* CONST_DOUBLEs might be created from pairs of integers, or from
464 REAL_VALUE_TYPEs. Also, their length is known only at run time,
465 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
467 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
468 hash table. If so, return its counterpart; otherwise add it
469 to the hash table and return it. */
471 lookup_const_double (rtx real
)
473 void **slot
= htab_find_slot (const_double_htab
, real
, INSERT
);
480 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
481 VALUE in mode MODE. */
483 const_double_from_real_value (REAL_VALUE_TYPE value
, enum machine_mode mode
)
485 rtx real
= rtx_alloc (CONST_DOUBLE
);
486 PUT_MODE (real
, mode
);
490 return lookup_const_double (real
);
493 /* Determine whether FIXED, a CONST_FIXED, already exists in the
494 hash table. If so, return its counterpart; otherwise add it
495 to the hash table and return it. */
498 lookup_const_fixed (rtx fixed
)
500 void **slot
= htab_find_slot (const_fixed_htab
, fixed
, INSERT
);
507 /* Return a CONST_FIXED rtx for a fixed-point value specified by
508 VALUE in mode MODE. */
511 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value
, enum machine_mode mode
)
513 rtx fixed
= rtx_alloc (CONST_FIXED
);
514 PUT_MODE (fixed
, mode
);
518 return lookup_const_fixed (fixed
);
521 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
522 of ints: I0 is the low-order word and I1 is the high-order word.
523 Do not use this routine for non-integer modes; convert to
524 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
527 immed_double_const (HOST_WIDE_INT i0
, HOST_WIDE_INT i1
, enum machine_mode mode
)
532 /* There are the following cases (note that there are no modes with
533 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < 2 * HOST_BITS_PER_WIDE_INT):
535 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
537 2) GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT, but the value of
538 the integer fits into HOST_WIDE_INT anyway (i.e., i1 consists only
539 from copies of the sign bit, and sign of i0 and i1 are the same), then
540 we return a CONST_INT for i0.
541 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
542 if (mode
!= VOIDmode
)
544 gcc_assert (GET_MODE_CLASS (mode
) == MODE_INT
545 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
546 /* We can get a 0 for an error mark. */
547 || GET_MODE_CLASS (mode
) == MODE_VECTOR_INT
548 || GET_MODE_CLASS (mode
) == MODE_VECTOR_FLOAT
);
550 if (GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
551 return gen_int_mode (i0
, mode
);
553 gcc_assert (GET_MODE_BITSIZE (mode
) == 2 * HOST_BITS_PER_WIDE_INT
);
556 /* If this integer fits in one word, return a CONST_INT. */
557 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
560 /* We use VOIDmode for integers. */
561 value
= rtx_alloc (CONST_DOUBLE
);
562 PUT_MODE (value
, VOIDmode
);
564 CONST_DOUBLE_LOW (value
) = i0
;
565 CONST_DOUBLE_HIGH (value
) = i1
;
567 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
568 XWINT (value
, i
) = 0;
570 return lookup_const_double (value
);
574 gen_rtx_REG (enum machine_mode mode
, unsigned int regno
)
576 /* In case the MD file explicitly references the frame pointer, have
577 all such references point to the same frame pointer. This is
578 used during frame pointer elimination to distinguish the explicit
579 references to these registers from pseudos that happened to be
582 If we have eliminated the frame pointer or arg pointer, we will
583 be using it as a normal register, for example as a spill
584 register. In such cases, we might be accessing it in a mode that
585 is not Pmode and therefore cannot use the pre-allocated rtx.
587 Also don't do this when we are making new REGs in reload, since
588 we don't want to get confused with the real pointers. */
590 if (mode
== Pmode
&& !reload_in_progress
)
592 if (regno
== FRAME_POINTER_REGNUM
593 && (!reload_completed
|| frame_pointer_needed
))
594 return frame_pointer_rtx
;
595 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
596 if (regno
== HARD_FRAME_POINTER_REGNUM
597 && (!reload_completed
|| frame_pointer_needed
))
598 return hard_frame_pointer_rtx
;
600 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
601 if (regno
== ARG_POINTER_REGNUM
)
602 return arg_pointer_rtx
;
604 #ifdef RETURN_ADDRESS_POINTER_REGNUM
605 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
606 return return_address_pointer_rtx
;
608 if (regno
== (unsigned) PIC_OFFSET_TABLE_REGNUM
609 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
610 return pic_offset_table_rtx
;
611 if (regno
== STACK_POINTER_REGNUM
)
612 return stack_pointer_rtx
;
616 /* If the per-function register table has been set up, try to re-use
617 an existing entry in that table to avoid useless generation of RTL.
619 This code is disabled for now until we can fix the various backends
620 which depend on having non-shared hard registers in some cases. Long
621 term we want to re-enable this code as it can significantly cut down
622 on the amount of useless RTL that gets generated.
624 We'll also need to fix some code that runs after reload that wants to
625 set ORIGINAL_REGNO. */
630 && regno
< FIRST_PSEUDO_REGISTER
631 && reg_raw_mode
[regno
] == mode
)
632 return regno_reg_rtx
[regno
];
635 return gen_raw_REG (mode
, regno
);
639 gen_rtx_MEM (enum machine_mode mode
, rtx addr
)
641 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
643 /* This field is not cleared by the mere allocation of the rtx, so
650 /* Generate a memory referring to non-trapping constant memory. */
653 gen_const_mem (enum machine_mode mode
, rtx addr
)
655 rtx mem
= gen_rtx_MEM (mode
, addr
);
656 MEM_READONLY_P (mem
) = 1;
657 MEM_NOTRAP_P (mem
) = 1;
661 /* Generate a MEM referring to fixed portions of the frame, e.g., register
665 gen_frame_mem (enum machine_mode mode
, rtx addr
)
667 rtx mem
= gen_rtx_MEM (mode
, addr
);
668 MEM_NOTRAP_P (mem
) = 1;
669 set_mem_alias_set (mem
, get_frame_alias_set ());
673 /* Generate a MEM referring to a temporary use of the stack, not part
674 of the fixed stack frame. For example, something which is pushed
675 by a target splitter. */
677 gen_tmp_stack_mem (enum machine_mode mode
, rtx addr
)
679 rtx mem
= gen_rtx_MEM (mode
, addr
);
680 MEM_NOTRAP_P (mem
) = 1;
681 if (!cfun
->calls_alloca
)
682 set_mem_alias_set (mem
, get_frame_alias_set ());
686 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
687 this construct would be valid, and false otherwise. */
690 validate_subreg (enum machine_mode omode
, enum machine_mode imode
,
691 const_rtx reg
, unsigned int offset
)
693 unsigned int isize
= GET_MODE_SIZE (imode
);
694 unsigned int osize
= GET_MODE_SIZE (omode
);
696 /* All subregs must be aligned. */
697 if (offset
% osize
!= 0)
700 /* The subreg offset cannot be outside the inner object. */
704 /* ??? This should not be here. Temporarily continue to allow word_mode
705 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
706 Generally, backends are doing something sketchy but it'll take time to
708 if (omode
== word_mode
)
710 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
711 is the culprit here, and not the backends. */
712 else if (osize
>= UNITS_PER_WORD
&& isize
>= osize
)
714 /* Allow component subregs of complex and vector. Though given the below
715 extraction rules, it's not always clear what that means. */
716 else if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
717 && GET_MODE_INNER (imode
) == omode
)
719 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
720 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
721 represent this. It's questionable if this ought to be represented at
722 all -- why can't this all be hidden in post-reload splitters that make
723 arbitrarily mode changes to the registers themselves. */
724 else if (VECTOR_MODE_P (omode
) && GET_MODE_INNER (omode
) == imode
)
726 /* Subregs involving floating point modes are not allowed to
727 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
728 (subreg:SI (reg:DF) 0) isn't. */
729 else if (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))
735 /* Paradoxical subregs must have offset zero. */
739 /* This is a normal subreg. Verify that the offset is representable. */
741 /* For hard registers, we already have most of these rules collected in
742 subreg_offset_representable_p. */
743 if (reg
&& REG_P (reg
) && HARD_REGISTER_P (reg
))
745 unsigned int regno
= REGNO (reg
);
747 #ifdef CANNOT_CHANGE_MODE_CLASS
748 if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
749 && GET_MODE_INNER (imode
) == omode
)
751 else if (REG_CANNOT_CHANGE_MODE_P (regno
, imode
, omode
))
755 return subreg_offset_representable_p (regno
, imode
, offset
, omode
);
758 /* For pseudo registers, we want most of the same checks. Namely:
759 If the register no larger than a word, the subreg must be lowpart.
760 If the register is larger than a word, the subreg must be the lowpart
761 of a subword. A subreg does *not* perform arbitrary bit extraction.
762 Given that we've already checked mode/offset alignment, we only have
763 to check subword subregs here. */
764 if (osize
< UNITS_PER_WORD
)
766 enum machine_mode wmode
= isize
> UNITS_PER_WORD
? word_mode
: imode
;
767 unsigned int low_off
= subreg_lowpart_offset (omode
, wmode
);
768 if (offset
% UNITS_PER_WORD
!= low_off
)
775 gen_rtx_SUBREG (enum machine_mode mode
, rtx reg
, int offset
)
777 gcc_assert (validate_subreg (mode
, GET_MODE (reg
), reg
, offset
));
778 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
781 /* Generate a SUBREG representing the least-significant part of REG if MODE
782 is smaller than mode of REG, otherwise paradoxical SUBREG. */
785 gen_lowpart_SUBREG (enum machine_mode mode
, rtx reg
)
787 enum machine_mode inmode
;
789 inmode
= GET_MODE (reg
);
790 if (inmode
== VOIDmode
)
792 return gen_rtx_SUBREG (mode
, reg
,
793 subreg_lowpart_offset (mode
, inmode
));
797 /* Create an rtvec and stores within it the RTXen passed in the arguments. */
800 gen_rtvec (int n
, ...)
808 /* Don't allocate an empty rtvec... */
812 rt_val
= rtvec_alloc (n
);
814 for (i
= 0; i
< n
; i
++)
815 rt_val
->elem
[i
] = va_arg (p
, rtx
);
822 gen_rtvec_v (int n
, rtx
*argp
)
827 /* Don't allocate an empty rtvec... */
831 rt_val
= rtvec_alloc (n
);
833 for (i
= 0; i
< n
; i
++)
834 rt_val
->elem
[i
] = *argp
++;
839 /* Return the number of bytes between the start of an OUTER_MODE
840 in-memory value and the start of an INNER_MODE in-memory value,
841 given that the former is a lowpart of the latter. It may be a
842 paradoxical lowpart, in which case the offset will be negative
843 on big-endian targets. */
846 byte_lowpart_offset (enum machine_mode outer_mode
,
847 enum machine_mode inner_mode
)
849 if (GET_MODE_SIZE (outer_mode
) < GET_MODE_SIZE (inner_mode
))
850 return subreg_lowpart_offset (outer_mode
, inner_mode
);
852 return -subreg_lowpart_offset (inner_mode
, outer_mode
);
855 /* Generate a REG rtx for a new pseudo register of mode MODE.
856 This pseudo is assigned the next sequential register number. */
859 gen_reg_rtx (enum machine_mode mode
)
862 unsigned int align
= GET_MODE_ALIGNMENT (mode
);
864 gcc_assert (can_create_pseudo_p ());
866 /* If a virtual register with bigger mode alignment is generated,
867 increase stack alignment estimation because it might be spilled
869 if (SUPPORTS_STACK_ALIGNMENT
870 && crtl
->stack_alignment_estimated
< align
871 && !crtl
->stack_realign_processed
)
872 crtl
->stack_alignment_estimated
= align
;
874 if (generating_concat_p
875 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
876 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
878 /* For complex modes, don't make a single pseudo.
879 Instead, make a CONCAT of two pseudos.
880 This allows noncontiguous allocation of the real and imaginary parts,
881 which makes much better code. Besides, allocating DCmode
882 pseudos overstrains reload on some machines like the 386. */
883 rtx realpart
, imagpart
;
884 enum machine_mode partmode
= GET_MODE_INNER (mode
);
886 realpart
= gen_reg_rtx (partmode
);
887 imagpart
= gen_reg_rtx (partmode
);
888 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
891 /* Make sure regno_pointer_align, and regno_reg_rtx are large
892 enough to have an element for this pseudo reg number. */
894 if (reg_rtx_no
== crtl
->emit
.regno_pointer_align_length
)
896 int old_size
= crtl
->emit
.regno_pointer_align_length
;
900 tmp
= XRESIZEVEC (char, crtl
->emit
.regno_pointer_align
, old_size
* 2);
901 memset (tmp
+ old_size
, 0, old_size
);
902 crtl
->emit
.regno_pointer_align
= (unsigned char *) tmp
;
904 new1
= GGC_RESIZEVEC (rtx
, regno_reg_rtx
, old_size
* 2);
905 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
906 regno_reg_rtx
= new1
;
908 crtl
->emit
.regno_pointer_align_length
= old_size
* 2;
911 val
= gen_raw_REG (mode
, reg_rtx_no
);
912 regno_reg_rtx
[reg_rtx_no
++] = val
;
916 /* Update NEW with the same attributes as REG, but with OFFSET added
917 to the REG_OFFSET. */
920 update_reg_offset (rtx new_rtx
, rtx reg
, int offset
)
922 REG_ATTRS (new_rtx
) = get_reg_attrs (REG_EXPR (reg
),
923 REG_OFFSET (reg
) + offset
);
926 /* Generate a register with same attributes as REG, but with OFFSET
927 added to the REG_OFFSET. */
930 gen_rtx_REG_offset (rtx reg
, enum machine_mode mode
, unsigned int regno
,
933 rtx new_rtx
= gen_rtx_REG (mode
, regno
);
935 update_reg_offset (new_rtx
, reg
, offset
);
939 /* Generate a new pseudo-register with the same attributes as REG, but
940 with OFFSET added to the REG_OFFSET. */
943 gen_reg_rtx_offset (rtx reg
, enum machine_mode mode
, int offset
)
945 rtx new_rtx
= gen_reg_rtx (mode
);
947 update_reg_offset (new_rtx
, reg
, offset
);
951 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
952 new register is a (possibly paradoxical) lowpart of the old one. */
955 adjust_reg_mode (rtx reg
, enum machine_mode mode
)
957 update_reg_offset (reg
, reg
, byte_lowpart_offset (mode
, GET_MODE (reg
)));
958 PUT_MODE (reg
, mode
);
961 /* Copy REG's attributes from X, if X has any attributes. If REG and X
962 have different modes, REG is a (possibly paradoxical) lowpart of X. */
965 set_reg_attrs_from_value (rtx reg
, rtx x
)
969 /* Hard registers can be reused for multiple purposes within the same
970 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
972 if (HARD_REGISTER_P (reg
))
975 offset
= byte_lowpart_offset (GET_MODE (reg
), GET_MODE (x
));
978 if (MEM_OFFSET (x
) && GET_CODE (MEM_OFFSET (x
)) == CONST_INT
)
980 = get_reg_attrs (MEM_EXPR (x
), INTVAL (MEM_OFFSET (x
)) + offset
);
982 mark_reg_pointer (reg
, 0);
987 update_reg_offset (reg
, x
, offset
);
989 mark_reg_pointer (reg
, REGNO_POINTER_ALIGN (REGNO (x
)));
993 /* Generate a REG rtx for a new pseudo register, copying the mode
994 and attributes from X. */
997 gen_reg_rtx_and_attrs (rtx x
)
999 rtx reg
= gen_reg_rtx (GET_MODE (x
));
1000 set_reg_attrs_from_value (reg
, x
);
1004 /* Set the register attributes for registers contained in PARM_RTX.
1005 Use needed values from memory attributes of MEM. */
1008 set_reg_attrs_for_parm (rtx parm_rtx
, rtx mem
)
1010 if (REG_P (parm_rtx
))
1011 set_reg_attrs_from_value (parm_rtx
, mem
);
1012 else if (GET_CODE (parm_rtx
) == PARALLEL
)
1014 /* Check for a NULL entry in the first slot, used to indicate that the
1015 parameter goes both on the stack and in registers. */
1016 int i
= XEXP (XVECEXP (parm_rtx
, 0, 0), 0) ? 0 : 1;
1017 for (; i
< XVECLEN (parm_rtx
, 0); i
++)
1019 rtx x
= XVECEXP (parm_rtx
, 0, i
);
1020 if (REG_P (XEXP (x
, 0)))
1021 REG_ATTRS (XEXP (x
, 0))
1022 = get_reg_attrs (MEM_EXPR (mem
),
1023 INTVAL (XEXP (x
, 1)));
1028 /* Set the REG_ATTRS for registers in value X, given that X represents
1032 set_reg_attrs_for_decl_rtl (tree t
, rtx x
)
1034 if (GET_CODE (x
) == SUBREG
)
1036 gcc_assert (subreg_lowpart_p (x
));
1041 = get_reg_attrs (t
, byte_lowpart_offset (GET_MODE (x
),
1043 if (GET_CODE (x
) == CONCAT
)
1045 if (REG_P (XEXP (x
, 0)))
1046 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
1047 if (REG_P (XEXP (x
, 1)))
1048 REG_ATTRS (XEXP (x
, 1))
1049 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
1051 if (GET_CODE (x
) == PARALLEL
)
1055 /* Check for a NULL entry, used to indicate that the parameter goes
1056 both on the stack and in registers. */
1057 if (XEXP (XVECEXP (x
, 0, 0), 0))
1062 for (i
= start
; i
< XVECLEN (x
, 0); i
++)
1064 rtx y
= XVECEXP (x
, 0, i
);
1065 if (REG_P (XEXP (y
, 0)))
1066 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
1071 /* Assign the RTX X to declaration T. */
1074 set_decl_rtl (tree t
, rtx x
)
1076 DECL_WRTL_CHECK (t
)->decl_with_rtl
.rtl
= x
;
1078 set_reg_attrs_for_decl_rtl (t
, x
);
1081 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1082 if the ABI requires the parameter to be passed by reference. */
1085 set_decl_incoming_rtl (tree t
, rtx x
, bool by_reference_p
)
1087 DECL_INCOMING_RTL (t
) = x
;
1088 if (x
&& !by_reference_p
)
1089 set_reg_attrs_for_decl_rtl (t
, x
);
1092 /* Identify REG (which may be a CONCAT) as a user register. */
1095 mark_user_reg (rtx reg
)
1097 if (GET_CODE (reg
) == CONCAT
)
1099 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
1100 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
1104 gcc_assert (REG_P (reg
));
1105 REG_USERVAR_P (reg
) = 1;
1109 /* Identify REG as a probable pointer register and show its alignment
1110 as ALIGN, if nonzero. */
1113 mark_reg_pointer (rtx reg
, int align
)
1115 if (! REG_POINTER (reg
))
1117 REG_POINTER (reg
) = 1;
1120 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1122 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
1123 /* We can no-longer be sure just how aligned this pointer is. */
1124 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1127 /* Return 1 plus largest pseudo reg number used in the current function. */
1135 /* Return 1 + the largest label number used so far in the current function. */
1138 max_label_num (void)
1143 /* Return first label number used in this function (if any were used). */
1146 get_first_label_num (void)
1148 return first_label_num
;
1151 /* If the rtx for label was created during the expansion of a nested
1152 function, then first_label_num won't include this label number.
1153 Fix this now so that array indices work later. */
1156 maybe_set_first_label_num (rtx x
)
1158 if (CODE_LABEL_NUMBER (x
) < first_label_num
)
1159 first_label_num
= CODE_LABEL_NUMBER (x
);
1162 /* Return a value representing some low-order bits of X, where the number
1163 of low-order bits is given by MODE. Note that no conversion is done
1164 between floating-point and fixed-point values, rather, the bit
1165 representation is returned.
1167 This function handles the cases in common between gen_lowpart, below,
1168 and two variants in cse.c and combine.c. These are the cases that can
1169 be safely handled at all points in the compilation.
1171 If this is not a case we can handle, return 0. */
1174 gen_lowpart_common (enum machine_mode mode
, rtx x
)
1176 int msize
= GET_MODE_SIZE (mode
);
1179 enum machine_mode innermode
;
1181 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1182 so we have to make one up. Yuk. */
1183 innermode
= GET_MODE (x
);
1184 if (GET_CODE (x
) == CONST_INT
1185 && msize
* BITS_PER_UNIT
<= HOST_BITS_PER_WIDE_INT
)
1186 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
, MODE_INT
, 0);
1187 else if (innermode
== VOIDmode
)
1188 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
* 2, MODE_INT
, 0);
1190 xsize
= GET_MODE_SIZE (innermode
);
1192 gcc_assert (innermode
!= VOIDmode
&& innermode
!= BLKmode
);
1194 if (innermode
== mode
)
1197 /* MODE must occupy no more words than the mode of X. */
1198 if ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
1199 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))
1202 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1203 if (SCALAR_FLOAT_MODE_P (mode
) && msize
> xsize
)
1206 offset
= subreg_lowpart_offset (mode
, innermode
);
1208 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
1209 && (GET_MODE_CLASS (mode
) == MODE_INT
1210 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
1212 /* If we are getting the low-order part of something that has been
1213 sign- or zero-extended, we can either just use the object being
1214 extended or make a narrower extension. If we want an even smaller
1215 piece than the size of the object being extended, call ourselves
1218 This case is used mostly by combine and cse. */
1220 if (GET_MODE (XEXP (x
, 0)) == mode
)
1222 else if (msize
< GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
1223 return gen_lowpart_common (mode
, XEXP (x
, 0));
1224 else if (msize
< xsize
)
1225 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
1227 else if (GET_CODE (x
) == SUBREG
|| REG_P (x
)
1228 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
1229 || GET_CODE (x
) == CONST_DOUBLE
|| GET_CODE (x
) == CONST_INT
)
1230 return simplify_gen_subreg (mode
, x
, innermode
, offset
);
1232 /* Otherwise, we can't do this. */
1237 gen_highpart (enum machine_mode mode
, rtx x
)
1239 unsigned int msize
= GET_MODE_SIZE (mode
);
1242 /* This case loses if X is a subreg. To catch bugs early,
1243 complain if an invalid MODE is used even in other cases. */
1244 gcc_assert (msize
<= UNITS_PER_WORD
1245 || msize
== (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x
)));
1247 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1248 subreg_highpart_offset (mode
, GET_MODE (x
)));
1249 gcc_assert (result
);
1251 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1252 the target if we have a MEM. gen_highpart must return a valid operand,
1253 emitting code if necessary to do so. */
1256 result
= validize_mem (result
);
1257 gcc_assert (result
);
1263 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1264 be VOIDmode constant. */
1266 gen_highpart_mode (enum machine_mode outermode
, enum machine_mode innermode
, rtx exp
)
1268 if (GET_MODE (exp
) != VOIDmode
)
1270 gcc_assert (GET_MODE (exp
) == innermode
);
1271 return gen_highpart (outermode
, exp
);
1273 return simplify_gen_subreg (outermode
, exp
, innermode
,
1274 subreg_highpart_offset (outermode
, innermode
));
1277 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1280 subreg_lowpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1282 unsigned int offset
= 0;
1283 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1287 if (WORDS_BIG_ENDIAN
)
1288 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1289 if (BYTES_BIG_ENDIAN
)
1290 offset
+= difference
% UNITS_PER_WORD
;
1296 /* Return offset in bytes to get OUTERMODE high part
1297 of the value in mode INNERMODE stored in memory in target format. */
1299 subreg_highpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1301 unsigned int offset
= 0;
1302 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1304 gcc_assert (GET_MODE_SIZE (innermode
) >= GET_MODE_SIZE (outermode
));
1308 if (! WORDS_BIG_ENDIAN
)
1309 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1310 if (! BYTES_BIG_ENDIAN
)
1311 offset
+= difference
% UNITS_PER_WORD
;
1317 /* Return 1 iff X, assumed to be a SUBREG,
1318 refers to the least significant part of its containing reg.
1319 If X is not a SUBREG, always return 1 (it is its own low part!). */
1322 subreg_lowpart_p (const_rtx x
)
1324 if (GET_CODE (x
) != SUBREG
)
1326 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1329 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1330 == SUBREG_BYTE (x
));
1333 /* Return subword OFFSET of operand OP.
1334 The word number, OFFSET, is interpreted as the word number starting
1335 at the low-order address. OFFSET 0 is the low-order word if not
1336 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1338 If we cannot extract the required word, we return zero. Otherwise,
1339 an rtx corresponding to the requested word will be returned.
1341 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1342 reload has completed, a valid address will always be returned. After
1343 reload, if a valid address cannot be returned, we return zero.
1345 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1346 it is the responsibility of the caller.
1348 MODE is the mode of OP in case it is a CONST_INT.
1350 ??? This is still rather broken for some cases. The problem for the
1351 moment is that all callers of this thing provide no 'goal mode' to
1352 tell us to work with. This exists because all callers were written
1353 in a word based SUBREG world.
1354 Now use of this function can be deprecated by simplify_subreg in most
1359 operand_subword (rtx op
, unsigned int offset
, int validate_address
, enum machine_mode mode
)
1361 if (mode
== VOIDmode
)
1362 mode
= GET_MODE (op
);
1364 gcc_assert (mode
!= VOIDmode
);
1366 /* If OP is narrower than a word, fail. */
1368 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1371 /* If we want a word outside OP, return zero. */
1373 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1376 /* Form a new MEM at the requested address. */
1379 rtx new_rtx
= adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1381 if (! validate_address
)
1384 else if (reload_completed
)
1386 if (! strict_memory_address_p (word_mode
, XEXP (new_rtx
, 0)))
1390 return replace_equiv_address (new_rtx
, XEXP (new_rtx
, 0));
1393 /* Rest can be handled by simplify_subreg. */
1394 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1397 /* Similar to `operand_subword', but never return 0. If we can't
1398 extract the required subword, put OP into a register and try again.
1399 The second attempt must succeed. We always validate the address in
1402 MODE is the mode of OP, in case it is CONST_INT. */
1405 operand_subword_force (rtx op
, unsigned int offset
, enum machine_mode mode
)
1407 rtx result
= operand_subword (op
, offset
, 1, mode
);
1412 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1414 /* If this is a register which can not be accessed by words, copy it
1415 to a pseudo register. */
1417 op
= copy_to_reg (op
);
1419 op
= force_reg (mode
, op
);
1422 result
= operand_subword (op
, offset
, 1, mode
);
1423 gcc_assert (result
);
1428 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1429 or (2) a component ref of something variable. Represent the later with
1430 a NULL expression. */
1433 component_ref_for_mem_expr (tree ref
)
1435 tree inner
= TREE_OPERAND (ref
, 0);
1437 if (TREE_CODE (inner
) == COMPONENT_REF
)
1438 inner
= component_ref_for_mem_expr (inner
);
1441 /* Now remove any conversions: they don't change what the underlying
1442 object is. Likewise for SAVE_EXPR. */
1443 while (CONVERT_EXPR_P (inner
)
1444 || TREE_CODE (inner
) == VIEW_CONVERT_EXPR
1445 || TREE_CODE (inner
) == SAVE_EXPR
)
1446 inner
= TREE_OPERAND (inner
, 0);
1448 if (! DECL_P (inner
))
1452 if (inner
== TREE_OPERAND (ref
, 0))
1455 return build3 (COMPONENT_REF
, TREE_TYPE (ref
), inner
,
1456 TREE_OPERAND (ref
, 1), NULL_TREE
);
1459 /* Returns 1 if both MEM_EXPR can be considered equal
1463 mem_expr_equal_p (const_tree expr1
, const_tree expr2
)
1468 if (! expr1
|| ! expr2
)
1471 if (TREE_CODE (expr1
) != TREE_CODE (expr2
))
1474 if (TREE_CODE (expr1
) == COMPONENT_REF
)
1476 mem_expr_equal_p (TREE_OPERAND (expr1
, 0),
1477 TREE_OPERAND (expr2
, 0))
1478 && mem_expr_equal_p (TREE_OPERAND (expr1
, 1), /* field decl */
1479 TREE_OPERAND (expr2
, 1));
1481 if (INDIRECT_REF_P (expr1
))
1482 return mem_expr_equal_p (TREE_OPERAND (expr1
, 0),
1483 TREE_OPERAND (expr2
, 0));
1485 /* ARRAY_REFs, ARRAY_RANGE_REFs and BIT_FIELD_REFs should already
1486 have been resolved here. */
1487 gcc_assert (DECL_P (expr1
));
1489 /* Decls with different pointers can't be equal. */
1493 /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1494 bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1498 get_mem_align_offset (rtx mem
, unsigned int align
)
1501 unsigned HOST_WIDE_INT offset
;
1503 /* This function can't use
1504 if (!MEM_EXPR (mem) || !MEM_OFFSET (mem)
1505 || !CONST_INT_P (MEM_OFFSET (mem))
1506 || (get_object_alignment (MEM_EXPR (mem), MEM_ALIGN (mem), align)
1510 return (- INTVAL (MEM_OFFSET (mem))) & (align / BITS_PER_UNIT - 1);
1512 - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1513 for <variable>. get_inner_reference doesn't handle it and
1514 even if it did, the alignment in that case needs to be determined
1515 from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1516 - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1517 isn't sufficiently aligned, the object it is in might be. */
1518 gcc_assert (MEM_P (mem
));
1519 expr
= MEM_EXPR (mem
);
1520 if (expr
== NULL_TREE
1521 || MEM_OFFSET (mem
) == NULL_RTX
1522 || !CONST_INT_P (MEM_OFFSET (mem
)))
1525 offset
= INTVAL (MEM_OFFSET (mem
));
1528 if (DECL_ALIGN (expr
) < align
)
1531 else if (INDIRECT_REF_P (expr
))
1533 if (TYPE_ALIGN (TREE_TYPE (expr
)) < (unsigned int) align
)
1536 else if (TREE_CODE (expr
) == COMPONENT_REF
)
1540 tree inner
= TREE_OPERAND (expr
, 0);
1541 tree field
= TREE_OPERAND (expr
, 1);
1542 tree byte_offset
= component_ref_field_offset (expr
);
1543 tree bit_offset
= DECL_FIELD_BIT_OFFSET (field
);
1546 || !host_integerp (byte_offset
, 1)
1547 || !host_integerp (bit_offset
, 1))
1550 offset
+= tree_low_cst (byte_offset
, 1);
1551 offset
+= tree_low_cst (bit_offset
, 1) / BITS_PER_UNIT
;
1553 if (inner
== NULL_TREE
)
1555 if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field
))
1556 < (unsigned int) align
)
1560 else if (DECL_P (inner
))
1562 if (DECL_ALIGN (inner
) < align
)
1566 else if (TREE_CODE (inner
) != COMPONENT_REF
)
1574 return offset
& ((align
/ BITS_PER_UNIT
) - 1);
1577 /* Given REF (a MEM) and T, either the type of X or the expression
1578 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1579 if we are making a new object of this type. BITPOS is nonzero if
1580 there is an offset outstanding on T that will be applied later. */
1583 set_mem_attributes_minus_bitpos (rtx ref
, tree t
, int objectp
,
1584 HOST_WIDE_INT bitpos
)
1586 alias_set_type alias
= MEM_ALIAS_SET (ref
);
1587 tree expr
= MEM_EXPR (ref
);
1588 rtx offset
= MEM_OFFSET (ref
);
1589 rtx size
= MEM_SIZE (ref
);
1590 unsigned int align
= MEM_ALIGN (ref
);
1591 HOST_WIDE_INT apply_bitpos
= 0;
1594 /* It can happen that type_for_mode was given a mode for which there
1595 is no language-level type. In which case it returns NULL, which
1600 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1601 if (type
== error_mark_node
)
1604 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1605 wrong answer, as it assumes that DECL_RTL already has the right alias
1606 info. Callers should not set DECL_RTL until after the call to
1607 set_mem_attributes. */
1608 gcc_assert (!DECL_P (t
) || ref
!= DECL_RTL_IF_SET (t
));
1610 /* Get the alias set from the expression or type (perhaps using a
1611 front-end routine) and use it. */
1612 alias
= get_alias_set (t
);
1614 MEM_VOLATILE_P (ref
) |= TYPE_VOLATILE (type
);
1615 MEM_IN_STRUCT_P (ref
)
1616 = AGGREGATE_TYPE_P (type
) || TREE_CODE (type
) == COMPLEX_TYPE
;
1617 MEM_POINTER (ref
) = POINTER_TYPE_P (type
);
1619 /* If we are making an object of this type, or if this is a DECL, we know
1620 that it is a scalar if the type is not an aggregate. */
1621 if ((objectp
|| DECL_P (t
))
1622 && ! AGGREGATE_TYPE_P (type
)
1623 && TREE_CODE (type
) != COMPLEX_TYPE
)
1624 MEM_SCALAR_P (ref
) = 1;
1626 /* We can set the alignment from the type if we are making an object,
1627 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1628 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
1629 || TREE_CODE (t
) == ALIGN_INDIRECT_REF
1630 || TYPE_ALIGN_OK (type
))
1631 align
= MAX (align
, TYPE_ALIGN (type
));
1633 if (TREE_CODE (t
) == MISALIGNED_INDIRECT_REF
)
1635 if (integer_zerop (TREE_OPERAND (t
, 1)))
1636 /* We don't know anything about the alignment. */
1637 align
= BITS_PER_UNIT
;
1639 align
= tree_low_cst (TREE_OPERAND (t
, 1), 1);
1642 /* If the size is known, we can set that. */
1643 if (TYPE_SIZE_UNIT (type
) && host_integerp (TYPE_SIZE_UNIT (type
), 1))
1644 size
= GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type
), 1));
1646 /* If T is not a type, we may be able to deduce some more information about
1651 bool align_computed
= false;
1653 if (TREE_THIS_VOLATILE (t
))
1654 MEM_VOLATILE_P (ref
) = 1;
1656 /* Now remove any conversions: they don't change what the underlying
1657 object is. Likewise for SAVE_EXPR. */
1658 while (CONVERT_EXPR_P (t
)
1659 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1660 || TREE_CODE (t
) == SAVE_EXPR
)
1661 t
= TREE_OPERAND (t
, 0);
1663 /* We may look through structure-like accesses for the purposes of
1664 examining TREE_THIS_NOTRAP, but not array-like accesses. */
1666 while (TREE_CODE (base
) == COMPONENT_REF
1667 || TREE_CODE (base
) == REALPART_EXPR
1668 || TREE_CODE (base
) == IMAGPART_EXPR
1669 || TREE_CODE (base
) == BIT_FIELD_REF
)
1670 base
= TREE_OPERAND (base
, 0);
1674 if (CODE_CONTAINS_STRUCT (TREE_CODE (base
), TS_DECL_WITH_VIS
))
1675 MEM_NOTRAP_P (ref
) = !DECL_WEAK (base
);
1677 MEM_NOTRAP_P (ref
) = 1;
1680 MEM_NOTRAP_P (ref
) = TREE_THIS_NOTRAP (base
);
1682 base
= get_base_address (base
);
1683 if (base
&& DECL_P (base
)
1684 && TREE_READONLY (base
)
1685 && (TREE_STATIC (base
) || DECL_EXTERNAL (base
)))
1687 tree base_type
= TREE_TYPE (base
);
1688 gcc_assert (!(base_type
&& TYPE_NEEDS_CONSTRUCTING (base_type
))
1689 || DECL_ARTIFICIAL (base
));
1690 MEM_READONLY_P (ref
) = 1;
1693 /* If this expression uses it's parent's alias set, mark it such
1694 that we won't change it. */
1695 if (component_uses_parent_alias_set (t
))
1696 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1698 /* If this is a decl, set the attributes of the MEM from it. */
1702 offset
= const0_rtx
;
1703 apply_bitpos
= bitpos
;
1704 size
= (DECL_SIZE_UNIT (t
)
1705 && host_integerp (DECL_SIZE_UNIT (t
), 1)
1706 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t
), 1)) : 0);
1707 align
= DECL_ALIGN (t
);
1708 align_computed
= true;
1711 /* If this is a constant, we know the alignment. */
1712 else if (CONSTANT_CLASS_P (t
))
1714 align
= TYPE_ALIGN (type
);
1715 #ifdef CONSTANT_ALIGNMENT
1716 align
= CONSTANT_ALIGNMENT (t
, align
);
1718 align_computed
= true;
1721 /* If this is a field reference and not a bit-field, record it. */
1722 /* ??? There is some information that can be gleaned from bit-fields,
1723 such as the word offset in the structure that might be modified.
1724 But skip it for now. */
1725 else if (TREE_CODE (t
) == COMPONENT_REF
1726 && ! DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1728 expr
= component_ref_for_mem_expr (t
);
1729 offset
= const0_rtx
;
1730 apply_bitpos
= bitpos
;
1731 /* ??? Any reason the field size would be different than
1732 the size we got from the type? */
1735 /* If this is an array reference, look for an outer field reference. */
1736 else if (TREE_CODE (t
) == ARRAY_REF
)
1738 tree off_tree
= size_zero_node
;
1739 /* We can't modify t, because we use it at the end of the
1745 tree index
= TREE_OPERAND (t2
, 1);
1746 tree low_bound
= array_ref_low_bound (t2
);
1747 tree unit_size
= array_ref_element_size (t2
);
1749 /* We assume all arrays have sizes that are a multiple of a byte.
1750 First subtract the lower bound, if any, in the type of the
1751 index, then convert to sizetype and multiply by the size of
1752 the array element. */
1753 if (! integer_zerop (low_bound
))
1754 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
1757 off_tree
= size_binop (PLUS_EXPR
,
1758 size_binop (MULT_EXPR
,
1759 fold_convert (sizetype
,
1763 t2
= TREE_OPERAND (t2
, 0);
1765 while (TREE_CODE (t2
) == ARRAY_REF
);
1771 if (host_integerp (off_tree
, 1))
1773 HOST_WIDE_INT ioff
= tree_low_cst (off_tree
, 1);
1774 HOST_WIDE_INT aoff
= (ioff
& -ioff
) * BITS_PER_UNIT
;
1775 align
= DECL_ALIGN (t2
);
1776 if (aoff
&& (unsigned HOST_WIDE_INT
) aoff
< align
)
1778 align_computed
= true;
1779 offset
= GEN_INT (ioff
);
1780 apply_bitpos
= bitpos
;
1783 else if (TREE_CODE (t2
) == COMPONENT_REF
)
1785 expr
= component_ref_for_mem_expr (t2
);
1786 if (host_integerp (off_tree
, 1))
1788 offset
= GEN_INT (tree_low_cst (off_tree
, 1));
1789 apply_bitpos
= bitpos
;
1791 /* ??? Any reason the field size would be different than
1792 the size we got from the type? */
1794 else if (flag_argument_noalias
> 1
1795 && (INDIRECT_REF_P (t2
))
1796 && TREE_CODE (TREE_OPERAND (t2
, 0)) == PARM_DECL
)
1803 /* If this is a Fortran indirect argument reference, record the
1805 else if (flag_argument_noalias
> 1
1806 && (INDIRECT_REF_P (t
))
1807 && TREE_CODE (TREE_OPERAND (t
, 0)) == PARM_DECL
)
1813 if (!align_computed
&& !INDIRECT_REF_P (t
))
1815 unsigned int obj_align
1816 = get_object_alignment (t
, align
, BIGGEST_ALIGNMENT
);
1817 align
= MAX (align
, obj_align
);
1821 /* If we modified OFFSET based on T, then subtract the outstanding
1822 bit position offset. Similarly, increase the size of the accessed
1823 object to contain the negative offset. */
1826 offset
= plus_constant (offset
, -(apply_bitpos
/ BITS_PER_UNIT
));
1828 size
= plus_constant (size
, apply_bitpos
/ BITS_PER_UNIT
);
1831 if (TREE_CODE (t
) == ALIGN_INDIRECT_REF
)
1833 /* Force EXPR and OFFSET to NULL, since we don't know exactly what
1834 we're overlapping. */
1839 /* Now set the attributes we computed above. */
1841 = get_mem_attrs (alias
, expr
, offset
, size
, align
, GET_MODE (ref
));
1843 /* If this is already known to be a scalar or aggregate, we are done. */
1844 if (MEM_IN_STRUCT_P (ref
) || MEM_SCALAR_P (ref
))
1847 /* If it is a reference into an aggregate, this is part of an aggregate.
1848 Otherwise we don't know. */
1849 else if (TREE_CODE (t
) == COMPONENT_REF
|| TREE_CODE (t
) == ARRAY_REF
1850 || TREE_CODE (t
) == ARRAY_RANGE_REF
1851 || TREE_CODE (t
) == BIT_FIELD_REF
)
1852 MEM_IN_STRUCT_P (ref
) = 1;
1856 set_mem_attributes (rtx ref
, tree t
, int objectp
)
1858 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, 0);
1861 /* Set MEM to the decl that REG refers to. */
1864 set_mem_attrs_from_reg (rtx mem
, rtx reg
)
1867 = get_mem_attrs (MEM_ALIAS_SET (mem
), REG_EXPR (reg
),
1868 GEN_INT (REG_OFFSET (reg
)),
1869 MEM_SIZE (mem
), MEM_ALIGN (mem
), GET_MODE (mem
));
1872 /* Set the alias set of MEM to SET. */
1875 set_mem_alias_set (rtx mem
, alias_set_type set
)
1877 #ifdef ENABLE_CHECKING
1878 /* If the new and old alias sets don't conflict, something is wrong. */
1879 gcc_assert (alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)));
1882 MEM_ATTRS (mem
) = get_mem_attrs (set
, MEM_EXPR (mem
), MEM_OFFSET (mem
),
1883 MEM_SIZE (mem
), MEM_ALIGN (mem
),
1887 /* Set the alignment of MEM to ALIGN bits. */
1890 set_mem_align (rtx mem
, unsigned int align
)
1892 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1893 MEM_OFFSET (mem
), MEM_SIZE (mem
), align
,
1897 /* Set the expr for MEM to EXPR. */
1900 set_mem_expr (rtx mem
, tree expr
)
1903 = get_mem_attrs (MEM_ALIAS_SET (mem
), expr
, MEM_OFFSET (mem
),
1904 MEM_SIZE (mem
), MEM_ALIGN (mem
), GET_MODE (mem
));
1907 /* Set the offset of MEM to OFFSET. */
1910 set_mem_offset (rtx mem
, rtx offset
)
1912 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1913 offset
, MEM_SIZE (mem
), MEM_ALIGN (mem
),
1917 /* Set the size of MEM to SIZE. */
1920 set_mem_size (rtx mem
, rtx size
)
1922 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1923 MEM_OFFSET (mem
), size
, MEM_ALIGN (mem
),
1927 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1928 and its address changed to ADDR. (VOIDmode means don't change the mode.
1929 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1930 returned memory location is required to be valid. The memory
1931 attributes are not changed. */
1934 change_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
, int validate
)
1938 gcc_assert (MEM_P (memref
));
1939 if (mode
== VOIDmode
)
1940 mode
= GET_MODE (memref
);
1942 addr
= XEXP (memref
, 0);
1943 if (mode
== GET_MODE (memref
) && addr
== XEXP (memref
, 0)
1944 && (!validate
|| memory_address_p (mode
, addr
)))
1949 if (reload_in_progress
|| reload_completed
)
1950 gcc_assert (memory_address_p (mode
, addr
));
1952 addr
= memory_address (mode
, addr
);
1955 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
1958 new_rtx
= gen_rtx_MEM (mode
, addr
);
1959 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
1963 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1964 way we are changing MEMREF, so we only preserve the alias set. */
1967 change_address (rtx memref
, enum machine_mode mode
, rtx addr
)
1969 rtx new_rtx
= change_address_1 (memref
, mode
, addr
, 1), size
;
1970 enum machine_mode mmode
= GET_MODE (new_rtx
);
1973 size
= mmode
== BLKmode
? 0 : GEN_INT (GET_MODE_SIZE (mmode
));
1974 align
= mmode
== BLKmode
? BITS_PER_UNIT
: GET_MODE_ALIGNMENT (mmode
);
1976 /* If there are no changes, just return the original memory reference. */
1977 if (new_rtx
== memref
)
1979 if (MEM_ATTRS (memref
) == 0
1980 || (MEM_EXPR (memref
) == NULL
1981 && MEM_OFFSET (memref
) == NULL
1982 && MEM_SIZE (memref
) == size
1983 && MEM_ALIGN (memref
) == align
))
1986 new_rtx
= gen_rtx_MEM (mmode
, XEXP (memref
, 0));
1987 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
1991 = get_mem_attrs (MEM_ALIAS_SET (memref
), 0, 0, size
, align
, mmode
);
1996 /* Return a memory reference like MEMREF, but with its mode changed
1997 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1998 nonzero, the memory address is forced to be valid.
1999 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
2000 and caller is responsible for adjusting MEMREF base register. */
2003 adjust_address_1 (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
,
2004 int validate
, int adjust
)
2006 rtx addr
= XEXP (memref
, 0);
2008 rtx memoffset
= MEM_OFFSET (memref
);
2010 unsigned int memalign
= MEM_ALIGN (memref
);
2013 /* If there are no changes, just return the original memory reference. */
2014 if (mode
== GET_MODE (memref
) && !offset
2015 && (!validate
|| memory_address_p (mode
, addr
)))
2018 /* ??? Prefer to create garbage instead of creating shared rtl.
2019 This may happen even if offset is nonzero -- consider
2020 (plus (plus reg reg) const_int) -- so do this always. */
2021 addr
= copy_rtx (addr
);
2023 /* Convert a possibly large offset to a signed value within the
2024 range of the target address space. */
2025 pbits
= GET_MODE_BITSIZE (Pmode
);
2026 if (HOST_BITS_PER_WIDE_INT
> pbits
)
2028 int shift
= HOST_BITS_PER_WIDE_INT
- pbits
;
2029 offset
= (((HOST_WIDE_INT
) ((unsigned HOST_WIDE_INT
) offset
<< shift
))
2035 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2036 object, we can merge it into the LO_SUM. */
2037 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
2039 && (unsigned HOST_WIDE_INT
) offset
2040 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
2041 addr
= gen_rtx_LO_SUM (Pmode
, XEXP (addr
, 0),
2042 plus_constant (XEXP (addr
, 1), offset
));
2044 addr
= plus_constant (addr
, offset
);
2047 new_rtx
= change_address_1 (memref
, mode
, addr
, validate
);
2049 /* If the address is a REG, change_address_1 rightfully returns memref,
2050 but this would destroy memref's MEM_ATTRS. */
2051 if (new_rtx
== memref
&& offset
!= 0)
2052 new_rtx
= copy_rtx (new_rtx
);
2054 /* Compute the new values of the memory attributes due to this adjustment.
2055 We add the offsets and update the alignment. */
2057 memoffset
= GEN_INT (offset
+ INTVAL (memoffset
));
2059 /* Compute the new alignment by taking the MIN of the alignment and the
2060 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2065 (unsigned HOST_WIDE_INT
) (offset
& -offset
) * BITS_PER_UNIT
);
2067 /* We can compute the size in a number of ways. */
2068 if (GET_MODE (new_rtx
) != BLKmode
)
2069 size
= GEN_INT (GET_MODE_SIZE (GET_MODE (new_rtx
)));
2070 else if (MEM_SIZE (memref
))
2071 size
= plus_constant (MEM_SIZE (memref
), -offset
);
2073 MEM_ATTRS (new_rtx
) = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
),
2074 memoffset
, size
, memalign
, GET_MODE (new_rtx
));
2076 /* At some point, we should validate that this offset is within the object,
2077 if all the appropriate values are known. */
2081 /* Return a memory reference like MEMREF, but with its mode changed
2082 to MODE and its address changed to ADDR, which is assumed to be
2083 MEMREF offset by OFFSET bytes. If VALIDATE is
2084 nonzero, the memory address is forced to be valid. */
2087 adjust_automodify_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
,
2088 HOST_WIDE_INT offset
, int validate
)
2090 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
);
2091 return adjust_address_1 (memref
, mode
, offset
, validate
, 0);
2094 /* Return a memory reference like MEMREF, but whose address is changed by
2095 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2096 known to be in OFFSET (possibly 1). */
2099 offset_address (rtx memref
, rtx offset
, unsigned HOST_WIDE_INT pow2
)
2101 rtx new_rtx
, addr
= XEXP (memref
, 0);
2103 new_rtx
= simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
2105 /* At this point we don't know _why_ the address is invalid. It
2106 could have secondary memory references, multiplies or anything.
2108 However, if we did go and rearrange things, we can wind up not
2109 being able to recognize the magic around pic_offset_table_rtx.
2110 This stuff is fragile, and is yet another example of why it is
2111 bad to expose PIC machinery too early. */
2112 if (! memory_address_p (GET_MODE (memref
), new_rtx
)
2113 && GET_CODE (addr
) == PLUS
2114 && XEXP (addr
, 0) == pic_offset_table_rtx
)
2116 addr
= force_reg (GET_MODE (addr
), addr
);
2117 new_rtx
= simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
2120 update_temp_slot_address (XEXP (memref
, 0), new_rtx
);
2121 new_rtx
= change_address_1 (memref
, VOIDmode
, new_rtx
, 1);
2123 /* If there are no changes, just return the original memory reference. */
2124 if (new_rtx
== memref
)
2127 /* Update the alignment to reflect the offset. Reset the offset, which
2130 = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
), 0, 0,
2131 MIN (MEM_ALIGN (memref
), pow2
* BITS_PER_UNIT
),
2132 GET_MODE (new_rtx
));
2136 /* Return a memory reference like MEMREF, but with its address changed to
2137 ADDR. The caller is asserting that the actual piece of memory pointed
2138 to is the same, just the form of the address is being changed, such as
2139 by putting something into a register. */
2142 replace_equiv_address (rtx memref
, rtx addr
)
2144 /* change_address_1 copies the memory attribute structure without change
2145 and that's exactly what we want here. */
2146 update_temp_slot_address (XEXP (memref
, 0), addr
);
2147 return change_address_1 (memref
, VOIDmode
, addr
, 1);
2150 /* Likewise, but the reference is not required to be valid. */
2153 replace_equiv_address_nv (rtx memref
, rtx addr
)
2155 return change_address_1 (memref
, VOIDmode
, addr
, 0);
2158 /* Return a memory reference like MEMREF, but with its mode widened to
2159 MODE and offset by OFFSET. This would be used by targets that e.g.
2160 cannot issue QImode memory operations and have to use SImode memory
2161 operations plus masking logic. */
2164 widen_memory_access (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
)
2166 rtx new_rtx
= adjust_address_1 (memref
, mode
, offset
, 1, 1);
2167 tree expr
= MEM_EXPR (new_rtx
);
2168 rtx memoffset
= MEM_OFFSET (new_rtx
);
2169 unsigned int size
= GET_MODE_SIZE (mode
);
2171 /* If there are no changes, just return the original memory reference. */
2172 if (new_rtx
== memref
)
2175 /* If we don't know what offset we were at within the expression, then
2176 we can't know if we've overstepped the bounds. */
2182 if (TREE_CODE (expr
) == COMPONENT_REF
)
2184 tree field
= TREE_OPERAND (expr
, 1);
2185 tree offset
= component_ref_field_offset (expr
);
2187 if (! DECL_SIZE_UNIT (field
))
2193 /* Is the field at least as large as the access? If so, ok,
2194 otherwise strip back to the containing structure. */
2195 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2196 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2197 && INTVAL (memoffset
) >= 0)
2200 if (! host_integerp (offset
, 1))
2206 expr
= TREE_OPERAND (expr
, 0);
2208 = (GEN_INT (INTVAL (memoffset
)
2209 + tree_low_cst (offset
, 1)
2210 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field
), 1)
2213 /* Similarly for the decl. */
2214 else if (DECL_P (expr
)
2215 && DECL_SIZE_UNIT (expr
)
2216 && TREE_CODE (DECL_SIZE_UNIT (expr
)) == INTEGER_CST
2217 && compare_tree_int (DECL_SIZE_UNIT (expr
), size
) >= 0
2218 && (! memoffset
|| INTVAL (memoffset
) >= 0))
2222 /* The widened memory access overflows the expression, which means
2223 that it could alias another expression. Zap it. */
2230 memoffset
= NULL_RTX
;
2232 /* The widened memory may alias other stuff, so zap the alias set. */
2233 /* ??? Maybe use get_alias_set on any remaining expression. */
2235 MEM_ATTRS (new_rtx
) = get_mem_attrs (0, expr
, memoffset
, GEN_INT (size
),
2236 MEM_ALIGN (new_rtx
), mode
);
2241 /* A fake decl that is used as the MEM_EXPR of spill slots. */
2242 static GTY(()) tree spill_slot_decl
;
2245 get_spill_slot_decl (bool force_build_p
)
2247 tree d
= spill_slot_decl
;
2250 if (d
|| !force_build_p
)
2253 d
= build_decl (VAR_DECL
, get_identifier ("%sfp"), void_type_node
);
2254 DECL_ARTIFICIAL (d
) = 1;
2255 DECL_IGNORED_P (d
) = 1;
2257 TREE_THIS_NOTRAP (d
) = 1;
2258 spill_slot_decl
= d
;
2260 rd
= gen_rtx_MEM (BLKmode
, frame_pointer_rtx
);
2261 MEM_NOTRAP_P (rd
) = 1;
2262 MEM_ATTRS (rd
) = get_mem_attrs (new_alias_set (), d
, const0_rtx
,
2263 NULL_RTX
, 0, BLKmode
);
2264 SET_DECL_RTL (d
, rd
);
2269 /* Given MEM, a result from assign_stack_local, fill in the memory
2270 attributes as appropriate for a register allocator spill slot.
2271 These slots are not aliasable by other memory. We arrange for
2272 them all to use a single MEM_EXPR, so that the aliasing code can
2273 work properly in the case of shared spill slots. */
2276 set_mem_attrs_for_spill (rtx mem
)
2278 alias_set_type alias
;
2282 expr
= get_spill_slot_decl (true);
2283 alias
= MEM_ALIAS_SET (DECL_RTL (expr
));
2285 /* We expect the incoming memory to be of the form:
2286 (mem:MODE (plus (reg sfp) (const_int offset)))
2287 with perhaps the plus missing for offset = 0. */
2288 addr
= XEXP (mem
, 0);
2289 offset
= const0_rtx
;
2290 if (GET_CODE (addr
) == PLUS
2291 && GET_CODE (XEXP (addr
, 1)) == CONST_INT
)
2292 offset
= XEXP (addr
, 1);
2294 MEM_ATTRS (mem
) = get_mem_attrs (alias
, expr
, offset
,
2295 MEM_SIZE (mem
), MEM_ALIGN (mem
),
2297 MEM_NOTRAP_P (mem
) = 1;
2300 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2303 gen_label_rtx (void)
2305 return gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
, NULL_RTX
,
2306 NULL
, label_num
++, NULL
);
2309 /* For procedure integration. */
2311 /* Install new pointers to the first and last insns in the chain.
2312 Also, set cur_insn_uid to one higher than the last in use.
2313 Used for an inline-procedure after copying the insn chain. */
2316 set_new_first_and_last_insn (rtx first
, rtx last
)
2324 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2325 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2330 /* Go through all the RTL insn bodies and copy any invalid shared
2331 structure. This routine should only be called once. */
2334 unshare_all_rtl_1 (rtx insn
)
2336 /* Unshare just about everything else. */
2337 unshare_all_rtl_in_chain (insn
);
2339 /* Make sure the addresses of stack slots found outside the insn chain
2340 (such as, in DECL_RTL of a variable) are not shared
2341 with the insn chain.
2343 This special care is necessary when the stack slot MEM does not
2344 actually appear in the insn chain. If it does appear, its address
2345 is unshared from all else at that point. */
2346 stack_slot_list
= copy_rtx_if_shared (stack_slot_list
);
2349 /* Go through all the RTL insn bodies and copy any invalid shared
2350 structure, again. This is a fairly expensive thing to do so it
2351 should be done sparingly. */
2354 unshare_all_rtl_again (rtx insn
)
2359 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2362 reset_used_flags (PATTERN (p
));
2363 reset_used_flags (REG_NOTES (p
));
2366 /* Make sure that virtual stack slots are not shared. */
2367 set_used_decls (DECL_INITIAL (cfun
->decl
));
2369 /* Make sure that virtual parameters are not shared. */
2370 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= TREE_CHAIN (decl
))
2371 set_used_flags (DECL_RTL (decl
));
2373 reset_used_flags (stack_slot_list
);
2375 unshare_all_rtl_1 (insn
);
2379 unshare_all_rtl (void)
2381 unshare_all_rtl_1 (get_insns ());
2385 struct rtl_opt_pass pass_unshare_all_rtl
=
2389 "unshare", /* name */
2391 unshare_all_rtl
, /* execute */
2394 0, /* static_pass_number */
2396 0, /* properties_required */
2397 0, /* properties_provided */
2398 0, /* properties_destroyed */
2399 0, /* todo_flags_start */
2400 TODO_dump_func
| TODO_verify_rtl_sharing
/* todo_flags_finish */
2405 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2406 Recursively does the same for subexpressions. */
2409 verify_rtx_sharing (rtx orig
, rtx insn
)
2414 const char *format_ptr
;
2419 code
= GET_CODE (x
);
2421 /* These types may be freely shared. */
2437 /* SCRATCH must be shared because they represent distinct values. */
2439 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
)
2444 if (shared_const_p (orig
))
2449 /* A MEM is allowed to be shared if its address is constant. */
2450 if (CONSTANT_ADDRESS_P (XEXP (x
, 0))
2451 || reload_completed
|| reload_in_progress
)
2460 /* This rtx may not be shared. If it has already been seen,
2461 replace it with a copy of itself. */
2462 #ifdef ENABLE_CHECKING
2463 if (RTX_FLAG (x
, used
))
2465 error ("invalid rtl sharing found in the insn");
2467 error ("shared rtx");
2469 internal_error ("internal consistency failure");
2472 gcc_assert (!RTX_FLAG (x
, used
));
2474 RTX_FLAG (x
, used
) = 1;
2476 /* Now scan the subexpressions recursively. */
2478 format_ptr
= GET_RTX_FORMAT (code
);
2480 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2482 switch (*format_ptr
++)
2485 verify_rtx_sharing (XEXP (x
, i
), insn
);
2489 if (XVEC (x
, i
) != NULL
)
2492 int len
= XVECLEN (x
, i
);
2494 for (j
= 0; j
< len
; j
++)
2496 /* We allow sharing of ASM_OPERANDS inside single
2498 if (j
&& GET_CODE (XVECEXP (x
, i
, j
)) == SET
2499 && (GET_CODE (SET_SRC (XVECEXP (x
, i
, j
)))
2501 verify_rtx_sharing (SET_DEST (XVECEXP (x
, i
, j
)), insn
);
2503 verify_rtx_sharing (XVECEXP (x
, i
, j
), insn
);
2512 /* Go through all the RTL insn bodies and check that there is no unexpected
2513 sharing in between the subexpressions. */
2516 verify_rtl_sharing (void)
2520 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2523 reset_used_flags (PATTERN (p
));
2524 reset_used_flags (REG_NOTES (p
));
2525 if (GET_CODE (PATTERN (p
)) == SEQUENCE
)
2528 rtx q
, sequence
= PATTERN (p
);
2530 for (i
= 0; i
< XVECLEN (sequence
, 0); i
++)
2532 q
= XVECEXP (sequence
, 0, i
);
2533 gcc_assert (INSN_P (q
));
2534 reset_used_flags (PATTERN (q
));
2535 reset_used_flags (REG_NOTES (q
));
2540 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2543 verify_rtx_sharing (PATTERN (p
), p
);
2544 verify_rtx_sharing (REG_NOTES (p
), p
);
2548 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2549 Assumes the mark bits are cleared at entry. */
2552 unshare_all_rtl_in_chain (rtx insn
)
2554 for (; insn
; insn
= NEXT_INSN (insn
))
2557 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2558 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2562 /* Go through all virtual stack slots of a function and mark them as
2563 shared. We never replace the DECL_RTLs themselves with a copy,
2564 but expressions mentioned into a DECL_RTL cannot be shared with
2565 expressions in the instruction stream.
2567 Note that reload may convert pseudo registers into memories in-place.
2568 Pseudo registers are always shared, but MEMs never are. Thus if we
2569 reset the used flags on MEMs in the instruction stream, we must set
2570 them again on MEMs that appear in DECL_RTLs. */
2573 set_used_decls (tree blk
)
2578 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2579 if (DECL_RTL_SET_P (t
))
2580 set_used_flags (DECL_RTL (t
));
2582 /* Now process sub-blocks. */
2583 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= BLOCK_CHAIN (t
))
2587 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2588 Recursively does the same for subexpressions. Uses
2589 copy_rtx_if_shared_1 to reduce stack space. */
2592 copy_rtx_if_shared (rtx orig
)
2594 copy_rtx_if_shared_1 (&orig
);
2598 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2599 use. Recursively does the same for subexpressions. */
2602 copy_rtx_if_shared_1 (rtx
*orig1
)
2608 const char *format_ptr
;
2612 /* Repeat is used to turn tail-recursion into iteration. */
2619 code
= GET_CODE (x
);
2621 /* These types may be freely shared. */
2636 /* SCRATCH must be shared because they represent distinct values. */
2639 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
)
2644 if (shared_const_p (x
))
2653 /* The chain of insns is not being copied. */
2660 /* This rtx may not be shared. If it has already been seen,
2661 replace it with a copy of itself. */
2663 if (RTX_FLAG (x
, used
))
2665 x
= shallow_copy_rtx (x
);
2668 RTX_FLAG (x
, used
) = 1;
2670 /* Now scan the subexpressions recursively.
2671 We can store any replaced subexpressions directly into X
2672 since we know X is not shared! Any vectors in X
2673 must be copied if X was copied. */
2675 format_ptr
= GET_RTX_FORMAT (code
);
2676 length
= GET_RTX_LENGTH (code
);
2679 for (i
= 0; i
< length
; i
++)
2681 switch (*format_ptr
++)
2685 copy_rtx_if_shared_1 (last_ptr
);
2686 last_ptr
= &XEXP (x
, i
);
2690 if (XVEC (x
, i
) != NULL
)
2693 int len
= XVECLEN (x
, i
);
2695 /* Copy the vector iff I copied the rtx and the length
2697 if (copied
&& len
> 0)
2698 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
2700 /* Call recursively on all inside the vector. */
2701 for (j
= 0; j
< len
; j
++)
2704 copy_rtx_if_shared_1 (last_ptr
);
2705 last_ptr
= &XVECEXP (x
, i
, j
);
2720 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2721 to look for shared sub-parts. */
2724 reset_used_flags (rtx x
)
2728 const char *format_ptr
;
2731 /* Repeat is used to turn tail-recursion into iteration. */
2736 code
= GET_CODE (x
);
2738 /* These types may be freely shared so we needn't do any resetting
2760 /* The chain of insns is not being copied. */
2767 RTX_FLAG (x
, used
) = 0;
2769 format_ptr
= GET_RTX_FORMAT (code
);
2770 length
= GET_RTX_LENGTH (code
);
2772 for (i
= 0; i
< length
; i
++)
2774 switch (*format_ptr
++)
2782 reset_used_flags (XEXP (x
, i
));
2786 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2787 reset_used_flags (XVECEXP (x
, i
, j
));
2793 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2794 to look for shared sub-parts. */
2797 set_used_flags (rtx x
)
2801 const char *format_ptr
;
2806 code
= GET_CODE (x
);
2808 /* These types may be freely shared so we needn't do any resetting
2830 /* The chain of insns is not being copied. */
2837 RTX_FLAG (x
, used
) = 1;
2839 format_ptr
= GET_RTX_FORMAT (code
);
2840 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2842 switch (*format_ptr
++)
2845 set_used_flags (XEXP (x
, i
));
2849 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2850 set_used_flags (XVECEXP (x
, i
, j
));
2856 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2857 Return X or the rtx for the pseudo reg the value of X was copied into.
2858 OTHER must be valid as a SET_DEST. */
2861 make_safe_from (rtx x
, rtx other
)
2864 switch (GET_CODE (other
))
2867 other
= SUBREG_REG (other
);
2869 case STRICT_LOW_PART
:
2872 other
= XEXP (other
, 0);
2881 && GET_CODE (x
) != SUBREG
)
2883 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
2884 || reg_mentioned_p (other
, x
))))
2886 rtx temp
= gen_reg_rtx (GET_MODE (x
));
2887 emit_move_insn (temp
, x
);
2893 /* Emission of insns (adding them to the doubly-linked list). */
2895 /* Return the first insn of the current sequence or current function. */
2903 /* Specify a new insn as the first in the chain. */
2906 set_first_insn (rtx insn
)
2908 gcc_assert (!PREV_INSN (insn
));
2912 /* Return the last insn emitted in current sequence or current function. */
2915 get_last_insn (void)
2920 /* Specify a new insn as the last in the chain. */
2923 set_last_insn (rtx insn
)
2925 gcc_assert (!NEXT_INSN (insn
));
2929 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2932 get_last_insn_anywhere (void)
2934 struct sequence_stack
*stack
;
2937 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
2938 if (stack
->last
!= 0)
2943 /* Return the first nonnote insn emitted in current sequence or current
2944 function. This routine looks inside SEQUENCEs. */
2947 get_first_nonnote_insn (void)
2949 rtx insn
= first_insn
;
2954 for (insn
= next_insn (insn
);
2955 insn
&& NOTE_P (insn
);
2956 insn
= next_insn (insn
))
2960 if (NONJUMP_INSN_P (insn
)
2961 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2962 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2969 /* Return the last nonnote insn emitted in current sequence or current
2970 function. This routine looks inside SEQUENCEs. */
2973 get_last_nonnote_insn (void)
2975 rtx insn
= last_insn
;
2980 for (insn
= previous_insn (insn
);
2981 insn
&& NOTE_P (insn
);
2982 insn
= previous_insn (insn
))
2986 if (NONJUMP_INSN_P (insn
)
2987 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2988 insn
= XVECEXP (PATTERN (insn
), 0,
2989 XVECLEN (PATTERN (insn
), 0) - 1);
2996 /* Return a number larger than any instruction's uid in this function. */
3001 return cur_insn_uid
;
3004 /* Return the next insn. If it is a SEQUENCE, return the first insn
3008 next_insn (rtx insn
)
3012 insn
= NEXT_INSN (insn
);
3013 if (insn
&& NONJUMP_INSN_P (insn
)
3014 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3015 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3021 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3025 previous_insn (rtx insn
)
3029 insn
= PREV_INSN (insn
);
3030 if (insn
&& NONJUMP_INSN_P (insn
)
3031 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3032 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
3038 /* Return the next insn after INSN that is not a NOTE. This routine does not
3039 look inside SEQUENCEs. */
3042 next_nonnote_insn (rtx insn
)
3046 insn
= NEXT_INSN (insn
);
3047 if (insn
== 0 || !NOTE_P (insn
))
3054 /* Return the previous insn before INSN that is not a NOTE. This routine does
3055 not look inside SEQUENCEs. */
3058 prev_nonnote_insn (rtx insn
)
3062 insn
= PREV_INSN (insn
);
3063 if (insn
== 0 || !NOTE_P (insn
))
3070 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3071 or 0, if there is none. This routine does not look inside
3075 next_real_insn (rtx insn
)
3079 insn
= NEXT_INSN (insn
);
3080 if (insn
== 0 || INSN_P (insn
))
3087 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3088 or 0, if there is none. This routine does not look inside
3092 prev_real_insn (rtx insn
)
3096 insn
= PREV_INSN (insn
);
3097 if (insn
== 0 || INSN_P (insn
))
3104 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3105 This routine does not look inside SEQUENCEs. */
3108 last_call_insn (void)
3112 for (insn
= get_last_insn ();
3113 insn
&& !CALL_P (insn
);
3114 insn
= PREV_INSN (insn
))
3120 /* Find the next insn after INSN that really does something. This routine
3121 does not look inside SEQUENCEs. Until reload has completed, this is the
3122 same as next_real_insn. */
3125 active_insn_p (const_rtx insn
)
3127 return (CALL_P (insn
) || JUMP_P (insn
)
3128 || (NONJUMP_INSN_P (insn
)
3129 && (! reload_completed
3130 || (GET_CODE (PATTERN (insn
)) != USE
3131 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
3135 next_active_insn (rtx insn
)
3139 insn
= NEXT_INSN (insn
);
3140 if (insn
== 0 || active_insn_p (insn
))
3147 /* Find the last insn before INSN that really does something. This routine
3148 does not look inside SEQUENCEs. Until reload has completed, this is the
3149 same as prev_real_insn. */
3152 prev_active_insn (rtx insn
)
3156 insn
= PREV_INSN (insn
);
3157 if (insn
== 0 || active_insn_p (insn
))
3164 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3167 next_label (rtx insn
)
3171 insn
= NEXT_INSN (insn
);
3172 if (insn
== 0 || LABEL_P (insn
))
3179 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3182 prev_label (rtx insn
)
3186 insn
= PREV_INSN (insn
);
3187 if (insn
== 0 || LABEL_P (insn
))
3194 /* Return the last label to mark the same position as LABEL. Return null
3195 if LABEL itself is null. */
3198 skip_consecutive_labels (rtx label
)
3202 for (insn
= label
; insn
!= 0 && !INSN_P (insn
); insn
= NEXT_INSN (insn
))
3210 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3211 and REG_CC_USER notes so we can find it. */
3214 link_cc0_insns (rtx insn
)
3216 rtx user
= next_nonnote_insn (insn
);
3218 if (NONJUMP_INSN_P (user
) && GET_CODE (PATTERN (user
)) == SEQUENCE
)
3219 user
= XVECEXP (PATTERN (user
), 0, 0);
3221 add_reg_note (user
, REG_CC_SETTER
, insn
);
3222 add_reg_note (insn
, REG_CC_USER
, user
);
3225 /* Return the next insn that uses CC0 after INSN, which is assumed to
3226 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3227 applied to the result of this function should yield INSN).
3229 Normally, this is simply the next insn. However, if a REG_CC_USER note
3230 is present, it contains the insn that uses CC0.
3232 Return 0 if we can't find the insn. */
3235 next_cc0_user (rtx insn
)
3237 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3240 return XEXP (note
, 0);
3242 insn
= next_nonnote_insn (insn
);
3243 if (insn
&& NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3244 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3246 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3252 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3253 note, it is the previous insn. */
3256 prev_cc0_setter (rtx insn
)
3258 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3261 return XEXP (note
, 0);
3263 insn
= prev_nonnote_insn (insn
);
3264 gcc_assert (sets_cc0_p (PATTERN (insn
)));
3271 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3274 find_auto_inc (rtx
*xp
, void *data
)
3277 rtx reg
= (rtx
) data
;
3279 if (GET_RTX_CLASS (GET_CODE (x
)) != RTX_AUTOINC
)
3282 switch (GET_CODE (x
))
3290 if (rtx_equal_p (reg
, XEXP (x
, 0)))
3301 /* Increment the label uses for all labels present in rtx. */
3304 mark_label_nuses (rtx x
)
3310 code
= GET_CODE (x
);
3311 if (code
== LABEL_REF
&& LABEL_P (XEXP (x
, 0)))
3312 LABEL_NUSES (XEXP (x
, 0))++;
3314 fmt
= GET_RTX_FORMAT (code
);
3315 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3318 mark_label_nuses (XEXP (x
, i
));
3319 else if (fmt
[i
] == 'E')
3320 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3321 mark_label_nuses (XVECEXP (x
, i
, j
));
3326 /* Try splitting insns that can be split for better scheduling.
3327 PAT is the pattern which might split.
3328 TRIAL is the insn providing PAT.
3329 LAST is nonzero if we should return the last insn of the sequence produced.
3331 If this routine succeeds in splitting, it returns the first or last
3332 replacement insn depending on the value of LAST. Otherwise, it
3333 returns TRIAL. If the insn to be returned can be split, it will be. */
3336 try_split (rtx pat
, rtx trial
, int last
)
3338 rtx before
= PREV_INSN (trial
);
3339 rtx after
= NEXT_INSN (trial
);
3340 int has_barrier
= 0;
3343 rtx insn_last
, insn
;
3346 if (any_condjump_p (trial
)
3347 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3348 split_branch_probability
= INTVAL (XEXP (note
, 0));
3349 probability
= split_branch_probability
;
3351 seq
= split_insns (pat
, trial
);
3353 split_branch_probability
= -1;
3355 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3356 We may need to handle this specially. */
3357 if (after
&& BARRIER_P (after
))
3360 after
= NEXT_INSN (after
);
3366 /* Avoid infinite loop if any insn of the result matches
3367 the original pattern. */
3371 if (INSN_P (insn_last
)
3372 && rtx_equal_p (PATTERN (insn_last
), pat
))
3374 if (!NEXT_INSN (insn_last
))
3376 insn_last
= NEXT_INSN (insn_last
);
3379 /* We will be adding the new sequence to the function. The splitters
3380 may have introduced invalid RTL sharing, so unshare the sequence now. */
3381 unshare_all_rtl_in_chain (seq
);
3384 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3388 mark_jump_label (PATTERN (insn
), insn
, 0);
3390 if (probability
!= -1
3391 && any_condjump_p (insn
)
3392 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3394 /* We can preserve the REG_BR_PROB notes only if exactly
3395 one jump is created, otherwise the machine description
3396 is responsible for this step using
3397 split_branch_probability variable. */
3398 gcc_assert (njumps
== 1);
3399 add_reg_note (insn
, REG_BR_PROB
, GEN_INT (probability
));
3404 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3405 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3408 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3411 rtx
*p
= &CALL_INSN_FUNCTION_USAGE (insn
);
3414 *p
= CALL_INSN_FUNCTION_USAGE (trial
);
3415 SIBLING_CALL_P (insn
) = SIBLING_CALL_P (trial
);
3419 /* Copy notes, particularly those related to the CFG. */
3420 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3422 switch (REG_NOTE_KIND (note
))
3425 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3428 || (flag_non_call_exceptions
&& INSN_P (insn
)
3429 && may_trap_p (PATTERN (insn
))))
3430 add_reg_note (insn
, REG_EH_REGION
, XEXP (note
, 0));
3436 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3439 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3443 case REG_NON_LOCAL_GOTO
:
3444 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3447 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3453 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3455 rtx reg
= XEXP (note
, 0);
3456 if (!FIND_REG_INC_NOTE (insn
, reg
)
3457 && for_each_rtx (&PATTERN (insn
), find_auto_inc
, reg
) > 0)
3458 add_reg_note (insn
, REG_INC
, reg
);
3468 /* If there are LABELS inside the split insns increment the
3469 usage count so we don't delete the label. */
3473 while (insn
!= NULL_RTX
)
3475 /* JUMP_P insns have already been "marked" above. */
3476 if (NONJUMP_INSN_P (insn
))
3477 mark_label_nuses (PATTERN (insn
));
3479 insn
= PREV_INSN (insn
);
3483 tem
= emit_insn_after_setloc (seq
, trial
, INSN_LOCATOR (trial
));
3485 delete_insn (trial
);
3487 emit_barrier_after (tem
);
3489 /* Recursively call try_split for each new insn created; by the
3490 time control returns here that insn will be fully split, so
3491 set LAST and continue from the insn after the one returned.
3492 We can't use next_active_insn here since AFTER may be a note.
3493 Ignore deleted insns, which can be occur if not optimizing. */
3494 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3495 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
3496 tem
= try_split (PATTERN (tem
), tem
, 1);
3498 /* Return either the first or the last insn, depending on which was
3501 ? (after
? PREV_INSN (after
) : last_insn
)
3502 : NEXT_INSN (before
);
3505 /* Make and return an INSN rtx, initializing all its slots.
3506 Store PATTERN in the pattern slots. */
3509 make_insn_raw (rtx pattern
)
3513 insn
= rtx_alloc (INSN
);
3515 INSN_UID (insn
) = cur_insn_uid
++;
3516 PATTERN (insn
) = pattern
;
3517 INSN_CODE (insn
) = -1;
3518 REG_NOTES (insn
) = NULL
;
3519 INSN_LOCATOR (insn
) = curr_insn_locator ();
3520 BLOCK_FOR_INSN (insn
) = NULL
;
3522 #ifdef ENABLE_RTL_CHECKING
3525 && (returnjump_p (insn
)
3526 || (GET_CODE (insn
) == SET
3527 && SET_DEST (insn
) == pc_rtx
)))
3529 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3537 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3540 make_jump_insn_raw (rtx pattern
)
3544 insn
= rtx_alloc (JUMP_INSN
);
3545 INSN_UID (insn
) = cur_insn_uid
++;
3547 PATTERN (insn
) = pattern
;
3548 INSN_CODE (insn
) = -1;
3549 REG_NOTES (insn
) = NULL
;
3550 JUMP_LABEL (insn
) = NULL
;
3551 INSN_LOCATOR (insn
) = curr_insn_locator ();
3552 BLOCK_FOR_INSN (insn
) = NULL
;
3557 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3560 make_call_insn_raw (rtx pattern
)
3564 insn
= rtx_alloc (CALL_INSN
);
3565 INSN_UID (insn
) = cur_insn_uid
++;
3567 PATTERN (insn
) = pattern
;
3568 INSN_CODE (insn
) = -1;
3569 REG_NOTES (insn
) = NULL
;
3570 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3571 INSN_LOCATOR (insn
) = curr_insn_locator ();
3572 BLOCK_FOR_INSN (insn
) = NULL
;
3577 /* Add INSN to the end of the doubly-linked list.
3578 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3583 PREV_INSN (insn
) = last_insn
;
3584 NEXT_INSN (insn
) = 0;
3586 if (NULL
!= last_insn
)
3587 NEXT_INSN (last_insn
) = insn
;
3589 if (NULL
== first_insn
)
3595 /* Add INSN into the doubly-linked list after insn AFTER. This and
3596 the next should be the only functions called to insert an insn once
3597 delay slots have been filled since only they know how to update a
3601 add_insn_after (rtx insn
, rtx after
, basic_block bb
)
3603 rtx next
= NEXT_INSN (after
);
3605 gcc_assert (!optimize
|| !INSN_DELETED_P (after
));
3607 NEXT_INSN (insn
) = next
;
3608 PREV_INSN (insn
) = after
;
3612 PREV_INSN (next
) = insn
;
3613 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
3614 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
3616 else if (last_insn
== after
)
3620 struct sequence_stack
*stack
= seq_stack
;
3621 /* Scan all pending sequences too. */
3622 for (; stack
; stack
= stack
->next
)
3623 if (after
== stack
->last
)
3632 if (!BARRIER_P (after
)
3633 && !BARRIER_P (insn
)
3634 && (bb
= BLOCK_FOR_INSN (after
)))
3636 set_block_for_insn (insn
, bb
);
3638 df_insn_rescan (insn
);
3639 /* Should not happen as first in the BB is always
3640 either NOTE or LABEL. */
3641 if (BB_END (bb
) == after
3642 /* Avoid clobbering of structure when creating new BB. */
3643 && !BARRIER_P (insn
)
3644 && !NOTE_INSN_BASIC_BLOCK_P (insn
))
3648 NEXT_INSN (after
) = insn
;
3649 if (NONJUMP_INSN_P (after
) && GET_CODE (PATTERN (after
)) == SEQUENCE
)
3651 rtx sequence
= PATTERN (after
);
3652 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3656 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3657 the previous should be the only functions called to insert an insn
3658 once delay slots have been filled since only they know how to
3659 update a SEQUENCE. If BB is NULL, an attempt is made to infer the
3663 add_insn_before (rtx insn
, rtx before
, basic_block bb
)
3665 rtx prev
= PREV_INSN (before
);
3667 gcc_assert (!optimize
|| !INSN_DELETED_P (before
));
3669 PREV_INSN (insn
) = prev
;
3670 NEXT_INSN (insn
) = before
;
3674 NEXT_INSN (prev
) = insn
;
3675 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3677 rtx sequence
= PATTERN (prev
);
3678 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3681 else if (first_insn
== before
)
3685 struct sequence_stack
*stack
= seq_stack
;
3686 /* Scan all pending sequences too. */
3687 for (; stack
; stack
= stack
->next
)
3688 if (before
== stack
->first
)
3690 stack
->first
= insn
;
3698 && !BARRIER_P (before
)
3699 && !BARRIER_P (insn
))
3700 bb
= BLOCK_FOR_INSN (before
);
3704 set_block_for_insn (insn
, bb
);
3706 df_insn_rescan (insn
);
3707 /* Should not happen as first in the BB is always either NOTE or
3709 gcc_assert (BB_HEAD (bb
) != insn
3710 /* Avoid clobbering of structure when creating new BB. */
3712 || NOTE_INSN_BASIC_BLOCK_P (insn
));
3715 PREV_INSN (before
) = insn
;
3716 if (NONJUMP_INSN_P (before
) && GET_CODE (PATTERN (before
)) == SEQUENCE
)
3717 PREV_INSN (XVECEXP (PATTERN (before
), 0, 0)) = insn
;
3721 /* Replace insn with an deleted instruction note. */
3724 set_insn_deleted (rtx insn
)
3726 df_insn_delete (BLOCK_FOR_INSN (insn
), INSN_UID (insn
));
3727 PUT_CODE (insn
, NOTE
);
3728 NOTE_KIND (insn
) = NOTE_INSN_DELETED
;
3732 /* Remove an insn from its doubly-linked list. This function knows how
3733 to handle sequences. */
3735 remove_insn (rtx insn
)
3737 rtx next
= NEXT_INSN (insn
);
3738 rtx prev
= PREV_INSN (insn
);
3741 /* Later in the code, the block will be marked dirty. */
3742 df_insn_delete (NULL
, INSN_UID (insn
));
3746 NEXT_INSN (prev
) = next
;
3747 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3749 rtx sequence
= PATTERN (prev
);
3750 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
3753 else if (first_insn
== insn
)
3757 struct sequence_stack
*stack
= seq_stack
;
3758 /* Scan all pending sequences too. */
3759 for (; stack
; stack
= stack
->next
)
3760 if (insn
== stack
->first
)
3762 stack
->first
= next
;
3771 PREV_INSN (next
) = prev
;
3772 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
3773 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
3775 else if (last_insn
== insn
)
3779 struct sequence_stack
*stack
= seq_stack
;
3780 /* Scan all pending sequences too. */
3781 for (; stack
; stack
= stack
->next
)
3782 if (insn
== stack
->last
)
3790 if (!BARRIER_P (insn
)
3791 && (bb
= BLOCK_FOR_INSN (insn
)))
3794 df_set_bb_dirty (bb
);
3795 if (BB_HEAD (bb
) == insn
)
3797 /* Never ever delete the basic block note without deleting whole
3799 gcc_assert (!NOTE_P (insn
));
3800 BB_HEAD (bb
) = next
;
3802 if (BB_END (bb
) == insn
)
3807 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3810 add_function_usage_to (rtx call_insn
, rtx call_fusage
)
3812 gcc_assert (call_insn
&& CALL_P (call_insn
));
3814 /* Put the register usage information on the CALL. If there is already
3815 some usage information, put ours at the end. */
3816 if (CALL_INSN_FUNCTION_USAGE (call_insn
))
3820 for (link
= CALL_INSN_FUNCTION_USAGE (call_insn
); XEXP (link
, 1) != 0;
3821 link
= XEXP (link
, 1))
3824 XEXP (link
, 1) = call_fusage
;
3827 CALL_INSN_FUNCTION_USAGE (call_insn
) = call_fusage
;
3830 /* Delete all insns made since FROM.
3831 FROM becomes the new last instruction. */
3834 delete_insns_since (rtx from
)
3839 NEXT_INSN (from
) = 0;
3843 /* This function is deprecated, please use sequences instead.
3845 Move a consecutive bunch of insns to a different place in the chain.
3846 The insns to be moved are those between FROM and TO.
3847 They are moved to a new position after the insn AFTER.
3848 AFTER must not be FROM or TO or any insn in between.
3850 This function does not know about SEQUENCEs and hence should not be
3851 called after delay-slot filling has been done. */
3854 reorder_insns_nobb (rtx from
, rtx to
, rtx after
)
3856 /* Splice this bunch out of where it is now. */
3857 if (PREV_INSN (from
))
3858 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
3860 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
3861 if (last_insn
== to
)
3862 last_insn
= PREV_INSN (from
);
3863 if (first_insn
== from
)
3864 first_insn
= NEXT_INSN (to
);
3866 /* Make the new neighbors point to it and it to them. */
3867 if (NEXT_INSN (after
))
3868 PREV_INSN (NEXT_INSN (after
)) = to
;
3870 NEXT_INSN (to
) = NEXT_INSN (after
);
3871 PREV_INSN (from
) = after
;
3872 NEXT_INSN (after
) = from
;
3873 if (after
== last_insn
)
3877 /* Same as function above, but take care to update BB boundaries. */
3879 reorder_insns (rtx from
, rtx to
, rtx after
)
3881 rtx prev
= PREV_INSN (from
);
3882 basic_block bb
, bb2
;
3884 reorder_insns_nobb (from
, to
, after
);
3886 if (!BARRIER_P (after
)
3887 && (bb
= BLOCK_FOR_INSN (after
)))
3890 df_set_bb_dirty (bb
);
3892 if (!BARRIER_P (from
)
3893 && (bb2
= BLOCK_FOR_INSN (from
)))
3895 if (BB_END (bb2
) == to
)
3896 BB_END (bb2
) = prev
;
3897 df_set_bb_dirty (bb2
);
3900 if (BB_END (bb
) == after
)
3903 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
3905 df_insn_change_bb (x
, bb
);
3910 /* Emit insn(s) of given code and pattern
3911 at a specified place within the doubly-linked list.
3913 All of the emit_foo global entry points accept an object
3914 X which is either an insn list or a PATTERN of a single
3917 There are thus a few canonical ways to generate code and
3918 emit it at a specific place in the instruction stream. For
3919 example, consider the instruction named SPOT and the fact that
3920 we would like to emit some instructions before SPOT. We might
3924 ... emit the new instructions ...
3925 insns_head = get_insns ();
3928 emit_insn_before (insns_head, SPOT);
3930 It used to be common to generate SEQUENCE rtl instead, but that
3931 is a relic of the past which no longer occurs. The reason is that
3932 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
3933 generated would almost certainly die right after it was created. */
3935 /* Make X be output before the instruction BEFORE. */
3938 emit_insn_before_noloc (rtx x
, rtx before
, basic_block bb
)
3943 gcc_assert (before
);
3948 switch (GET_CODE (x
))
3959 rtx next
= NEXT_INSN (insn
);
3960 add_insn_before (insn
, before
, bb
);
3966 #ifdef ENABLE_RTL_CHECKING
3973 last
= make_insn_raw (x
);
3974 add_insn_before (last
, before
, bb
);
3981 /* Make an instruction with body X and code JUMP_INSN
3982 and output it before the instruction BEFORE. */
3985 emit_jump_insn_before_noloc (rtx x
, rtx before
)
3987 rtx insn
, last
= NULL_RTX
;
3989 gcc_assert (before
);
3991 switch (GET_CODE (x
))
4002 rtx next
= NEXT_INSN (insn
);
4003 add_insn_before (insn
, before
, NULL
);
4009 #ifdef ENABLE_RTL_CHECKING
4016 last
= make_jump_insn_raw (x
);
4017 add_insn_before (last
, before
, NULL
);
4024 /* Make an instruction with body X and code CALL_INSN
4025 and output it before the instruction BEFORE. */
4028 emit_call_insn_before_noloc (rtx x
, rtx before
)
4030 rtx last
= NULL_RTX
, insn
;
4032 gcc_assert (before
);
4034 switch (GET_CODE (x
))
4045 rtx next
= NEXT_INSN (insn
);
4046 add_insn_before (insn
, before
, NULL
);
4052 #ifdef ENABLE_RTL_CHECKING
4059 last
= make_call_insn_raw (x
);
4060 add_insn_before (last
, before
, NULL
);
4067 /* Make an insn of code BARRIER
4068 and output it before the insn BEFORE. */
4071 emit_barrier_before (rtx before
)
4073 rtx insn
= rtx_alloc (BARRIER
);
4075 INSN_UID (insn
) = cur_insn_uid
++;
4077 add_insn_before (insn
, before
, NULL
);
4081 /* Emit the label LABEL before the insn BEFORE. */
4084 emit_label_before (rtx label
, rtx before
)
4086 /* This can be called twice for the same label as a result of the
4087 confusion that follows a syntax error! So make it harmless. */
4088 if (INSN_UID (label
) == 0)
4090 INSN_UID (label
) = cur_insn_uid
++;
4091 add_insn_before (label
, before
, NULL
);
4097 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4100 emit_note_before (enum insn_note subtype
, rtx before
)
4102 rtx note
= rtx_alloc (NOTE
);
4103 INSN_UID (note
) = cur_insn_uid
++;
4104 NOTE_KIND (note
) = subtype
;
4105 BLOCK_FOR_INSN (note
) = NULL
;
4106 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
4108 add_insn_before (note
, before
, NULL
);
4112 /* Helper for emit_insn_after, handles lists of instructions
4116 emit_insn_after_1 (rtx first
, rtx after
, basic_block bb
)
4120 if (!bb
&& !BARRIER_P (after
))
4121 bb
= BLOCK_FOR_INSN (after
);
4125 df_set_bb_dirty (bb
);
4126 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4127 if (!BARRIER_P (last
))
4129 set_block_for_insn (last
, bb
);
4130 df_insn_rescan (last
);
4132 if (!BARRIER_P (last
))
4134 set_block_for_insn (last
, bb
);
4135 df_insn_rescan (last
);
4137 if (BB_END (bb
) == after
)
4141 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4144 after_after
= NEXT_INSN (after
);
4146 NEXT_INSN (after
) = first
;
4147 PREV_INSN (first
) = after
;
4148 NEXT_INSN (last
) = after_after
;
4150 PREV_INSN (after_after
) = last
;
4152 if (after
== last_insn
)
4158 /* Make X be output after the insn AFTER and set the BB of insn. If
4159 BB is NULL, an attempt is made to infer the BB from AFTER. */
4162 emit_insn_after_noloc (rtx x
, rtx after
, basic_block bb
)
4171 switch (GET_CODE (x
))
4179 last
= emit_insn_after_1 (x
, after
, bb
);
4182 #ifdef ENABLE_RTL_CHECKING
4189 last
= make_insn_raw (x
);
4190 add_insn_after (last
, after
, bb
);
4198 /* Make an insn of code JUMP_INSN with body X
4199 and output it after the insn AFTER. */
4202 emit_jump_insn_after_noloc (rtx x
, rtx after
)
4208 switch (GET_CODE (x
))
4216 last
= emit_insn_after_1 (x
, after
, NULL
);
4219 #ifdef ENABLE_RTL_CHECKING
4226 last
= make_jump_insn_raw (x
);
4227 add_insn_after (last
, after
, NULL
);
4234 /* Make an instruction with body X and code CALL_INSN
4235 and output it after the instruction AFTER. */
4238 emit_call_insn_after_noloc (rtx x
, rtx after
)
4244 switch (GET_CODE (x
))
4252 last
= emit_insn_after_1 (x
, after
, NULL
);
4255 #ifdef ENABLE_RTL_CHECKING
4262 last
= make_call_insn_raw (x
);
4263 add_insn_after (last
, after
, NULL
);
4270 /* Make an insn of code BARRIER
4271 and output it after the insn AFTER. */
4274 emit_barrier_after (rtx after
)
4276 rtx insn
= rtx_alloc (BARRIER
);
4278 INSN_UID (insn
) = cur_insn_uid
++;
4280 add_insn_after (insn
, after
, NULL
);
4284 /* Emit the label LABEL after the insn AFTER. */
4287 emit_label_after (rtx label
, rtx after
)
4289 /* This can be called twice for the same label
4290 as a result of the confusion that follows a syntax error!
4291 So make it harmless. */
4292 if (INSN_UID (label
) == 0)
4294 INSN_UID (label
) = cur_insn_uid
++;
4295 add_insn_after (label
, after
, NULL
);
4301 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4304 emit_note_after (enum insn_note subtype
, rtx after
)
4306 rtx note
= rtx_alloc (NOTE
);
4307 INSN_UID (note
) = cur_insn_uid
++;
4308 NOTE_KIND (note
) = subtype
;
4309 BLOCK_FOR_INSN (note
) = NULL
;
4310 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
4311 add_insn_after (note
, after
, NULL
);
4315 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4317 emit_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4319 rtx last
= emit_insn_after_noloc (pattern
, after
, NULL
);
4321 if (pattern
== NULL_RTX
|| !loc
)
4324 after
= NEXT_INSN (after
);
4327 if (active_insn_p (after
) && !INSN_LOCATOR (after
))
4328 INSN_LOCATOR (after
) = loc
;
4331 after
= NEXT_INSN (after
);
4336 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4338 emit_insn_after (rtx pattern
, rtx after
)
4341 return emit_insn_after_setloc (pattern
, after
, INSN_LOCATOR (after
));
4343 return emit_insn_after_noloc (pattern
, after
, NULL
);
4346 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4348 emit_jump_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4350 rtx last
= emit_jump_insn_after_noloc (pattern
, after
);
4352 if (pattern
== NULL_RTX
|| !loc
)
4355 after
= NEXT_INSN (after
);
4358 if (active_insn_p (after
) && !INSN_LOCATOR (after
))
4359 INSN_LOCATOR (after
) = loc
;
4362 after
= NEXT_INSN (after
);
4367 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4369 emit_jump_insn_after (rtx pattern
, rtx after
)
4372 return emit_jump_insn_after_setloc (pattern
, after
, INSN_LOCATOR (after
));
4374 return emit_jump_insn_after_noloc (pattern
, after
);
4377 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4379 emit_call_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4381 rtx last
= emit_call_insn_after_noloc (pattern
, after
);
4383 if (pattern
== NULL_RTX
|| !loc
)
4386 after
= NEXT_INSN (after
);
4389 if (active_insn_p (after
) && !INSN_LOCATOR (after
))
4390 INSN_LOCATOR (after
) = loc
;
4393 after
= NEXT_INSN (after
);
4398 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4400 emit_call_insn_after (rtx pattern
, rtx after
)
4403 return emit_call_insn_after_setloc (pattern
, after
, INSN_LOCATOR (after
));
4405 return emit_call_insn_after_noloc (pattern
, after
);
4408 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to SCOPE. */
4410 emit_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4412 rtx first
= PREV_INSN (before
);
4413 rtx last
= emit_insn_before_noloc (pattern
, before
, NULL
);
4415 if (pattern
== NULL_RTX
|| !loc
)
4419 first
= get_insns ();
4421 first
= NEXT_INSN (first
);
4424 if (active_insn_p (first
) && !INSN_LOCATOR (first
))
4425 INSN_LOCATOR (first
) = loc
;
4428 first
= NEXT_INSN (first
);
4433 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4435 emit_insn_before (rtx pattern
, rtx before
)
4437 if (INSN_P (before
))
4438 return emit_insn_before_setloc (pattern
, before
, INSN_LOCATOR (before
));
4440 return emit_insn_before_noloc (pattern
, before
, NULL
);
4443 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4445 emit_jump_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4447 rtx first
= PREV_INSN (before
);
4448 rtx last
= emit_jump_insn_before_noloc (pattern
, before
);
4450 if (pattern
== NULL_RTX
)
4453 first
= NEXT_INSN (first
);
4456 if (active_insn_p (first
) && !INSN_LOCATOR (first
))
4457 INSN_LOCATOR (first
) = loc
;
4460 first
= NEXT_INSN (first
);
4465 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4467 emit_jump_insn_before (rtx pattern
, rtx before
)
4469 if (INSN_P (before
))
4470 return emit_jump_insn_before_setloc (pattern
, before
, INSN_LOCATOR (before
));
4472 return emit_jump_insn_before_noloc (pattern
, before
);
4475 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4477 emit_call_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4479 rtx first
= PREV_INSN (before
);
4480 rtx last
= emit_call_insn_before_noloc (pattern
, before
);
4482 if (pattern
== NULL_RTX
)
4485 first
= NEXT_INSN (first
);
4488 if (active_insn_p (first
) && !INSN_LOCATOR (first
))
4489 INSN_LOCATOR (first
) = loc
;
4492 first
= NEXT_INSN (first
);
4497 /* like emit_call_insn_before_noloc,
4498 but set insn_locator according to before. */
4500 emit_call_insn_before (rtx pattern
, rtx before
)
4502 if (INSN_P (before
))
4503 return emit_call_insn_before_setloc (pattern
, before
, INSN_LOCATOR (before
));
4505 return emit_call_insn_before_noloc (pattern
, before
);
4508 /* Take X and emit it at the end of the doubly-linked
4511 Returns the last insn emitted. */
4516 rtx last
= last_insn
;
4522 switch (GET_CODE (x
))
4533 rtx next
= NEXT_INSN (insn
);
4540 #ifdef ENABLE_RTL_CHECKING
4547 last
= make_insn_raw (x
);
4555 /* Make an insn of code JUMP_INSN with pattern X
4556 and add it to the end of the doubly-linked list. */
4559 emit_jump_insn (rtx x
)
4561 rtx last
= NULL_RTX
, insn
;
4563 switch (GET_CODE (x
))
4574 rtx next
= NEXT_INSN (insn
);
4581 #ifdef ENABLE_RTL_CHECKING
4588 last
= make_jump_insn_raw (x
);
4596 /* Make an insn of code CALL_INSN with pattern X
4597 and add it to the end of the doubly-linked list. */
4600 emit_call_insn (rtx x
)
4604 switch (GET_CODE (x
))
4612 insn
= emit_insn (x
);
4615 #ifdef ENABLE_RTL_CHECKING
4622 insn
= make_call_insn_raw (x
);
4630 /* Add the label LABEL to the end of the doubly-linked list. */
4633 emit_label (rtx label
)
4635 /* This can be called twice for the same label
4636 as a result of the confusion that follows a syntax error!
4637 So make it harmless. */
4638 if (INSN_UID (label
) == 0)
4640 INSN_UID (label
) = cur_insn_uid
++;
4646 /* Make an insn of code BARRIER
4647 and add it to the end of the doubly-linked list. */
4652 rtx barrier
= rtx_alloc (BARRIER
);
4653 INSN_UID (barrier
) = cur_insn_uid
++;
4658 /* Emit a copy of note ORIG. */
4661 emit_note_copy (rtx orig
)
4665 note
= rtx_alloc (NOTE
);
4667 INSN_UID (note
) = cur_insn_uid
++;
4668 NOTE_DATA (note
) = NOTE_DATA (orig
);
4669 NOTE_KIND (note
) = NOTE_KIND (orig
);
4670 BLOCK_FOR_INSN (note
) = NULL
;
4676 /* Make an insn of code NOTE or type NOTE_NO
4677 and add it to the end of the doubly-linked list. */
4680 emit_note (enum insn_note kind
)
4684 note
= rtx_alloc (NOTE
);
4685 INSN_UID (note
) = cur_insn_uid
++;
4686 NOTE_KIND (note
) = kind
;
4687 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
4688 BLOCK_FOR_INSN (note
) = NULL
;
4693 /* Emit a clobber of lvalue X. */
4696 emit_clobber (rtx x
)
4698 /* CONCATs should not appear in the insn stream. */
4699 if (GET_CODE (x
) == CONCAT
)
4701 emit_clobber (XEXP (x
, 0));
4702 return emit_clobber (XEXP (x
, 1));
4704 return emit_insn (gen_rtx_CLOBBER (VOIDmode
, x
));
4707 /* Return a sequence of insns to clobber lvalue X. */
4721 /* Emit a use of rvalue X. */
4726 /* CONCATs should not appear in the insn stream. */
4727 if (GET_CODE (x
) == CONCAT
)
4729 emit_use (XEXP (x
, 0));
4730 return emit_use (XEXP (x
, 1));
4732 return emit_insn (gen_rtx_USE (VOIDmode
, x
));
4735 /* Return a sequence of insns to use rvalue X. */
4749 /* Cause next statement to emit a line note even if the line number
4753 force_next_line_note (void)
4758 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4759 note of this type already exists, remove it first. */
4762 set_unique_reg_note (rtx insn
, enum reg_note kind
, rtx datum
)
4764 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
4770 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4771 has multiple sets (some callers assume single_set
4772 means the insn only has one set, when in fact it
4773 means the insn only has one * useful * set). */
4774 if (GET_CODE (PATTERN (insn
)) == PARALLEL
&& multiple_sets (insn
))
4780 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4781 It serves no useful purpose and breaks eliminate_regs. */
4782 if (GET_CODE (datum
) == ASM_OPERANDS
)
4787 XEXP (note
, 0) = datum
;
4788 df_notes_rescan (insn
);
4796 XEXP (note
, 0) = datum
;
4802 add_reg_note (insn
, kind
, datum
);
4808 df_notes_rescan (insn
);
4814 return REG_NOTES (insn
);
4817 /* Return an indication of which type of insn should have X as a body.
4818 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4820 static enum rtx_code
4821 classify_insn (rtx x
)
4825 if (GET_CODE (x
) == CALL
)
4827 if (GET_CODE (x
) == RETURN
)
4829 if (GET_CODE (x
) == SET
)
4831 if (SET_DEST (x
) == pc_rtx
)
4833 else if (GET_CODE (SET_SRC (x
)) == CALL
)
4838 if (GET_CODE (x
) == PARALLEL
)
4841 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
4842 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
4844 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4845 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
4847 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4848 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
4854 /* Emit the rtl pattern X as an appropriate kind of insn.
4855 If X is a label, it is simply added into the insn chain. */
4860 enum rtx_code code
= classify_insn (x
);
4865 return emit_label (x
);
4867 return emit_insn (x
);
4870 rtx insn
= emit_jump_insn (x
);
4871 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
4872 return emit_barrier ();
4876 return emit_call_insn (x
);
4882 /* Space for free sequence stack entries. */
4883 static GTY ((deletable
)) struct sequence_stack
*free_sequence_stack
;
4885 /* Begin emitting insns to a sequence. If this sequence will contain
4886 something that might cause the compiler to pop arguments to function
4887 calls (because those pops have previously been deferred; see
4888 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
4889 before calling this function. That will ensure that the deferred
4890 pops are not accidentally emitted in the middle of this sequence. */
4893 start_sequence (void)
4895 struct sequence_stack
*tem
;
4897 if (free_sequence_stack
!= NULL
)
4899 tem
= free_sequence_stack
;
4900 free_sequence_stack
= tem
->next
;
4903 tem
= GGC_NEW (struct sequence_stack
);
4905 tem
->next
= seq_stack
;
4906 tem
->first
= first_insn
;
4907 tem
->last
= last_insn
;
4915 /* Set up the insn chain starting with FIRST as the current sequence,
4916 saving the previously current one. See the documentation for
4917 start_sequence for more information about how to use this function. */
4920 push_to_sequence (rtx first
)
4926 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
));
4932 /* Like push_to_sequence, but take the last insn as an argument to avoid
4933 looping through the list. */
4936 push_to_sequence2 (rtx first
, rtx last
)
4944 /* Set up the outer-level insn chain
4945 as the current sequence, saving the previously current one. */
4948 push_topmost_sequence (void)
4950 struct sequence_stack
*stack
, *top
= NULL
;
4954 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4957 first_insn
= top
->first
;
4958 last_insn
= top
->last
;
4961 /* After emitting to the outer-level insn chain, update the outer-level
4962 insn chain, and restore the previous saved state. */
4965 pop_topmost_sequence (void)
4967 struct sequence_stack
*stack
, *top
= NULL
;
4969 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4972 top
->first
= first_insn
;
4973 top
->last
= last_insn
;
4978 /* After emitting to a sequence, restore previous saved state.
4980 To get the contents of the sequence just made, you must call
4981 `get_insns' *before* calling here.
4983 If the compiler might have deferred popping arguments while
4984 generating this sequence, and this sequence will not be immediately
4985 inserted into the instruction stream, use do_pending_stack_adjust
4986 before calling get_insns. That will ensure that the deferred
4987 pops are inserted into this sequence, and not into some random
4988 location in the instruction stream. See INHIBIT_DEFER_POP for more
4989 information about deferred popping of arguments. */
4994 struct sequence_stack
*tem
= seq_stack
;
4996 first_insn
= tem
->first
;
4997 last_insn
= tem
->last
;
4998 seq_stack
= tem
->next
;
5000 memset (tem
, 0, sizeof (*tem
));
5001 tem
->next
= free_sequence_stack
;
5002 free_sequence_stack
= tem
;
5005 /* Return 1 if currently emitting into a sequence. */
5008 in_sequence_p (void)
5010 return seq_stack
!= 0;
5013 /* Put the various virtual registers into REGNO_REG_RTX. */
5016 init_virtual_regs (void)
5018 regno_reg_rtx
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
5019 regno_reg_rtx
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
5020 regno_reg_rtx
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
5021 regno_reg_rtx
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
5022 regno_reg_rtx
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
5026 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5027 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
5028 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
5029 static int copy_insn_n_scratches
;
5031 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5032 copied an ASM_OPERANDS.
5033 In that case, it is the original input-operand vector. */
5034 static rtvec orig_asm_operands_vector
;
5036 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5037 copied an ASM_OPERANDS.
5038 In that case, it is the copied input-operand vector. */
5039 static rtvec copy_asm_operands_vector
;
5041 /* Likewise for the constraints vector. */
5042 static rtvec orig_asm_constraints_vector
;
5043 static rtvec copy_asm_constraints_vector
;
5045 /* Recursively create a new copy of an rtx for copy_insn.
5046 This function differs from copy_rtx in that it handles SCRATCHes and
5047 ASM_OPERANDs properly.
5048 Normally, this function is not used directly; use copy_insn as front end.
5049 However, you could first copy an insn pattern with copy_insn and then use
5050 this function afterwards to properly copy any REG_NOTEs containing
5054 copy_insn_1 (rtx orig
)
5059 const char *format_ptr
;
5061 code
= GET_CODE (orig
);
5076 if (REG_P (XEXP (orig
, 0)) && REGNO (XEXP (orig
, 0)) < FIRST_PSEUDO_REGISTER
)
5081 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
5082 if (copy_insn_scratch_in
[i
] == orig
)
5083 return copy_insn_scratch_out
[i
];
5087 if (shared_const_p (orig
))
5091 /* A MEM with a constant address is not sharable. The problem is that
5092 the constant address may need to be reloaded. If the mem is shared,
5093 then reloading one copy of this mem will cause all copies to appear
5094 to have been reloaded. */
5100 /* Copy the various flags, fields, and other information. We assume
5101 that all fields need copying, and then clear the fields that should
5102 not be copied. That is the sensible default behavior, and forces
5103 us to explicitly document why we are *not* copying a flag. */
5104 copy
= shallow_copy_rtx (orig
);
5106 /* We do not copy the USED flag, which is used as a mark bit during
5107 walks over the RTL. */
5108 RTX_FLAG (copy
, used
) = 0;
5110 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5113 RTX_FLAG (copy
, jump
) = 0;
5114 RTX_FLAG (copy
, call
) = 0;
5115 RTX_FLAG (copy
, frame_related
) = 0;
5118 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
5120 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
5121 switch (*format_ptr
++)
5124 if (XEXP (orig
, i
) != NULL
)
5125 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
5130 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
5131 XVEC (copy
, i
) = copy_asm_constraints_vector
;
5132 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
5133 XVEC (copy
, i
) = copy_asm_operands_vector
;
5134 else if (XVEC (orig
, i
) != NULL
)
5136 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
5137 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
5138 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
5149 /* These are left unchanged. */
5156 if (code
== SCRATCH
)
5158 i
= copy_insn_n_scratches
++;
5159 gcc_assert (i
< MAX_RECOG_OPERANDS
);
5160 copy_insn_scratch_in
[i
] = orig
;
5161 copy_insn_scratch_out
[i
] = copy
;
5163 else if (code
== ASM_OPERANDS
)
5165 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
5166 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
5167 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
5168 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
5174 /* Create a new copy of an rtx.
5175 This function differs from copy_rtx in that it handles SCRATCHes and
5176 ASM_OPERANDs properly.
5177 INSN doesn't really have to be a full INSN; it could be just the
5180 copy_insn (rtx insn
)
5182 copy_insn_n_scratches
= 0;
5183 orig_asm_operands_vector
= 0;
5184 orig_asm_constraints_vector
= 0;
5185 copy_asm_operands_vector
= 0;
5186 copy_asm_constraints_vector
= 0;
5187 return copy_insn_1 (insn
);
5190 /* Initialize data structures and variables in this file
5191 before generating rtl for each function. */
5199 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
5200 last_location
= UNKNOWN_LOCATION
;
5201 first_label_num
= label_num
;
5204 /* Init the tables that describe all the pseudo regs. */
5206 crtl
->emit
.regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
5208 crtl
->emit
.regno_pointer_align
5209 = XCNEWVEC (unsigned char, crtl
->emit
.regno_pointer_align_length
);
5212 = GGC_NEWVEC (rtx
, crtl
->emit
.regno_pointer_align_length
);
5214 /* Put copies of all the hard registers into regno_reg_rtx. */
5215 memcpy (regno_reg_rtx
,
5216 static_regno_reg_rtx
,
5217 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
5219 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5220 init_virtual_regs ();
5222 /* Indicate that the virtual registers and stack locations are
5224 REG_POINTER (stack_pointer_rtx
) = 1;
5225 REG_POINTER (frame_pointer_rtx
) = 1;
5226 REG_POINTER (hard_frame_pointer_rtx
) = 1;
5227 REG_POINTER (arg_pointer_rtx
) = 1;
5229 REG_POINTER (virtual_incoming_args_rtx
) = 1;
5230 REG_POINTER (virtual_stack_vars_rtx
) = 1;
5231 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
5232 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
5233 REG_POINTER (virtual_cfa_rtx
) = 1;
5235 #ifdef STACK_BOUNDARY
5236 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
5237 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5238 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5239 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
5241 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5242 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
5243 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
5244 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5245 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5248 #ifdef INIT_EXPANDERS
5253 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5256 gen_const_vector (enum machine_mode mode
, int constant
)
5261 enum machine_mode inner
;
5263 units
= GET_MODE_NUNITS (mode
);
5264 inner
= GET_MODE_INNER (mode
);
5266 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner
));
5268 v
= rtvec_alloc (units
);
5270 /* We need to call this function after we set the scalar const_tiny_rtx
5272 gcc_assert (const_tiny_rtx
[constant
][(int) inner
]);
5274 for (i
= 0; i
< units
; ++i
)
5275 RTVEC_ELT (v
, i
) = const_tiny_rtx
[constant
][(int) inner
];
5277 tem
= gen_rtx_raw_CONST_VECTOR (mode
, v
);
5281 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5282 all elements are zero, and the one vector when all elements are one. */
5284 gen_rtx_CONST_VECTOR (enum machine_mode mode
, rtvec v
)
5286 enum machine_mode inner
= GET_MODE_INNER (mode
);
5287 int nunits
= GET_MODE_NUNITS (mode
);
5291 /* Check to see if all of the elements have the same value. */
5292 x
= RTVEC_ELT (v
, nunits
- 1);
5293 for (i
= nunits
- 2; i
>= 0; i
--)
5294 if (RTVEC_ELT (v
, i
) != x
)
5297 /* If the values are all the same, check to see if we can use one of the
5298 standard constant vectors. */
5301 if (x
== CONST0_RTX (inner
))
5302 return CONST0_RTX (mode
);
5303 else if (x
== CONST1_RTX (inner
))
5304 return CONST1_RTX (mode
);
5307 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5310 /* Initialise global register information required by all functions. */
5313 init_emit_regs (void)
5317 /* Reset register attributes */
5318 htab_empty (reg_attrs_htab
);
5320 /* We need reg_raw_mode, so initialize the modes now. */
5321 init_reg_modes_target ();
5323 /* Assign register numbers to the globally defined register rtx. */
5324 pc_rtx
= gen_rtx_PC (VOIDmode
);
5325 cc0_rtx
= gen_rtx_CC0 (VOIDmode
);
5326 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5327 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5328 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
, HARD_FRAME_POINTER_REGNUM
);
5329 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5330 virtual_incoming_args_rtx
=
5331 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5332 virtual_stack_vars_rtx
=
5333 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5334 virtual_stack_dynamic_rtx
=
5335 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5336 virtual_outgoing_args_rtx
=
5337 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5338 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5340 /* Initialize RTL for commonly used hard registers. These are
5341 copied into regno_reg_rtx as we begin to compile each function. */
5342 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5343 static_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5345 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5346 return_address_pointer_rtx
5347 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5350 #ifdef STATIC_CHAIN_REGNUM
5351 static_chain_rtx
= gen_rtx_REG (Pmode
, STATIC_CHAIN_REGNUM
);
5353 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5354 if (STATIC_CHAIN_INCOMING_REGNUM
!= STATIC_CHAIN_REGNUM
)
5355 static_chain_incoming_rtx
5356 = gen_rtx_REG (Pmode
, STATIC_CHAIN_INCOMING_REGNUM
);
5359 static_chain_incoming_rtx
= static_chain_rtx
;
5363 static_chain_rtx
= STATIC_CHAIN
;
5365 #ifdef STATIC_CHAIN_INCOMING
5366 static_chain_incoming_rtx
= STATIC_CHAIN_INCOMING
;
5368 static_chain_incoming_rtx
= static_chain_rtx
;
5372 if ((unsigned) PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5373 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5375 pic_offset_table_rtx
= NULL_RTX
;
5378 /* Create some permanent unique rtl objects shared between all functions.
5379 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5382 init_emit_once (int line_numbers
)
5385 enum machine_mode mode
;
5386 enum machine_mode double_mode
;
5388 /* Initialize the CONST_INT, CONST_DOUBLE, CONST_FIXED, and memory attribute
5390 const_int_htab
= htab_create_ggc (37, const_int_htab_hash
,
5391 const_int_htab_eq
, NULL
);
5393 const_double_htab
= htab_create_ggc (37, const_double_htab_hash
,
5394 const_double_htab_eq
, NULL
);
5396 const_fixed_htab
= htab_create_ggc (37, const_fixed_htab_hash
,
5397 const_fixed_htab_eq
, NULL
);
5399 mem_attrs_htab
= htab_create_ggc (37, mem_attrs_htab_hash
,
5400 mem_attrs_htab_eq
, NULL
);
5401 reg_attrs_htab
= htab_create_ggc (37, reg_attrs_htab_hash
,
5402 reg_attrs_htab_eq
, NULL
);
5404 no_line_numbers
= ! line_numbers
;
5406 /* Compute the word and byte modes. */
5408 byte_mode
= VOIDmode
;
5409 word_mode
= VOIDmode
;
5410 double_mode
= VOIDmode
;
5412 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5414 mode
= GET_MODE_WIDER_MODE (mode
))
5416 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5417 && byte_mode
== VOIDmode
)
5420 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5421 && word_mode
== VOIDmode
)
5425 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
5427 mode
= GET_MODE_WIDER_MODE (mode
))
5429 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
5430 && double_mode
== VOIDmode
)
5434 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
5436 #ifdef INIT_EXPANDERS
5437 /* This is to initialize {init|mark|free}_machine_status before the first
5438 call to push_function_context_to. This is needed by the Chill front
5439 end which calls push_function_context_to before the first call to
5440 init_function_start. */
5444 /* Create the unique rtx's for certain rtx codes and operand values. */
5446 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5447 tries to use these variables. */
5448 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5449 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5450 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5452 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5453 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5454 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5456 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5458 REAL_VALUE_FROM_INT (dconst0
, 0, 0, double_mode
);
5459 REAL_VALUE_FROM_INT (dconst1
, 1, 0, double_mode
);
5460 REAL_VALUE_FROM_INT (dconst2
, 2, 0, double_mode
);
5465 dconsthalf
= dconst1
;
5466 SET_REAL_EXP (&dconsthalf
, REAL_EXP (&dconsthalf
) - 1);
5468 for (i
= 0; i
< (int) ARRAY_SIZE (const_tiny_rtx
); i
++)
5470 const REAL_VALUE_TYPE
*const r
=
5471 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5473 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
5475 mode
= GET_MODE_WIDER_MODE (mode
))
5476 const_tiny_rtx
[i
][(int) mode
] =
5477 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5479 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT
);
5481 mode
= GET_MODE_WIDER_MODE (mode
))
5482 const_tiny_rtx
[i
][(int) mode
] =
5483 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5485 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5487 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5489 mode
= GET_MODE_WIDER_MODE (mode
))
5490 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5492 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT
);
5494 mode
= GET_MODE_WIDER_MODE (mode
))
5495 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5498 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT
);
5500 mode
= GET_MODE_WIDER_MODE (mode
))
5502 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
5503 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
5506 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT
);
5508 mode
= GET_MODE_WIDER_MODE (mode
))
5510 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
5511 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
5514 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
5516 mode
= GET_MODE_WIDER_MODE (mode
))
5518 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5519 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5522 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
5524 mode
= GET_MODE_WIDER_MODE (mode
))
5526 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5527 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5530 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FRACT
);
5532 mode
= GET_MODE_WIDER_MODE (mode
))
5534 FCONST0(mode
).data
.high
= 0;
5535 FCONST0(mode
).data
.low
= 0;
5536 FCONST0(mode
).mode
= mode
;
5537 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5538 FCONST0 (mode
), mode
);
5541 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UFRACT
);
5543 mode
= GET_MODE_WIDER_MODE (mode
))
5545 FCONST0(mode
).data
.high
= 0;
5546 FCONST0(mode
).data
.low
= 0;
5547 FCONST0(mode
).mode
= mode
;
5548 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5549 FCONST0 (mode
), mode
);
5552 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_ACCUM
);
5554 mode
= GET_MODE_WIDER_MODE (mode
))
5556 FCONST0(mode
).data
.high
= 0;
5557 FCONST0(mode
).data
.low
= 0;
5558 FCONST0(mode
).mode
= mode
;
5559 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5560 FCONST0 (mode
), mode
);
5562 /* We store the value 1. */
5563 FCONST1(mode
).data
.high
= 0;
5564 FCONST1(mode
).data
.low
= 0;
5565 FCONST1(mode
).mode
= mode
;
5566 lshift_double (1, 0, GET_MODE_FBIT (mode
),
5567 2 * HOST_BITS_PER_WIDE_INT
,
5568 &FCONST1(mode
).data
.low
,
5569 &FCONST1(mode
).data
.high
,
5570 SIGNED_FIXED_POINT_MODE_P (mode
));
5571 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5572 FCONST1 (mode
), mode
);
5575 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UACCUM
);
5577 mode
= GET_MODE_WIDER_MODE (mode
))
5579 FCONST0(mode
).data
.high
= 0;
5580 FCONST0(mode
).data
.low
= 0;
5581 FCONST0(mode
).mode
= mode
;
5582 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5583 FCONST0 (mode
), mode
);
5585 /* We store the value 1. */
5586 FCONST1(mode
).data
.high
= 0;
5587 FCONST1(mode
).data
.low
= 0;
5588 FCONST1(mode
).mode
= mode
;
5589 lshift_double (1, 0, GET_MODE_FBIT (mode
),
5590 2 * HOST_BITS_PER_WIDE_INT
,
5591 &FCONST1(mode
).data
.low
,
5592 &FCONST1(mode
).data
.high
,
5593 SIGNED_FIXED_POINT_MODE_P (mode
));
5594 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5595 FCONST1 (mode
), mode
);
5598 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT
);
5600 mode
= GET_MODE_WIDER_MODE (mode
))
5602 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5605 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT
);
5607 mode
= GET_MODE_WIDER_MODE (mode
))
5609 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5612 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM
);
5614 mode
= GET_MODE_WIDER_MODE (mode
))
5616 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5617 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5620 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM
);
5622 mode
= GET_MODE_WIDER_MODE (mode
))
5624 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5625 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5628 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
5629 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
5630 const_tiny_rtx
[0][i
] = const0_rtx
;
5632 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
5633 if (STORE_FLAG_VALUE
== 1)
5634 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
5637 /* Produce exact duplicate of insn INSN after AFTER.
5638 Care updating of libcall regions if present. */
5641 emit_copy_of_insn_after (rtx insn
, rtx after
)
5645 switch (GET_CODE (insn
))
5648 new_rtx
= emit_insn_after (copy_insn (PATTERN (insn
)), after
);
5652 new_rtx
= emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
5656 new_rtx
= emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
5657 if (CALL_INSN_FUNCTION_USAGE (insn
))
5658 CALL_INSN_FUNCTION_USAGE (new_rtx
)
5659 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
5660 SIBLING_CALL_P (new_rtx
) = SIBLING_CALL_P (insn
);
5661 RTL_CONST_CALL_P (new_rtx
) = RTL_CONST_CALL_P (insn
);
5662 RTL_PURE_CALL_P (new_rtx
) = RTL_PURE_CALL_P (insn
);
5663 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx
)
5664 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn
);
5671 /* Update LABEL_NUSES. */
5672 mark_jump_label (PATTERN (new_rtx
), new_rtx
, 0);
5674 INSN_LOCATOR (new_rtx
) = INSN_LOCATOR (insn
);
5676 /* If the old insn is frame related, then so is the new one. This is
5677 primarily needed for IA-64 unwind info which marks epilogue insns,
5678 which may be duplicated by the basic block reordering code. */
5679 RTX_FRAME_RELATED_P (new_rtx
) = RTX_FRAME_RELATED_P (insn
);
5681 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
5682 will make them. REG_LABEL_TARGETs are created there too, but are
5683 supposed to be sticky, so we copy them. */
5684 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5685 if (REG_NOTE_KIND (link
) != REG_LABEL_OPERAND
)
5687 if (GET_CODE (link
) == EXPR_LIST
)
5688 add_reg_note (new_rtx
, REG_NOTE_KIND (link
),
5689 copy_insn_1 (XEXP (link
, 0)));
5691 add_reg_note (new_rtx
, REG_NOTE_KIND (link
), XEXP (link
, 0));
5694 INSN_CODE (new_rtx
) = INSN_CODE (insn
);
5698 static GTY((deletable
)) rtx hard_reg_clobbers
[NUM_MACHINE_MODES
][FIRST_PSEUDO_REGISTER
];
5700 gen_hard_reg_clobber (enum machine_mode mode
, unsigned int regno
)
5702 if (hard_reg_clobbers
[mode
][regno
])
5703 return hard_reg_clobbers
[mode
][regno
];
5705 return (hard_reg_clobbers
[mode
][regno
] =
5706 gen_rtx_CLOBBER (VOIDmode
, gen_rtx_REG (mode
, regno
)));
5709 #include "gt-emit-rtl.h"