1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
30 init_reload actually has to be called earlier anyway.
32 To scan an insn, call `find_reloads'. This does two things:
33 1. sets up tables describing which values must be reloaded
34 for this insn, and what kind of hard regs they must be reloaded into;
35 2. optionally record the locations where those values appear in
36 the data, so they can be replaced properly later.
37 This is done only if the second arg to `find_reloads' is nonzero.
39 The third arg to `find_reloads' specifies the number of levels
40 of indirect addressing supported by the machine. If it is zero,
41 indirect addressing is not valid. If it is one, (MEM (REG n))
42 is valid even if (REG n) did not get a hard register; if it is two,
43 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
44 hard register, and similarly for higher values.
46 Then you must choose the hard regs to reload those pseudo regs into,
47 and generate appropriate load insns before this insn and perhaps
48 also store insns after this insn. Set up the array `reload_reg_rtx'
49 to contain the REG rtx's for the registers you used. In some
50 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
51 for certain reloads. Then that tells you which register to use,
52 so you do not need to allocate one. But you still do need to add extra
53 instructions to copy the value into and out of that register.
55 Finally you must call `subst_reloads' to substitute the reload reg rtx's
56 into the locations already recorded.
60 find_reloads can alter the operands of the instruction it is called on.
62 1. Two operands of any sort may be interchanged, if they are in a
63 commutative instruction.
64 This happens only if find_reloads thinks the instruction will compile
67 2. Pseudo-registers that are equivalent to constants are replaced
68 with those constants if they are not in hard registers.
70 1 happens every time find_reloads is called.
71 2 happens only when REPLACE is 1, which is only when
72 actually doing the reloads, not when just counting them.
74 Using a reload register for several reloads in one insn:
76 When an insn has reloads, it is considered as having three parts:
77 the input reloads, the insn itself after reloading, and the output reloads.
78 Reloads of values used in memory addresses are often needed for only one part.
80 When this is so, reload_when_needed records which part needs the reload.
81 Two reloads for different parts of the insn can share the same reload
84 When a reload is used for addresses in multiple parts, or when it is
85 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
86 a register with any other reload. */
90 /* We do not enable this with ENABLE_CHECKING, since it is awfully slow. */
95 #include "coretypes.h"
99 #include "insn-config.h"
105 #include "addresses.h"
106 #include "hard-reg-set.h"
110 #include "function.h"
116 /* True if X is a constant that can be forced into the constant pool. */
117 #define CONST_POOL_OK_P(X) \
119 && GET_CODE (X) != HIGH \
120 && !targetm.cannot_force_const_mem (X))
122 /* True if C is a non-empty register class that has too few registers
123 to be safely used as a reload target class. */
124 #define SMALL_REGISTER_CLASS_P(C) \
125 (reg_class_size [(C)] == 1 \
126 || (reg_class_size [(C)] >= 1 && CLASS_LIKELY_SPILLED_P (C)))
129 /* All reloads of the current insn are recorded here. See reload.h for
132 struct reload rld
[MAX_RELOADS
];
134 /* All the "earlyclobber" operands of the current insn
135 are recorded here. */
137 rtx reload_earlyclobbers
[MAX_RECOG_OPERANDS
];
139 int reload_n_operands
;
141 /* Replacing reloads.
143 If `replace_reloads' is nonzero, then as each reload is recorded
144 an entry is made for it in the table `replacements'.
145 Then later `subst_reloads' can look through that table and
146 perform all the replacements needed. */
148 /* Nonzero means record the places to replace. */
149 static int replace_reloads
;
151 /* Each replacement is recorded with a structure like this. */
154 rtx
*where
; /* Location to store in */
155 rtx
*subreg_loc
; /* Location of SUBREG if WHERE is inside
156 a SUBREG; 0 otherwise. */
157 int what
; /* which reload this is for */
158 enum machine_mode mode
; /* mode it must have */
161 static struct replacement replacements
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
163 /* Number of replacements currently recorded. */
164 static int n_replacements
;
166 /* Used to track what is modified by an operand. */
169 int reg_flag
; /* Nonzero if referencing a register. */
170 int safe
; /* Nonzero if this can't conflict with anything. */
171 rtx base
; /* Base address for MEM. */
172 HOST_WIDE_INT start
; /* Starting offset or register number. */
173 HOST_WIDE_INT end
; /* Ending offset or register number. */
176 #ifdef SECONDARY_MEMORY_NEEDED
178 /* Save MEMs needed to copy from one class of registers to another. One MEM
179 is used per mode, but normally only one or two modes are ever used.
181 We keep two versions, before and after register elimination. The one
182 after register elimination is record separately for each operand. This
183 is done in case the address is not valid to be sure that we separately
186 static rtx secondary_memlocs
[NUM_MACHINE_MODES
];
187 static rtx secondary_memlocs_elim
[NUM_MACHINE_MODES
][MAX_RECOG_OPERANDS
];
188 static int secondary_memlocs_elim_used
= 0;
191 /* The instruction we are doing reloads for;
192 so we can test whether a register dies in it. */
193 static rtx this_insn
;
195 /* Nonzero if this instruction is a user-specified asm with operands. */
196 static int this_insn_is_asm
;
198 /* If hard_regs_live_known is nonzero,
199 we can tell which hard regs are currently live,
200 at least enough to succeed in choosing dummy reloads. */
201 static int hard_regs_live_known
;
203 /* Indexed by hard reg number,
204 element is nonnegative if hard reg has been spilled.
205 This vector is passed to `find_reloads' as an argument
206 and is not changed here. */
207 static short *static_reload_reg_p
;
209 /* Set to 1 in subst_reg_equivs if it changes anything. */
210 static int subst_reg_equivs_changed
;
212 /* On return from push_reload, holds the reload-number for the OUT
213 operand, which can be different for that from the input operand. */
214 static int output_reloadnum
;
216 /* Compare two RTX's. */
217 #define MATCHES(x, y) \
218 (x == y || (x != 0 && (REG_P (x) \
219 ? REG_P (y) && REGNO (x) == REGNO (y) \
220 : rtx_equal_p (x, y) && ! side_effects_p (x))))
222 /* Indicates if two reloads purposes are for similar enough things that we
223 can merge their reloads. */
224 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
225 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
226 || ((when1) == (when2) && (op1) == (op2)) \
227 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
228 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
229 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
230 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
231 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
233 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
234 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
235 ((when1) != (when2) \
236 || ! ((op1) == (op2) \
237 || (when1) == RELOAD_FOR_INPUT \
238 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
239 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
241 /* If we are going to reload an address, compute the reload type to
243 #define ADDR_TYPE(type) \
244 ((type) == RELOAD_FOR_INPUT_ADDRESS \
245 ? RELOAD_FOR_INPADDR_ADDRESS \
246 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
247 ? RELOAD_FOR_OUTADDR_ADDRESS \
250 static int push_secondary_reload (int, rtx
, int, int, enum reg_class
,
251 enum machine_mode
, enum reload_type
,
252 enum insn_code
*, secondary_reload_info
*);
253 static enum reg_class
find_valid_class (enum machine_mode
, enum machine_mode
,
255 static int reload_inner_reg_of_subreg (rtx
, enum machine_mode
, int);
256 static void push_replacement (rtx
*, int, enum machine_mode
);
257 static void dup_replacements (rtx
*, rtx
*);
258 static void combine_reloads (void);
259 static int find_reusable_reload (rtx
*, rtx
, enum reg_class
,
260 enum reload_type
, int, int);
261 static rtx
find_dummy_reload (rtx
, rtx
, rtx
*, rtx
*, enum machine_mode
,
262 enum machine_mode
, enum reg_class
, int, int);
263 static int hard_reg_set_here_p (unsigned int, unsigned int, rtx
);
264 static struct decomposition
decompose (rtx
);
265 static int immune_p (rtx
, rtx
, struct decomposition
);
266 static bool alternative_allows_const_pool_ref (rtx
, const char *, int);
267 static rtx
find_reloads_toplev (rtx
, int, enum reload_type
, int, int, rtx
,
269 static rtx
make_memloc (rtx
, int);
270 static int maybe_memory_address_p (enum machine_mode
, rtx
, rtx
*);
271 static int find_reloads_address (enum machine_mode
, rtx
*, rtx
, rtx
*,
272 int, enum reload_type
, int, rtx
);
273 static rtx
subst_reg_equivs (rtx
, rtx
);
274 static rtx
subst_indexed_address (rtx
);
275 static void update_auto_inc_notes (rtx
, int, int);
276 static int find_reloads_address_1 (enum machine_mode
, rtx
, int,
277 enum rtx_code
, enum rtx_code
, rtx
*,
278 int, enum reload_type
,int, rtx
);
279 static void find_reloads_address_part (rtx
, rtx
*, enum reg_class
,
280 enum machine_mode
, int,
281 enum reload_type
, int);
282 static rtx
find_reloads_subreg_address (rtx
, int, int, enum reload_type
,
284 static void copy_replacements_1 (rtx
*, rtx
*, int);
285 static int find_inc_amount (rtx
, rtx
);
286 static int refers_to_mem_for_reload_p (rtx
);
287 static int refers_to_regno_for_reload_p (unsigned int, unsigned int,
290 /* Add NEW to reg_equiv_alt_mem_list[REGNO] if it's not present in the
294 push_reg_equiv_alt_mem (int regno
, rtx mem
)
298 for (it
= reg_equiv_alt_mem_list
[regno
]; it
; it
= XEXP (it
, 1))
299 if (rtx_equal_p (XEXP (it
, 0), mem
))
302 reg_equiv_alt_mem_list
[regno
]
303 = alloc_EXPR_LIST (REG_EQUIV
, mem
,
304 reg_equiv_alt_mem_list
[regno
]);
307 /* Determine if any secondary reloads are needed for loading (if IN_P is
308 nonzero) or storing (if IN_P is zero) X to or from a reload register of
309 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
310 are needed, push them.
312 Return the reload number of the secondary reload we made, or -1 if
313 we didn't need one. *PICODE is set to the insn_code to use if we do
314 need a secondary reload. */
317 push_secondary_reload (int in_p
, rtx x
, int opnum
, int optional
,
318 enum reg_class reload_class
,
319 enum machine_mode reload_mode
, enum reload_type type
,
320 enum insn_code
*picode
, secondary_reload_info
*prev_sri
)
322 enum reg_class
class = NO_REGS
;
323 enum reg_class scratch_class
;
324 enum machine_mode mode
= reload_mode
;
325 enum insn_code icode
= CODE_FOR_nothing
;
326 enum insn_code t_icode
= CODE_FOR_nothing
;
327 enum reload_type secondary_type
;
328 int s_reload
, t_reload
= -1;
329 const char *scratch_constraint
;
331 secondary_reload_info sri
;
333 if (type
== RELOAD_FOR_INPUT_ADDRESS
334 || type
== RELOAD_FOR_OUTPUT_ADDRESS
335 || type
== RELOAD_FOR_INPADDR_ADDRESS
336 || type
== RELOAD_FOR_OUTADDR_ADDRESS
)
337 secondary_type
= type
;
339 secondary_type
= in_p
? RELOAD_FOR_INPUT_ADDRESS
: RELOAD_FOR_OUTPUT_ADDRESS
;
341 *picode
= CODE_FOR_nothing
;
343 /* If X is a paradoxical SUBREG, use the inner value to determine both the
344 mode and object being reloaded. */
345 if (GET_CODE (x
) == SUBREG
346 && (GET_MODE_SIZE (GET_MODE (x
))
347 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))))
350 reload_mode
= GET_MODE (x
);
353 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
354 is still a pseudo-register by now, it *must* have an equivalent MEM
355 but we don't want to assume that), use that equivalent when seeing if
356 a secondary reload is needed since whether or not a reload is needed
357 might be sensitive to the form of the MEM. */
359 if (REG_P (x
) && REGNO (x
) >= FIRST_PSEUDO_REGISTER
360 && reg_equiv_mem
[REGNO (x
)] != 0)
361 x
= reg_equiv_mem
[REGNO (x
)];
363 sri
.icode
= CODE_FOR_nothing
;
364 sri
.prev_sri
= prev_sri
;
365 class = targetm
.secondary_reload (in_p
, x
, reload_class
, reload_mode
, &sri
);
368 /* If we don't need any secondary registers, done. */
369 if (class == NO_REGS
&& icode
== CODE_FOR_nothing
)
372 if (class != NO_REGS
)
373 t_reload
= push_secondary_reload (in_p
, x
, opnum
, optional
, class,
374 reload_mode
, type
, &t_icode
, &sri
);
376 /* If we will be using an insn, the secondary reload is for a
379 if (icode
!= CODE_FOR_nothing
)
381 /* If IN_P is nonzero, the reload register will be the output in
382 operand 0. If IN_P is zero, the reload register will be the input
383 in operand 1. Outputs should have an initial "=", which we must
386 /* ??? It would be useful to be able to handle only two, or more than
387 three, operands, but for now we can only handle the case of having
388 exactly three: output, input and one temp/scratch. */
389 gcc_assert (insn_data
[(int) icode
].n_operands
== 3);
391 /* ??? We currently have no way to represent a reload that needs
392 an icode to reload from an intermediate tertiary reload register.
393 We should probably have a new field in struct reload to tag a
394 chain of scratch operand reloads onto. */
395 gcc_assert (class == NO_REGS
);
397 scratch_constraint
= insn_data
[(int) icode
].operand
[2].constraint
;
398 gcc_assert (*scratch_constraint
== '=');
399 scratch_constraint
++;
400 if (*scratch_constraint
== '&')
401 scratch_constraint
++;
402 letter
= *scratch_constraint
;
403 scratch_class
= (letter
== 'r' ? GENERAL_REGS
404 : REG_CLASS_FROM_CONSTRAINT ((unsigned char) letter
,
405 scratch_constraint
));
407 class = scratch_class
;
408 mode
= insn_data
[(int) icode
].operand
[2].mode
;
411 /* This case isn't valid, so fail. Reload is allowed to use the same
412 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
413 in the case of a secondary register, we actually need two different
414 registers for correct code. We fail here to prevent the possibility of
415 silently generating incorrect code later.
417 The convention is that secondary input reloads are valid only if the
418 secondary_class is different from class. If you have such a case, you
419 can not use secondary reloads, you must work around the problem some
422 Allow this when a reload_in/out pattern is being used. I.e. assume
423 that the generated code handles this case. */
425 gcc_assert (!in_p
|| class != reload_class
|| icode
!= CODE_FOR_nothing
426 || t_icode
!= CODE_FOR_nothing
);
428 /* See if we can reuse an existing secondary reload. */
429 for (s_reload
= 0; s_reload
< n_reloads
; s_reload
++)
430 if (rld
[s_reload
].secondary_p
431 && (reg_class_subset_p (class, rld
[s_reload
].class)
432 || reg_class_subset_p (rld
[s_reload
].class, class))
433 && ((in_p
&& rld
[s_reload
].inmode
== mode
)
434 || (! in_p
&& rld
[s_reload
].outmode
== mode
))
435 && ((in_p
&& rld
[s_reload
].secondary_in_reload
== t_reload
)
436 || (! in_p
&& rld
[s_reload
].secondary_out_reload
== t_reload
))
437 && ((in_p
&& rld
[s_reload
].secondary_in_icode
== t_icode
)
438 || (! in_p
&& rld
[s_reload
].secondary_out_icode
== t_icode
))
439 && (SMALL_REGISTER_CLASS_P (class) || SMALL_REGISTER_CLASSES
)
440 && MERGABLE_RELOADS (secondary_type
, rld
[s_reload
].when_needed
,
441 opnum
, rld
[s_reload
].opnum
))
444 rld
[s_reload
].inmode
= mode
;
446 rld
[s_reload
].outmode
= mode
;
448 if (reg_class_subset_p (class, rld
[s_reload
].class))
449 rld
[s_reload
].class = class;
451 rld
[s_reload
].opnum
= MIN (rld
[s_reload
].opnum
, opnum
);
452 rld
[s_reload
].optional
&= optional
;
453 rld
[s_reload
].secondary_p
= 1;
454 if (MERGE_TO_OTHER (secondary_type
, rld
[s_reload
].when_needed
,
455 opnum
, rld
[s_reload
].opnum
))
456 rld
[s_reload
].when_needed
= RELOAD_OTHER
;
461 if (s_reload
== n_reloads
)
463 #ifdef SECONDARY_MEMORY_NEEDED
464 /* If we need a memory location to copy between the two reload regs,
465 set it up now. Note that we do the input case before making
466 the reload and the output case after. This is due to the
467 way reloads are output. */
469 if (in_p
&& icode
== CODE_FOR_nothing
470 && SECONDARY_MEMORY_NEEDED (class, reload_class
, mode
))
472 get_secondary_mem (x
, reload_mode
, opnum
, type
);
474 /* We may have just added new reloads. Make sure we add
475 the new reload at the end. */
476 s_reload
= n_reloads
;
480 /* We need to make a new secondary reload for this register class. */
481 rld
[s_reload
].in
= rld
[s_reload
].out
= 0;
482 rld
[s_reload
].class = class;
484 rld
[s_reload
].inmode
= in_p
? mode
: VOIDmode
;
485 rld
[s_reload
].outmode
= ! in_p
? mode
: VOIDmode
;
486 rld
[s_reload
].reg_rtx
= 0;
487 rld
[s_reload
].optional
= optional
;
488 rld
[s_reload
].inc
= 0;
489 /* Maybe we could combine these, but it seems too tricky. */
490 rld
[s_reload
].nocombine
= 1;
491 rld
[s_reload
].in_reg
= 0;
492 rld
[s_reload
].out_reg
= 0;
493 rld
[s_reload
].opnum
= opnum
;
494 rld
[s_reload
].when_needed
= secondary_type
;
495 rld
[s_reload
].secondary_in_reload
= in_p
? t_reload
: -1;
496 rld
[s_reload
].secondary_out_reload
= ! in_p
? t_reload
: -1;
497 rld
[s_reload
].secondary_in_icode
= in_p
? t_icode
: CODE_FOR_nothing
;
498 rld
[s_reload
].secondary_out_icode
499 = ! in_p
? t_icode
: CODE_FOR_nothing
;
500 rld
[s_reload
].secondary_p
= 1;
504 #ifdef SECONDARY_MEMORY_NEEDED
505 if (! in_p
&& icode
== CODE_FOR_nothing
506 && SECONDARY_MEMORY_NEEDED (reload_class
, class, mode
))
507 get_secondary_mem (x
, mode
, opnum
, type
);
515 /* If a secondary reload is needed, return its class. If both an intermediate
516 register and a scratch register is needed, we return the class of the
517 intermediate register. */
519 secondary_reload_class (bool in_p
, enum reg_class
class,
520 enum machine_mode mode
, rtx x
)
522 enum insn_code icode
;
523 secondary_reload_info sri
;
525 sri
.icode
= CODE_FOR_nothing
;
527 class = targetm
.secondary_reload (in_p
, x
, class, mode
, &sri
);
530 /* If there are no secondary reloads at all, we return NO_REGS.
531 If an intermediate register is needed, we return its class. */
532 if (icode
== CODE_FOR_nothing
|| class != NO_REGS
)
535 /* No intermediate register is needed, but we have a special reload
536 pattern, which we assume for now needs a scratch register. */
537 return scratch_reload_class (icode
);
540 /* ICODE is the insn_code of a reload pattern. Check that it has exactly
541 three operands, verify that operand 2 is an output operand, and return
543 ??? We'd like to be able to handle any pattern with at least 2 operands,
544 for zero or more scratch registers, but that needs more infrastructure. */
546 scratch_reload_class (enum insn_code icode
)
548 const char *scratch_constraint
;
550 enum reg_class
class;
552 gcc_assert (insn_data
[(int) icode
].n_operands
== 3);
553 scratch_constraint
= insn_data
[(int) icode
].operand
[2].constraint
;
554 gcc_assert (*scratch_constraint
== '=');
555 scratch_constraint
++;
556 if (*scratch_constraint
== '&')
557 scratch_constraint
++;
558 scratch_letter
= *scratch_constraint
;
559 if (scratch_letter
== 'r')
561 class = REG_CLASS_FROM_CONSTRAINT ((unsigned char) scratch_letter
,
563 gcc_assert (class != NO_REGS
);
567 #ifdef SECONDARY_MEMORY_NEEDED
569 /* Return a memory location that will be used to copy X in mode MODE.
570 If we haven't already made a location for this mode in this insn,
571 call find_reloads_address on the location being returned. */
574 get_secondary_mem (rtx x ATTRIBUTE_UNUSED
, enum machine_mode mode
,
575 int opnum
, enum reload_type type
)
580 /* By default, if MODE is narrower than a word, widen it to a word.
581 This is required because most machines that require these memory
582 locations do not support short load and stores from all registers
583 (e.g., FP registers). */
585 #ifdef SECONDARY_MEMORY_NEEDED_MODE
586 mode
= SECONDARY_MEMORY_NEEDED_MODE (mode
);
588 if (GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
&& INTEGRAL_MODE_P (mode
))
589 mode
= mode_for_size (BITS_PER_WORD
, GET_MODE_CLASS (mode
), 0);
592 /* If we already have made a MEM for this operand in MODE, return it. */
593 if (secondary_memlocs_elim
[(int) mode
][opnum
] != 0)
594 return secondary_memlocs_elim
[(int) mode
][opnum
];
596 /* If this is the first time we've tried to get a MEM for this mode,
597 allocate a new one. `something_changed' in reload will get set
598 by noticing that the frame size has changed. */
600 if (secondary_memlocs
[(int) mode
] == 0)
602 #ifdef SECONDARY_MEMORY_NEEDED_RTX
603 secondary_memlocs
[(int) mode
] = SECONDARY_MEMORY_NEEDED_RTX (mode
);
605 secondary_memlocs
[(int) mode
]
606 = assign_stack_local (mode
, GET_MODE_SIZE (mode
), 0);
610 /* Get a version of the address doing any eliminations needed. If that
611 didn't give us a new MEM, make a new one if it isn't valid. */
613 loc
= eliminate_regs (secondary_memlocs
[(int) mode
], VOIDmode
, NULL_RTX
);
614 mem_valid
= strict_memory_address_p (mode
, XEXP (loc
, 0));
616 if (! mem_valid
&& loc
== secondary_memlocs
[(int) mode
])
617 loc
= copy_rtx (loc
);
619 /* The only time the call below will do anything is if the stack
620 offset is too large. In that case IND_LEVELS doesn't matter, so we
621 can just pass a zero. Adjust the type to be the address of the
622 corresponding object. If the address was valid, save the eliminated
623 address. If it wasn't valid, we need to make a reload each time, so
628 type
= (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
629 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
632 find_reloads_address (mode
, &loc
, XEXP (loc
, 0), &XEXP (loc
, 0),
636 secondary_memlocs_elim
[(int) mode
][opnum
] = loc
;
637 if (secondary_memlocs_elim_used
<= (int)mode
)
638 secondary_memlocs_elim_used
= (int)mode
+ 1;
642 /* Clear any secondary memory locations we've made. */
645 clear_secondary_mem (void)
647 memset (secondary_memlocs
, 0, sizeof secondary_memlocs
);
649 #endif /* SECONDARY_MEMORY_NEEDED */
652 /* Find the largest class which has at least one register valid in
653 mode INNER, and which for every such register, that register number
654 plus N is also valid in OUTER (if in range) and is cheap to move
655 into REGNO. Such a class must exist. */
657 static enum reg_class
658 find_valid_class (enum machine_mode outer ATTRIBUTE_UNUSED
,
659 enum machine_mode inner ATTRIBUTE_UNUSED
, int n
,
660 unsigned int dest_regno ATTRIBUTE_UNUSED
)
665 enum reg_class best_class
= NO_REGS
;
666 enum reg_class dest_class ATTRIBUTE_UNUSED
= REGNO_REG_CLASS (dest_regno
);
667 unsigned int best_size
= 0;
670 for (class = 1; class < N_REG_CLASSES
; class++)
674 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
- n
&& ! bad
; regno
++)
675 if (TEST_HARD_REG_BIT (reg_class_contents
[class], regno
))
677 if (HARD_REGNO_MODE_OK (regno
, inner
))
680 if (! TEST_HARD_REG_BIT (reg_class_contents
[class], regno
+ n
)
681 || ! HARD_REGNO_MODE_OK (regno
+ n
, outer
))
688 cost
= REGISTER_MOVE_COST (outer
, class, dest_class
);
690 if ((reg_class_size
[class] > best_size
691 && (best_cost
< 0 || best_cost
>= cost
))
695 best_size
= reg_class_size
[class];
696 best_cost
= REGISTER_MOVE_COST (outer
, class, dest_class
);
700 gcc_assert (best_size
!= 0);
705 /* Return the number of a previously made reload that can be combined with
706 a new one, or n_reloads if none of the existing reloads can be used.
707 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
708 push_reload, they determine the kind of the new reload that we try to
709 combine. P_IN points to the corresponding value of IN, which can be
710 modified by this function.
711 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
714 find_reusable_reload (rtx
*p_in
, rtx out
, enum reg_class
class,
715 enum reload_type type
, int opnum
, int dont_share
)
719 /* We can't merge two reloads if the output of either one is
722 if (earlyclobber_operand_p (out
))
725 /* We can use an existing reload if the class is right
726 and at least one of IN and OUT is a match
727 and the other is at worst neutral.
728 (A zero compared against anything is neutral.)
730 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
731 for the same thing since that can cause us to need more reload registers
732 than we otherwise would. */
734 for (i
= 0; i
< n_reloads
; i
++)
735 if ((reg_class_subset_p (class, rld
[i
].class)
736 || reg_class_subset_p (rld
[i
].class, class))
737 /* If the existing reload has a register, it must fit our class. */
738 && (rld
[i
].reg_rtx
== 0
739 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
740 true_regnum (rld
[i
].reg_rtx
)))
741 && ((in
!= 0 && MATCHES (rld
[i
].in
, in
) && ! dont_share
742 && (out
== 0 || rld
[i
].out
== 0 || MATCHES (rld
[i
].out
, out
)))
743 || (out
!= 0 && MATCHES (rld
[i
].out
, out
)
744 && (in
== 0 || rld
[i
].in
== 0 || MATCHES (rld
[i
].in
, in
))))
745 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
746 && (SMALL_REGISTER_CLASS_P (class) || SMALL_REGISTER_CLASSES
)
747 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
, opnum
, rld
[i
].opnum
))
750 /* Reloading a plain reg for input can match a reload to postincrement
751 that reg, since the postincrement's value is the right value.
752 Likewise, it can match a preincrement reload, since we regard
753 the preincrementation as happening before any ref in this insn
755 for (i
= 0; i
< n_reloads
; i
++)
756 if ((reg_class_subset_p (class, rld
[i
].class)
757 || reg_class_subset_p (rld
[i
].class, class))
758 /* If the existing reload has a register, it must fit our
760 && (rld
[i
].reg_rtx
== 0
761 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
762 true_regnum (rld
[i
].reg_rtx
)))
763 && out
== 0 && rld
[i
].out
== 0 && rld
[i
].in
!= 0
765 && GET_RTX_CLASS (GET_CODE (rld
[i
].in
)) == RTX_AUTOINC
766 && MATCHES (XEXP (rld
[i
].in
, 0), in
))
767 || (REG_P (rld
[i
].in
)
768 && GET_RTX_CLASS (GET_CODE (in
)) == RTX_AUTOINC
769 && MATCHES (XEXP (in
, 0), rld
[i
].in
)))
770 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
771 && (SMALL_REGISTER_CLASS_P (class) || SMALL_REGISTER_CLASSES
)
772 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
,
773 opnum
, rld
[i
].opnum
))
775 /* Make sure reload_in ultimately has the increment,
776 not the plain register. */
784 /* Return nonzero if X is a SUBREG which will require reloading of its
785 SUBREG_REG expression. */
788 reload_inner_reg_of_subreg (rtx x
, enum machine_mode mode
, int output
)
792 /* Only SUBREGs are problematical. */
793 if (GET_CODE (x
) != SUBREG
)
796 inner
= SUBREG_REG (x
);
798 /* If INNER is a constant or PLUS, then INNER must be reloaded. */
799 if (CONSTANT_P (inner
) || GET_CODE (inner
) == PLUS
)
802 /* If INNER is not a hard register, then INNER will not need to
805 || REGNO (inner
) >= FIRST_PSEUDO_REGISTER
)
808 /* If INNER is not ok for MODE, then INNER will need reloading. */
809 if (! HARD_REGNO_MODE_OK (subreg_regno (x
), mode
))
812 /* If the outer part is a word or smaller, INNER larger than a
813 word and the number of regs for INNER is not the same as the
814 number of words in INNER, then INNER will need reloading. */
815 return (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
817 && GET_MODE_SIZE (GET_MODE (inner
)) > UNITS_PER_WORD
818 && ((GET_MODE_SIZE (GET_MODE (inner
)) / UNITS_PER_WORD
)
819 != (int) hard_regno_nregs
[REGNO (inner
)][GET_MODE (inner
)]));
822 /* Return nonzero if IN can be reloaded into REGNO with mode MODE without
823 requiring an extra reload register. The caller has already found that
824 IN contains some reference to REGNO, so check that we can produce the
825 new value in a single step. E.g. if we have
826 (set (reg r13) (plus (reg r13) (const int 1))), and there is an
827 instruction that adds one to a register, this should succeed.
828 However, if we have something like
829 (set (reg r13) (plus (reg r13) (const int 999))), and the constant 999
830 needs to be loaded into a register first, we need a separate reload
832 Such PLUS reloads are generated by find_reload_address_part.
833 The out-of-range PLUS expressions are usually introduced in the instruction
834 patterns by register elimination and substituting pseudos without a home
835 by their function-invariant equivalences. */
837 can_reload_into (rtx in
, int regno
, enum machine_mode mode
)
841 struct recog_data save_recog_data
;
843 /* For matching constraints, we often get notional input reloads where
844 we want to use the original register as the reload register. I.e.
845 technically this is a non-optional input-output reload, but IN is
846 already a valid register, and has been chosen as the reload register.
847 Speed this up, since it trivially works. */
851 /* To test MEMs properly, we'd have to take into account all the reloads
852 that are already scheduled, which can become quite complicated.
853 And since we've already handled address reloads for this MEM, it
854 should always succeed anyway. */
858 /* If we can make a simple SET insn that does the job, everything should
860 dst
= gen_rtx_REG (mode
, regno
);
861 test_insn
= make_insn_raw (gen_rtx_SET (VOIDmode
, dst
, in
));
862 save_recog_data
= recog_data
;
863 if (recog_memoized (test_insn
) >= 0)
865 extract_insn (test_insn
);
866 r
= constrain_operands (1);
868 recog_data
= save_recog_data
;
872 /* Record one reload that needs to be performed.
873 IN is an rtx saying where the data are to be found before this instruction.
874 OUT says where they must be stored after the instruction.
875 (IN is zero for data not read, and OUT is zero for data not written.)
876 INLOC and OUTLOC point to the places in the instructions where
877 IN and OUT were found.
878 If IN and OUT are both nonzero, it means the same register must be used
879 to reload both IN and OUT.
881 CLASS is a register class required for the reloaded data.
882 INMODE is the machine mode that the instruction requires
883 for the reg that replaces IN and OUTMODE is likewise for OUT.
885 If IN is zero, then OUT's location and mode should be passed as
888 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
890 OPTIONAL nonzero means this reload does not need to be performed:
891 it can be discarded if that is more convenient.
893 OPNUM and TYPE say what the purpose of this reload is.
895 The return value is the reload-number for this reload.
897 If both IN and OUT are nonzero, in some rare cases we might
898 want to make two separate reloads. (Actually we never do this now.)
899 Therefore, the reload-number for OUT is stored in
900 output_reloadnum when we return; the return value applies to IN.
901 Usually (presently always), when IN and OUT are nonzero,
902 the two reload-numbers are equal, but the caller should be careful to
906 push_reload (rtx in
, rtx out
, rtx
*inloc
, rtx
*outloc
,
907 enum reg_class
class, enum machine_mode inmode
,
908 enum machine_mode outmode
, int strict_low
, int optional
,
909 int opnum
, enum reload_type type
)
913 int dont_remove_subreg
= 0;
914 rtx
*in_subreg_loc
= 0, *out_subreg_loc
= 0;
915 int secondary_in_reload
= -1, secondary_out_reload
= -1;
916 enum insn_code secondary_in_icode
= CODE_FOR_nothing
;
917 enum insn_code secondary_out_icode
= CODE_FOR_nothing
;
919 /* INMODE and/or OUTMODE could be VOIDmode if no mode
920 has been specified for the operand. In that case,
921 use the operand's mode as the mode to reload. */
922 if (inmode
== VOIDmode
&& in
!= 0)
923 inmode
= GET_MODE (in
);
924 if (outmode
== VOIDmode
&& out
!= 0)
925 outmode
= GET_MODE (out
);
927 /* If find_reloads and friends until now missed to replace a pseudo
928 with a constant of reg_equiv_constant something went wrong
930 Note that it can't simply be done here if we missed it earlier
931 since the constant might need to be pushed into the literal pool
932 and the resulting memref would probably need further
934 if (in
!= 0 && REG_P (in
))
936 int regno
= REGNO (in
);
938 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
939 || reg_renumber
[regno
] >= 0
940 || reg_equiv_constant
[regno
] == NULL_RTX
);
943 /* reg_equiv_constant only contains constants which are obviously
944 not appropriate as destination. So if we would need to replace
945 the destination pseudo with a constant we are in real
947 if (out
!= 0 && REG_P (out
))
949 int regno
= REGNO (out
);
951 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
952 || reg_renumber
[regno
] >= 0
953 || reg_equiv_constant
[regno
] == NULL_RTX
);
956 /* If we have a read-write operand with an address side-effect,
957 change either IN or OUT so the side-effect happens only once. */
958 if (in
!= 0 && out
!= 0 && MEM_P (in
) && rtx_equal_p (in
, out
))
959 switch (GET_CODE (XEXP (in
, 0)))
961 case POST_INC
: case POST_DEC
: case POST_MODIFY
:
962 in
= replace_equiv_address_nv (in
, XEXP (XEXP (in
, 0), 0));
965 case PRE_INC
: case PRE_DEC
: case PRE_MODIFY
:
966 out
= replace_equiv_address_nv (out
, XEXP (XEXP (out
, 0), 0));
973 /* If we are reloading a (SUBREG constant ...), really reload just the
974 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
975 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
976 a pseudo and hence will become a MEM) with M1 wider than M2 and the
977 register is a pseudo, also reload the inside expression.
978 For machines that extend byte loads, do this for any SUBREG of a pseudo
979 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
980 M2 is an integral mode that gets extended when loaded.
981 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
982 either M1 is not valid for R or M2 is wider than a word but we only
983 need one word to store an M2-sized quantity in R.
984 (However, if OUT is nonzero, we need to reload the reg *and*
985 the subreg, so do nothing here, and let following statement handle it.)
987 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
988 we can't handle it here because CONST_INT does not indicate a mode.
990 Similarly, we must reload the inside expression if we have a
991 STRICT_LOW_PART (presumably, in == out in the cas).
993 Also reload the inner expression if it does not require a secondary
994 reload but the SUBREG does.
996 Finally, reload the inner expression if it is a register that is in
997 the class whose registers cannot be referenced in a different size
998 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
999 cannot reload just the inside since we might end up with the wrong
1000 register class. But if it is inside a STRICT_LOW_PART, we have
1001 no choice, so we hope we do get the right register class there. */
1003 if (in
!= 0 && GET_CODE (in
) == SUBREG
1004 && (subreg_lowpart_p (in
) || strict_low
)
1005 #ifdef CANNOT_CHANGE_MODE_CLASS
1006 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (in
)), inmode
, class)
1008 && (CONSTANT_P (SUBREG_REG (in
))
1009 || GET_CODE (SUBREG_REG (in
)) == PLUS
1011 || (((REG_P (SUBREG_REG (in
))
1012 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
)
1013 || MEM_P (SUBREG_REG (in
)))
1014 && ((GET_MODE_SIZE (inmode
)
1015 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
1016 #ifdef LOAD_EXTEND_OP
1017 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
1018 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1020 && (GET_MODE_SIZE (inmode
)
1021 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
1022 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in
)))
1023 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in
))) != UNKNOWN
)
1025 #ifdef WORD_REGISTER_OPERATIONS
1026 || ((GET_MODE_SIZE (inmode
)
1027 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
1028 && ((GET_MODE_SIZE (inmode
) - 1) / UNITS_PER_WORD
==
1029 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))) - 1)
1033 || (REG_P (SUBREG_REG (in
))
1034 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1035 /* The case where out is nonzero
1036 is handled differently in the following statement. */
1037 && (out
== 0 || subreg_lowpart_p (in
))
1038 && ((GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
1039 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1041 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1043 != (int) hard_regno_nregs
[REGNO (SUBREG_REG (in
))]
1044 [GET_MODE (SUBREG_REG (in
))]))
1045 || ! HARD_REGNO_MODE_OK (subreg_regno (in
), inmode
)))
1046 || (secondary_reload_class (1, class, inmode
, in
) != NO_REGS
1047 && (secondary_reload_class (1, class, GET_MODE (SUBREG_REG (in
)),
1050 #ifdef CANNOT_CHANGE_MODE_CLASS
1051 || (REG_P (SUBREG_REG (in
))
1052 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1053 && REG_CANNOT_CHANGE_MODE_P
1054 (REGNO (SUBREG_REG (in
)), GET_MODE (SUBREG_REG (in
)), inmode
))
1058 in_subreg_loc
= inloc
;
1059 inloc
= &SUBREG_REG (in
);
1061 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1063 /* This is supposed to happen only for paradoxical subregs made by
1064 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1065 gcc_assert (GET_MODE_SIZE (GET_MODE (in
)) <= GET_MODE_SIZE (inmode
));
1067 inmode
= GET_MODE (in
);
1070 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1071 either M1 is not valid for R or M2 is wider than a word but we only
1072 need one word to store an M2-sized quantity in R.
1074 However, we must reload the inner reg *as well as* the subreg in
1077 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1078 code above. This can happen if SUBREG_BYTE != 0. */
1080 if (in
!= 0 && reload_inner_reg_of_subreg (in
, inmode
, 0))
1082 enum reg_class in_class
= class;
1084 if (REG_P (SUBREG_REG (in
)))
1086 = find_valid_class (inmode
, GET_MODE (SUBREG_REG (in
)),
1087 subreg_regno_offset (REGNO (SUBREG_REG (in
)),
1088 GET_MODE (SUBREG_REG (in
)),
1091 REGNO (SUBREG_REG (in
)));
1093 /* This relies on the fact that emit_reload_insns outputs the
1094 instructions for input reloads of type RELOAD_OTHER in the same
1095 order as the reloads. Thus if the outer reload is also of type
1096 RELOAD_OTHER, we are guaranteed that this inner reload will be
1097 output before the outer reload. */
1098 push_reload (SUBREG_REG (in
), NULL_RTX
, &SUBREG_REG (in
), (rtx
*) 0,
1099 in_class
, VOIDmode
, VOIDmode
, 0, 0, opnum
, type
);
1100 dont_remove_subreg
= 1;
1103 /* Similarly for paradoxical and problematical SUBREGs on the output.
1104 Note that there is no reason we need worry about the previous value
1105 of SUBREG_REG (out); even if wider than out,
1106 storing in a subreg is entitled to clobber it all
1107 (except in the case of STRICT_LOW_PART,
1108 and in that case the constraint should label it input-output.) */
1109 if (out
!= 0 && GET_CODE (out
) == SUBREG
1110 && (subreg_lowpart_p (out
) || strict_low
)
1111 #ifdef CANNOT_CHANGE_MODE_CLASS
1112 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (out
)), outmode
, class)
1114 && (CONSTANT_P (SUBREG_REG (out
))
1116 || (((REG_P (SUBREG_REG (out
))
1117 && REGNO (SUBREG_REG (out
)) >= FIRST_PSEUDO_REGISTER
)
1118 || MEM_P (SUBREG_REG (out
)))
1119 && ((GET_MODE_SIZE (outmode
)
1120 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1121 #ifdef WORD_REGISTER_OPERATIONS
1122 || ((GET_MODE_SIZE (outmode
)
1123 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1124 && ((GET_MODE_SIZE (outmode
) - 1) / UNITS_PER_WORD
==
1125 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))) - 1)
1129 || (REG_P (SUBREG_REG (out
))
1130 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1131 && ((GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
1132 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1134 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1136 != (int) hard_regno_nregs
[REGNO (SUBREG_REG (out
))]
1137 [GET_MODE (SUBREG_REG (out
))]))
1138 || ! HARD_REGNO_MODE_OK (subreg_regno (out
), outmode
)))
1139 || (secondary_reload_class (0, class, outmode
, out
) != NO_REGS
1140 && (secondary_reload_class (0, class, GET_MODE (SUBREG_REG (out
)),
1143 #ifdef CANNOT_CHANGE_MODE_CLASS
1144 || (REG_P (SUBREG_REG (out
))
1145 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1146 && REG_CANNOT_CHANGE_MODE_P (REGNO (SUBREG_REG (out
)),
1147 GET_MODE (SUBREG_REG (out
)),
1152 out_subreg_loc
= outloc
;
1153 outloc
= &SUBREG_REG (out
);
1155 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1156 gcc_assert (!MEM_P (out
)
1157 || GET_MODE_SIZE (GET_MODE (out
))
1158 <= GET_MODE_SIZE (outmode
));
1160 outmode
= GET_MODE (out
);
1163 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1164 either M1 is not valid for R or M2 is wider than a word but we only
1165 need one word to store an M2-sized quantity in R.
1167 However, we must reload the inner reg *as well as* the subreg in
1168 that case. In this case, the inner reg is an in-out reload. */
1170 if (out
!= 0 && reload_inner_reg_of_subreg (out
, outmode
, 1))
1172 /* This relies on the fact that emit_reload_insns outputs the
1173 instructions for output reloads of type RELOAD_OTHER in reverse
1174 order of the reloads. Thus if the outer reload is also of type
1175 RELOAD_OTHER, we are guaranteed that this inner reload will be
1176 output after the outer reload. */
1177 dont_remove_subreg
= 1;
1178 push_reload (SUBREG_REG (out
), SUBREG_REG (out
), &SUBREG_REG (out
),
1180 find_valid_class (outmode
, GET_MODE (SUBREG_REG (out
)),
1181 subreg_regno_offset (REGNO (SUBREG_REG (out
)),
1182 GET_MODE (SUBREG_REG (out
)),
1185 REGNO (SUBREG_REG (out
))),
1186 VOIDmode
, VOIDmode
, 0, 0,
1187 opnum
, RELOAD_OTHER
);
1190 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1191 if (in
!= 0 && out
!= 0 && MEM_P (out
)
1192 && (REG_P (in
) || MEM_P (in
) || GET_CODE (in
) == PLUS
)
1193 && reg_overlap_mentioned_for_reload_p (in
, XEXP (out
, 0)))
1196 /* If IN is a SUBREG of a hard register, make a new REG. This
1197 simplifies some of the cases below. */
1199 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& REG_P (SUBREG_REG (in
))
1200 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1201 && ! dont_remove_subreg
)
1202 in
= gen_rtx_REG (GET_MODE (in
), subreg_regno (in
));
1204 /* Similarly for OUT. */
1205 if (out
!= 0 && GET_CODE (out
) == SUBREG
1206 && REG_P (SUBREG_REG (out
))
1207 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1208 && ! dont_remove_subreg
)
1209 out
= gen_rtx_REG (GET_MODE (out
), subreg_regno (out
));
1211 /* Narrow down the class of register wanted if that is
1212 desirable on this machine for efficiency. */
1214 enum reg_class preferred_class
= class;
1217 preferred_class
= PREFERRED_RELOAD_CLASS (in
, class);
1219 /* Output reloads may need analogous treatment, different in detail. */
1220 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1222 preferred_class
= PREFERRED_OUTPUT_RELOAD_CLASS (out
, preferred_class
);
1225 /* Discard what the target said if we cannot do it. */
1226 if (preferred_class
!= NO_REGS
1227 || (optional
&& type
== RELOAD_FOR_OUTPUT
))
1228 class = preferred_class
;
1231 /* Make sure we use a class that can handle the actual pseudo
1232 inside any subreg. For example, on the 386, QImode regs
1233 can appear within SImode subregs. Although GENERAL_REGS
1234 can handle SImode, QImode needs a smaller class. */
1235 #ifdef LIMIT_RELOAD_CLASS
1237 class = LIMIT_RELOAD_CLASS (inmode
, class);
1238 else if (in
!= 0 && GET_CODE (in
) == SUBREG
)
1239 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in
)), class);
1242 class = LIMIT_RELOAD_CLASS (outmode
, class);
1243 if (out
!= 0 && GET_CODE (out
) == SUBREG
)
1244 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out
)), class);
1247 /* Verify that this class is at least possible for the mode that
1249 if (this_insn_is_asm
)
1251 enum machine_mode mode
;
1252 if (GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (outmode
))
1256 if (mode
== VOIDmode
)
1258 error_for_asm (this_insn
, "cannot reload integer constant "
1259 "operand in %<asm%>");
1264 outmode
= word_mode
;
1266 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1267 if (HARD_REGNO_MODE_OK (i
, mode
)
1268 && in_hard_reg_set_p (reg_class_contents
[(int) class], mode
, i
))
1270 if (i
== FIRST_PSEUDO_REGISTER
)
1272 error_for_asm (this_insn
, "impossible register constraint "
1274 /* Avoid further trouble with this insn. */
1275 PATTERN (this_insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
1276 /* We used to continue here setting class to ALL_REGS, but it triggers
1277 sanity check on i386 for:
1278 void foo(long double d)
1282 Returning zero here ought to be safe as we take care in
1283 find_reloads to not process the reloads when instruction was
1290 /* Optional output reloads are always OK even if we have no register class,
1291 since the function of these reloads is only to have spill_reg_store etc.
1292 set, so that the storing insn can be deleted later. */
1293 gcc_assert (class != NO_REGS
1294 || (optional
!= 0 && type
== RELOAD_FOR_OUTPUT
));
1296 i
= find_reusable_reload (&in
, out
, class, type
, opnum
, dont_share
);
1300 /* See if we need a secondary reload register to move between CLASS
1301 and IN or CLASS and OUT. Get the icode and push any required reloads
1302 needed for each of them if so. */
1306 = push_secondary_reload (1, in
, opnum
, optional
, class, inmode
, type
,
1307 &secondary_in_icode
, NULL
);
1308 if (out
!= 0 && GET_CODE (out
) != SCRATCH
)
1309 secondary_out_reload
1310 = push_secondary_reload (0, out
, opnum
, optional
, class, outmode
,
1311 type
, &secondary_out_icode
, NULL
);
1313 /* We found no existing reload suitable for re-use.
1314 So add an additional reload. */
1316 #ifdef SECONDARY_MEMORY_NEEDED
1317 /* If a memory location is needed for the copy, make one. */
1320 || (GET_CODE (in
) == SUBREG
&& REG_P (SUBREG_REG (in
))))
1321 && reg_or_subregno (in
) < FIRST_PSEUDO_REGISTER
1322 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (reg_or_subregno (in
)),
1324 get_secondary_mem (in
, inmode
, opnum
, type
);
1330 rld
[i
].class = class;
1331 rld
[i
].inmode
= inmode
;
1332 rld
[i
].outmode
= outmode
;
1334 rld
[i
].optional
= optional
;
1336 rld
[i
].nocombine
= 0;
1337 rld
[i
].in_reg
= inloc
? *inloc
: 0;
1338 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1339 rld
[i
].opnum
= opnum
;
1340 rld
[i
].when_needed
= type
;
1341 rld
[i
].secondary_in_reload
= secondary_in_reload
;
1342 rld
[i
].secondary_out_reload
= secondary_out_reload
;
1343 rld
[i
].secondary_in_icode
= secondary_in_icode
;
1344 rld
[i
].secondary_out_icode
= secondary_out_icode
;
1345 rld
[i
].secondary_p
= 0;
1349 #ifdef SECONDARY_MEMORY_NEEDED
1352 || (GET_CODE (out
) == SUBREG
&& REG_P (SUBREG_REG (out
))))
1353 && reg_or_subregno (out
) < FIRST_PSEUDO_REGISTER
1354 && SECONDARY_MEMORY_NEEDED (class,
1355 REGNO_REG_CLASS (reg_or_subregno (out
)),
1357 get_secondary_mem (out
, outmode
, opnum
, type
);
1362 /* We are reusing an existing reload,
1363 but we may have additional information for it.
1364 For example, we may now have both IN and OUT
1365 while the old one may have just one of them. */
1367 /* The modes can be different. If they are, we want to reload in
1368 the larger mode, so that the value is valid for both modes. */
1369 if (inmode
!= VOIDmode
1370 && GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (rld
[i
].inmode
))
1371 rld
[i
].inmode
= inmode
;
1372 if (outmode
!= VOIDmode
1373 && GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (rld
[i
].outmode
))
1374 rld
[i
].outmode
= outmode
;
1377 rtx in_reg
= inloc
? *inloc
: 0;
1378 /* If we merge reloads for two distinct rtl expressions that
1379 are identical in content, there might be duplicate address
1380 reloads. Remove the extra set now, so that if we later find
1381 that we can inherit this reload, we can get rid of the
1382 address reloads altogether.
1384 Do not do this if both reloads are optional since the result
1385 would be an optional reload which could potentially leave
1386 unresolved address replacements.
1388 It is not sufficient to call transfer_replacements since
1389 choose_reload_regs will remove the replacements for address
1390 reloads of inherited reloads which results in the same
1392 if (rld
[i
].in
!= in
&& rtx_equal_p (in
, rld
[i
].in
)
1393 && ! (rld
[i
].optional
&& optional
))
1395 /* We must keep the address reload with the lower operand
1397 if (opnum
> rld
[i
].opnum
)
1399 remove_address_replacements (in
);
1401 in_reg
= rld
[i
].in_reg
;
1404 remove_address_replacements (rld
[i
].in
);
1407 rld
[i
].in_reg
= in_reg
;
1412 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1414 if (reg_class_subset_p (class, rld
[i
].class))
1415 rld
[i
].class = class;
1416 rld
[i
].optional
&= optional
;
1417 if (MERGE_TO_OTHER (type
, rld
[i
].when_needed
,
1418 opnum
, rld
[i
].opnum
))
1419 rld
[i
].when_needed
= RELOAD_OTHER
;
1420 rld
[i
].opnum
= MIN (rld
[i
].opnum
, opnum
);
1423 /* If the ostensible rtx being reloaded differs from the rtx found
1424 in the location to substitute, this reload is not safe to combine
1425 because we cannot reliably tell whether it appears in the insn. */
1427 if (in
!= 0 && in
!= *inloc
)
1428 rld
[i
].nocombine
= 1;
1431 /* This was replaced by changes in find_reloads_address_1 and the new
1432 function inc_for_reload, which go with a new meaning of reload_inc. */
1434 /* If this is an IN/OUT reload in an insn that sets the CC,
1435 it must be for an autoincrement. It doesn't work to store
1436 the incremented value after the insn because that would clobber the CC.
1437 So we must do the increment of the value reloaded from,
1438 increment it, store it back, then decrement again. */
1439 if (out
!= 0 && sets_cc0_p (PATTERN (this_insn
)))
1443 rld
[i
].inc
= find_inc_amount (PATTERN (this_insn
), in
);
1444 /* If we did not find a nonzero amount-to-increment-by,
1445 that contradicts the belief that IN is being incremented
1446 in an address in this insn. */
1447 gcc_assert (rld
[i
].inc
!= 0);
1451 /* If we will replace IN and OUT with the reload-reg,
1452 record where they are located so that substitution need
1453 not do a tree walk. */
1455 if (replace_reloads
)
1459 struct replacement
*r
= &replacements
[n_replacements
++];
1461 r
->subreg_loc
= in_subreg_loc
;
1465 if (outloc
!= 0 && outloc
!= inloc
)
1467 struct replacement
*r
= &replacements
[n_replacements
++];
1470 r
->subreg_loc
= out_subreg_loc
;
1475 /* If this reload is just being introduced and it has both
1476 an incoming quantity and an outgoing quantity that are
1477 supposed to be made to match, see if either one of the two
1478 can serve as the place to reload into.
1480 If one of them is acceptable, set rld[i].reg_rtx
1483 if (in
!= 0 && out
!= 0 && in
!= out
&& rld
[i
].reg_rtx
== 0)
1485 rld
[i
].reg_rtx
= find_dummy_reload (in
, out
, inloc
, outloc
,
1488 earlyclobber_operand_p (out
));
1490 /* If the outgoing register already contains the same value
1491 as the incoming one, we can dispense with loading it.
1492 The easiest way to tell the caller that is to give a phony
1493 value for the incoming operand (same as outgoing one). */
1494 if (rld
[i
].reg_rtx
== out
1495 && (REG_P (in
) || CONSTANT_P (in
))
1496 && 0 != find_equiv_reg (in
, this_insn
, 0, REGNO (out
),
1497 static_reload_reg_p
, i
, inmode
))
1501 /* If this is an input reload and the operand contains a register that
1502 dies in this insn and is used nowhere else, see if it is the right class
1503 to be used for this reload. Use it if so. (This occurs most commonly
1504 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1505 this if it is also an output reload that mentions the register unless
1506 the output is a SUBREG that clobbers an entire register.
1508 Note that the operand might be one of the spill regs, if it is a
1509 pseudo reg and we are in a block where spilling has not taken place.
1510 But if there is no spilling in this block, that is OK.
1511 An explicitly used hard reg cannot be a spill reg. */
1513 if (rld
[i
].reg_rtx
== 0 && in
!= 0 && hard_regs_live_known
)
1517 enum machine_mode rel_mode
= inmode
;
1519 if (out
&& GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (inmode
))
1522 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1523 if (REG_NOTE_KIND (note
) == REG_DEAD
1524 && REG_P (XEXP (note
, 0))
1525 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1526 && reg_mentioned_p (XEXP (note
, 0), in
)
1527 /* Check that a former pseudo is valid; see find_dummy_reload. */
1528 && (ORIGINAL_REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1529 || (!bitmap_bit_p (DF_LIVE_OUT (ENTRY_BLOCK_PTR
),
1530 ORIGINAL_REGNO (XEXP (note
, 0)))
1531 && hard_regno_nregs
[regno
][GET_MODE (XEXP (note
, 0))] == 1))
1532 && ! refers_to_regno_for_reload_p (regno
,
1533 end_hard_regno (rel_mode
,
1535 PATTERN (this_insn
), inloc
)
1536 /* If this is also an output reload, IN cannot be used as
1537 the reload register if it is set in this insn unless IN
1539 && (out
== 0 || in
== out
1540 || ! hard_reg_set_here_p (regno
,
1541 end_hard_regno (rel_mode
, regno
),
1542 PATTERN (this_insn
)))
1543 /* ??? Why is this code so different from the previous?
1544 Is there any simple coherent way to describe the two together?
1545 What's going on here. */
1547 || (GET_CODE (in
) == SUBREG
1548 && (((GET_MODE_SIZE (GET_MODE (in
)) + (UNITS_PER_WORD
- 1))
1550 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1551 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))))
1552 /* Make sure the operand fits in the reg that dies. */
1553 && (GET_MODE_SIZE (rel_mode
)
1554 <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0))))
1555 && HARD_REGNO_MODE_OK (regno
, inmode
)
1556 && HARD_REGNO_MODE_OK (regno
, outmode
))
1559 unsigned int nregs
= MAX (hard_regno_nregs
[regno
][inmode
],
1560 hard_regno_nregs
[regno
][outmode
]);
1562 for (offs
= 0; offs
< nregs
; offs
++)
1563 if (fixed_regs
[regno
+ offs
]
1564 || ! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1569 && (! (refers_to_regno_for_reload_p
1570 (regno
, end_hard_regno (inmode
, regno
), in
, (rtx
*) 0))
1571 || can_reload_into (in
, regno
, inmode
)))
1573 rld
[i
].reg_rtx
= gen_rtx_REG (rel_mode
, regno
);
1580 output_reloadnum
= i
;
1585 /* Record an additional place we must replace a value
1586 for which we have already recorded a reload.
1587 RELOADNUM is the value returned by push_reload
1588 when the reload was recorded.
1589 This is used in insn patterns that use match_dup. */
1592 push_replacement (rtx
*loc
, int reloadnum
, enum machine_mode mode
)
1594 if (replace_reloads
)
1596 struct replacement
*r
= &replacements
[n_replacements
++];
1597 r
->what
= reloadnum
;
1604 /* Duplicate any replacement we have recorded to apply at
1605 location ORIG_LOC to also be performed at DUP_LOC.
1606 This is used in insn patterns that use match_dup. */
1609 dup_replacements (rtx
*dup_loc
, rtx
*orig_loc
)
1611 int i
, n
= n_replacements
;
1613 for (i
= 0; i
< n
; i
++)
1615 struct replacement
*r
= &replacements
[i
];
1616 if (r
->where
== orig_loc
)
1617 push_replacement (dup_loc
, r
->what
, r
->mode
);
1621 /* Transfer all replacements that used to be in reload FROM to be in
1625 transfer_replacements (int to
, int from
)
1629 for (i
= 0; i
< n_replacements
; i
++)
1630 if (replacements
[i
].what
== from
)
1631 replacements
[i
].what
= to
;
1634 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1635 or a subpart of it. If we have any replacements registered for IN_RTX,
1636 cancel the reloads that were supposed to load them.
1637 Return nonzero if we canceled any reloads. */
1639 remove_address_replacements (rtx in_rtx
)
1642 char reload_flags
[MAX_RELOADS
];
1643 int something_changed
= 0;
1645 memset (reload_flags
, 0, sizeof reload_flags
);
1646 for (i
= 0, j
= 0; i
< n_replacements
; i
++)
1648 if (loc_mentioned_in_p (replacements
[i
].where
, in_rtx
))
1649 reload_flags
[replacements
[i
].what
] |= 1;
1652 replacements
[j
++] = replacements
[i
];
1653 reload_flags
[replacements
[i
].what
] |= 2;
1656 /* Note that the following store must be done before the recursive calls. */
1659 for (i
= n_reloads
- 1; i
>= 0; i
--)
1661 if (reload_flags
[i
] == 1)
1663 deallocate_reload_reg (i
);
1664 remove_address_replacements (rld
[i
].in
);
1666 something_changed
= 1;
1669 return something_changed
;
1672 /* If there is only one output reload, and it is not for an earlyclobber
1673 operand, try to combine it with a (logically unrelated) input reload
1674 to reduce the number of reload registers needed.
1676 This is safe if the input reload does not appear in
1677 the value being output-reloaded, because this implies
1678 it is not needed any more once the original insn completes.
1680 If that doesn't work, see we can use any of the registers that
1681 die in this insn as a reload register. We can if it is of the right
1682 class and does not appear in the value being output-reloaded. */
1685 combine_reloads (void)
1688 int output_reload
= -1;
1689 int secondary_out
= -1;
1692 /* Find the output reload; return unless there is exactly one
1693 and that one is mandatory. */
1695 for (i
= 0; i
< n_reloads
; i
++)
1696 if (rld
[i
].out
!= 0)
1698 if (output_reload
>= 0)
1703 if (output_reload
< 0 || rld
[output_reload
].optional
)
1706 /* An input-output reload isn't combinable. */
1708 if (rld
[output_reload
].in
!= 0)
1711 /* If this reload is for an earlyclobber operand, we can't do anything. */
1712 if (earlyclobber_operand_p (rld
[output_reload
].out
))
1715 /* If there is a reload for part of the address of this operand, we would
1716 need to change it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1717 its life to the point where doing this combine would not lower the
1718 number of spill registers needed. */
1719 for (i
= 0; i
< n_reloads
; i
++)
1720 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
1721 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
1722 && rld
[i
].opnum
== rld
[output_reload
].opnum
)
1725 /* Check each input reload; can we combine it? */
1727 for (i
= 0; i
< n_reloads
; i
++)
1728 if (rld
[i
].in
&& ! rld
[i
].optional
&& ! rld
[i
].nocombine
1729 /* Life span of this reload must not extend past main insn. */
1730 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
1731 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
1732 && rld
[i
].when_needed
!= RELOAD_OTHER
1733 && (CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].inmode
)
1734 == CLASS_MAX_NREGS (rld
[output_reload
].class,
1735 rld
[output_reload
].outmode
))
1737 && rld
[i
].reg_rtx
== 0
1738 #ifdef SECONDARY_MEMORY_NEEDED
1739 /* Don't combine two reloads with different secondary
1740 memory locations. */
1741 && (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
] == 0
1742 || secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] == 0
1743 || rtx_equal_p (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
],
1744 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
]))
1746 && (SMALL_REGISTER_CLASSES
1747 ? (rld
[i
].class == rld
[output_reload
].class)
1748 : (reg_class_subset_p (rld
[i
].class,
1749 rld
[output_reload
].class)
1750 || reg_class_subset_p (rld
[output_reload
].class,
1752 && (MATCHES (rld
[i
].in
, rld
[output_reload
].out
)
1753 /* Args reversed because the first arg seems to be
1754 the one that we imagine being modified
1755 while the second is the one that might be affected. */
1756 || (! reg_overlap_mentioned_for_reload_p (rld
[output_reload
].out
,
1758 /* However, if the input is a register that appears inside
1759 the output, then we also can't share.
1760 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1761 If the same reload reg is used for both reg 69 and the
1762 result to be stored in memory, then that result
1763 will clobber the address of the memory ref. */
1764 && ! (REG_P (rld
[i
].in
)
1765 && reg_overlap_mentioned_for_reload_p (rld
[i
].in
,
1766 rld
[output_reload
].out
))))
1767 && ! reload_inner_reg_of_subreg (rld
[i
].in
, rld
[i
].inmode
,
1768 rld
[i
].when_needed
!= RELOAD_FOR_INPUT
)
1769 && (reg_class_size
[(int) rld
[i
].class]
1770 || SMALL_REGISTER_CLASSES
)
1771 /* We will allow making things slightly worse by combining an
1772 input and an output, but no worse than that. */
1773 && (rld
[i
].when_needed
== RELOAD_FOR_INPUT
1774 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT
))
1778 /* We have found a reload to combine with! */
1779 rld
[i
].out
= rld
[output_reload
].out
;
1780 rld
[i
].out_reg
= rld
[output_reload
].out_reg
;
1781 rld
[i
].outmode
= rld
[output_reload
].outmode
;
1782 /* Mark the old output reload as inoperative. */
1783 rld
[output_reload
].out
= 0;
1784 /* The combined reload is needed for the entire insn. */
1785 rld
[i
].when_needed
= RELOAD_OTHER
;
1786 /* If the output reload had a secondary reload, copy it. */
1787 if (rld
[output_reload
].secondary_out_reload
!= -1)
1789 rld
[i
].secondary_out_reload
1790 = rld
[output_reload
].secondary_out_reload
;
1791 rld
[i
].secondary_out_icode
1792 = rld
[output_reload
].secondary_out_icode
;
1795 #ifdef SECONDARY_MEMORY_NEEDED
1796 /* Copy any secondary MEM. */
1797 if (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] != 0)
1798 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
]
1799 = secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
];
1801 /* If required, minimize the register class. */
1802 if (reg_class_subset_p (rld
[output_reload
].class,
1804 rld
[i
].class = rld
[output_reload
].class;
1806 /* Transfer all replacements from the old reload to the combined. */
1807 for (j
= 0; j
< n_replacements
; j
++)
1808 if (replacements
[j
].what
== output_reload
)
1809 replacements
[j
].what
= i
;
1814 /* If this insn has only one operand that is modified or written (assumed
1815 to be the first), it must be the one corresponding to this reload. It
1816 is safe to use anything that dies in this insn for that output provided
1817 that it does not occur in the output (we already know it isn't an
1818 earlyclobber. If this is an asm insn, give up. */
1820 if (INSN_CODE (this_insn
) == -1)
1823 for (i
= 1; i
< insn_data
[INSN_CODE (this_insn
)].n_operands
; i
++)
1824 if (insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '='
1825 || insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '+')
1828 /* See if some hard register that dies in this insn and is not used in
1829 the output is the right class. Only works if the register we pick
1830 up can fully hold our output reload. */
1831 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1832 if (REG_NOTE_KIND (note
) == REG_DEAD
1833 && REG_P (XEXP (note
, 0))
1834 && !reg_overlap_mentioned_for_reload_p (XEXP (note
, 0),
1835 rld
[output_reload
].out
)
1836 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1837 && HARD_REGNO_MODE_OK (regno
, rld
[output_reload
].outmode
)
1838 && TEST_HARD_REG_BIT (reg_class_contents
[(int) rld
[output_reload
].class],
1840 && (hard_regno_nregs
[regno
][rld
[output_reload
].outmode
]
1841 <= hard_regno_nregs
[regno
][GET_MODE (XEXP (note
, 0))])
1842 /* Ensure that a secondary or tertiary reload for this output
1843 won't want this register. */
1844 && ((secondary_out
= rld
[output_reload
].secondary_out_reload
) == -1
1845 || (!(TEST_HARD_REG_BIT
1846 (reg_class_contents
[(int) rld
[secondary_out
].class], regno
))
1847 && ((secondary_out
= rld
[secondary_out
].secondary_out_reload
) == -1
1848 || !(TEST_HARD_REG_BIT
1849 (reg_class_contents
[(int) rld
[secondary_out
].class],
1851 && !fixed_regs
[regno
]
1852 /* Check that a former pseudo is valid; see find_dummy_reload. */
1853 && (ORIGINAL_REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1854 || (!bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR
),
1855 ORIGINAL_REGNO (XEXP (note
, 0)))
1856 && hard_regno_nregs
[regno
][GET_MODE (XEXP (note
, 0))] == 1)))
1858 rld
[output_reload
].reg_rtx
1859 = gen_rtx_REG (rld
[output_reload
].outmode
, regno
);
1864 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1865 See if one of IN and OUT is a register that may be used;
1866 this is desirable since a spill-register won't be needed.
1867 If so, return the register rtx that proves acceptable.
1869 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1870 CLASS is the register class required for the reload.
1872 If FOR_REAL is >= 0, it is the number of the reload,
1873 and in some cases when it can be discovered that OUT doesn't need
1874 to be computed, clear out rld[FOR_REAL].out.
1876 If FOR_REAL is -1, this should not be done, because this call
1877 is just to see if a register can be found, not to find and install it.
1879 EARLYCLOBBER is nonzero if OUT is an earlyclobber operand. This
1880 puts an additional constraint on being able to use IN for OUT since
1881 IN must not appear elsewhere in the insn (it is assumed that IN itself
1882 is safe from the earlyclobber). */
1885 find_dummy_reload (rtx real_in
, rtx real_out
, rtx
*inloc
, rtx
*outloc
,
1886 enum machine_mode inmode
, enum machine_mode outmode
,
1887 enum reg_class
class, int for_real
, int earlyclobber
)
1895 /* If operands exceed a word, we can't use either of them
1896 unless they have the same size. */
1897 if (GET_MODE_SIZE (outmode
) != GET_MODE_SIZE (inmode
)
1898 && (GET_MODE_SIZE (outmode
) > UNITS_PER_WORD
1899 || GET_MODE_SIZE (inmode
) > UNITS_PER_WORD
))
1902 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1903 respectively refers to a hard register. */
1905 /* Find the inside of any subregs. */
1906 while (GET_CODE (out
) == SUBREG
)
1908 if (REG_P (SUBREG_REG (out
))
1909 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
)
1910 out_offset
+= subreg_regno_offset (REGNO (SUBREG_REG (out
)),
1911 GET_MODE (SUBREG_REG (out
)),
1914 out
= SUBREG_REG (out
);
1916 while (GET_CODE (in
) == SUBREG
)
1918 if (REG_P (SUBREG_REG (in
))
1919 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
)
1920 in_offset
+= subreg_regno_offset (REGNO (SUBREG_REG (in
)),
1921 GET_MODE (SUBREG_REG (in
)),
1924 in
= SUBREG_REG (in
);
1927 /* Narrow down the reg class, the same way push_reload will;
1928 otherwise we might find a dummy now, but push_reload won't. */
1930 enum reg_class preferred_class
= PREFERRED_RELOAD_CLASS (in
, class);
1931 if (preferred_class
!= NO_REGS
)
1932 class = preferred_class
;
1935 /* See if OUT will do. */
1937 && REGNO (out
) < FIRST_PSEUDO_REGISTER
)
1939 unsigned int regno
= REGNO (out
) + out_offset
;
1940 unsigned int nwords
= hard_regno_nregs
[regno
][outmode
];
1943 /* When we consider whether the insn uses OUT,
1944 ignore references within IN. They don't prevent us
1945 from copying IN into OUT, because those refs would
1946 move into the insn that reloads IN.
1948 However, we only ignore IN in its role as this reload.
1949 If the insn uses IN elsewhere and it contains OUT,
1950 that counts. We can't be sure it's the "same" operand
1951 so it might not go through this reload. */
1953 *inloc
= const0_rtx
;
1955 if (regno
< FIRST_PSEUDO_REGISTER
1956 && HARD_REGNO_MODE_OK (regno
, outmode
)
1957 && ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1958 PATTERN (this_insn
), outloc
))
1962 for (i
= 0; i
< nwords
; i
++)
1963 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1969 if (REG_P (real_out
))
1972 value
= gen_rtx_REG (outmode
, regno
);
1979 /* Consider using IN if OUT was not acceptable
1980 or if OUT dies in this insn (like the quotient in a divmod insn).
1981 We can't use IN unless it is dies in this insn,
1982 which means we must know accurately which hard regs are live.
1983 Also, the result can't go in IN if IN is used within OUT,
1984 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1985 if (hard_regs_live_known
1987 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1989 || find_reg_note (this_insn
, REG_UNUSED
, real_out
))
1990 && find_reg_note (this_insn
, REG_DEAD
, real_in
)
1991 && !fixed_regs
[REGNO (in
)]
1992 && HARD_REGNO_MODE_OK (REGNO (in
),
1993 /* The only case where out and real_out might
1994 have different modes is where real_out
1995 is a subreg, and in that case, out
1997 (GET_MODE (out
) != VOIDmode
1998 ? GET_MODE (out
) : outmode
))
1999 && (ORIGINAL_REGNO (in
) < FIRST_PSEUDO_REGISTER
2000 /* However only do this if we can be sure that this input
2001 operand doesn't correspond with an uninitialized pseudo.
2002 global can assign some hardreg to it that is the same as
2003 the one assigned to a different, also live pseudo (as it
2004 can ignore the conflict). We must never introduce writes
2005 to such hardregs, as they would clobber the other live
2006 pseudo. See PR 20973. */
2007 || (!bitmap_bit_p (DF_LIVE_OUT (ENTRY_BLOCK_PTR
),
2008 ORIGINAL_REGNO (in
))
2009 /* Similarly, only do this if we can be sure that the death
2010 note is still valid. global can assign some hardreg to
2011 the pseudo referenced in the note and simultaneously a
2012 subword of this hardreg to a different, also live pseudo,
2013 because only another subword of the hardreg is actually
2014 used in the insn. This cannot happen if the pseudo has
2015 been assigned exactly one hardreg. See PR 33732. */
2016 && hard_regno_nregs
[REGNO (in
)][GET_MODE (in
)] == 1)))
2018 unsigned int regno
= REGNO (in
) + in_offset
;
2019 unsigned int nwords
= hard_regno_nregs
[regno
][inmode
];
2021 if (! refers_to_regno_for_reload_p (regno
, regno
+ nwords
, out
, (rtx
*) 0)
2022 && ! hard_reg_set_here_p (regno
, regno
+ nwords
,
2023 PATTERN (this_insn
))
2025 || ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
2026 PATTERN (this_insn
), inloc
)))
2030 for (i
= 0; i
< nwords
; i
++)
2031 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
2037 /* If we were going to use OUT as the reload reg
2038 and changed our mind, it means OUT is a dummy that
2039 dies here. So don't bother copying value to it. */
2040 if (for_real
>= 0 && value
== real_out
)
2041 rld
[for_real
].out
= 0;
2042 if (REG_P (real_in
))
2045 value
= gen_rtx_REG (inmode
, regno
);
2053 /* This page contains subroutines used mainly for determining
2054 whether the IN or an OUT of a reload can serve as the
2057 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
2060 earlyclobber_operand_p (rtx x
)
2064 for (i
= 0; i
< n_earlyclobbers
; i
++)
2065 if (reload_earlyclobbers
[i
] == x
)
2071 /* Return 1 if expression X alters a hard reg in the range
2072 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2073 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2074 X should be the body of an instruction. */
2077 hard_reg_set_here_p (unsigned int beg_regno
, unsigned int end_regno
, rtx x
)
2079 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
2081 rtx op0
= SET_DEST (x
);
2083 while (GET_CODE (op0
) == SUBREG
)
2084 op0
= SUBREG_REG (op0
);
2087 unsigned int r
= REGNO (op0
);
2089 /* See if this reg overlaps range under consideration. */
2091 && end_hard_regno (GET_MODE (op0
), r
) > beg_regno
)
2095 else if (GET_CODE (x
) == PARALLEL
)
2097 int i
= XVECLEN (x
, 0) - 1;
2100 if (hard_reg_set_here_p (beg_regno
, end_regno
, XVECEXP (x
, 0, i
)))
2107 /* Return 1 if ADDR is a valid memory address for mode MODE,
2108 and check that each pseudo reg has the proper kind of
2112 strict_memory_address_p (enum machine_mode mode ATTRIBUTE_UNUSED
, rtx addr
)
2114 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
2121 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2122 if they are the same hard reg, and has special hacks for
2123 autoincrement and autodecrement.
2124 This is specifically intended for find_reloads to use
2125 in determining whether two operands match.
2126 X is the operand whose number is the lower of the two.
2128 The value is 2 if Y contains a pre-increment that matches
2129 a non-incrementing address in X. */
2131 /* ??? To be completely correct, we should arrange to pass
2132 for X the output operand and for Y the input operand.
2133 For now, we assume that the output operand has the lower number
2134 because that is natural in (SET output (... input ...)). */
2137 operands_match_p (rtx x
, rtx y
)
2140 RTX_CODE code
= GET_CODE (x
);
2146 if ((code
== REG
|| (code
== SUBREG
&& REG_P (SUBREG_REG (x
))))
2147 && (REG_P (y
) || (GET_CODE (y
) == SUBREG
2148 && REG_P (SUBREG_REG (y
)))))
2154 i
= REGNO (SUBREG_REG (x
));
2155 if (i
>= FIRST_PSEUDO_REGISTER
)
2157 i
+= subreg_regno_offset (REGNO (SUBREG_REG (x
)),
2158 GET_MODE (SUBREG_REG (x
)),
2165 if (GET_CODE (y
) == SUBREG
)
2167 j
= REGNO (SUBREG_REG (y
));
2168 if (j
>= FIRST_PSEUDO_REGISTER
)
2170 j
+= subreg_regno_offset (REGNO (SUBREG_REG (y
)),
2171 GET_MODE (SUBREG_REG (y
)),
2178 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2179 multiple hard register group of scalar integer registers, so that
2180 for example (reg:DI 0) and (reg:SI 1) will be considered the same
2182 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
2183 && SCALAR_INT_MODE_P (GET_MODE (x
))
2184 && i
< FIRST_PSEUDO_REGISTER
)
2185 i
+= hard_regno_nregs
[i
][GET_MODE (x
)] - 1;
2186 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (y
)) > UNITS_PER_WORD
2187 && SCALAR_INT_MODE_P (GET_MODE (y
))
2188 && j
< FIRST_PSEUDO_REGISTER
)
2189 j
+= hard_regno_nregs
[j
][GET_MODE (y
)] - 1;
2193 /* If two operands must match, because they are really a single
2194 operand of an assembler insn, then two postincrements are invalid
2195 because the assembler insn would increment only once.
2196 On the other hand, a postincrement matches ordinary indexing
2197 if the postincrement is the output operand. */
2198 if (code
== POST_DEC
|| code
== POST_INC
|| code
== POST_MODIFY
)
2199 return operands_match_p (XEXP (x
, 0), y
);
2200 /* Two preincrements are invalid
2201 because the assembler insn would increment only once.
2202 On the other hand, a preincrement matches ordinary indexing
2203 if the preincrement is the input operand.
2204 In this case, return 2, since some callers need to do special
2205 things when this happens. */
2206 if (GET_CODE (y
) == PRE_DEC
|| GET_CODE (y
) == PRE_INC
2207 || GET_CODE (y
) == PRE_MODIFY
)
2208 return operands_match_p (x
, XEXP (y
, 0)) ? 2 : 0;
2212 /* Now we have disposed of all the cases in which different rtx codes
2214 if (code
!= GET_CODE (y
))
2217 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2218 if (GET_MODE (x
) != GET_MODE (y
))
2229 return XEXP (x
, 0) == XEXP (y
, 0);
2231 return XSTR (x
, 0) == XSTR (y
, 0);
2237 /* Compare the elements. If any pair of corresponding elements
2238 fail to match, return 0 for the whole things. */
2241 fmt
= GET_RTX_FORMAT (code
);
2242 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2248 if (XWINT (x
, i
) != XWINT (y
, i
))
2253 if (XINT (x
, i
) != XINT (y
, i
))
2258 val
= operands_match_p (XEXP (x
, i
), XEXP (y
, i
));
2261 /* If any subexpression returns 2,
2262 we should return 2 if we are successful. */
2271 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2273 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; --j
)
2275 val
= operands_match_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
));
2283 /* It is believed that rtx's at this level will never
2284 contain anything but integers and other rtx's,
2285 except for within LABEL_REFs and SYMBOL_REFs. */
2290 return 1 + success_2
;
2293 /* Describe the range of registers or memory referenced by X.
2294 If X is a register, set REG_FLAG and put the first register
2295 number into START and the last plus one into END.
2296 If X is a memory reference, put a base address into BASE
2297 and a range of integer offsets into START and END.
2298 If X is pushing on the stack, we can assume it causes no trouble,
2299 so we set the SAFE field. */
2301 static struct decomposition
2304 struct decomposition val
;
2307 memset (&val
, 0, sizeof (val
));
2309 switch (GET_CODE (x
))
2313 rtx base
= NULL_RTX
, offset
= 0;
2314 rtx addr
= XEXP (x
, 0);
2316 if (GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
2317 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
2319 val
.base
= XEXP (addr
, 0);
2320 val
.start
= -GET_MODE_SIZE (GET_MODE (x
));
2321 val
.end
= GET_MODE_SIZE (GET_MODE (x
));
2322 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2326 if (GET_CODE (addr
) == PRE_MODIFY
|| GET_CODE (addr
) == POST_MODIFY
)
2328 if (GET_CODE (XEXP (addr
, 1)) == PLUS
2329 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
2330 && CONSTANT_P (XEXP (XEXP (addr
, 1), 1)))
2332 val
.base
= XEXP (addr
, 0);
2333 val
.start
= -INTVAL (XEXP (XEXP (addr
, 1), 1));
2334 val
.end
= INTVAL (XEXP (XEXP (addr
, 1), 1));
2335 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2340 if (GET_CODE (addr
) == CONST
)
2342 addr
= XEXP (addr
, 0);
2345 if (GET_CODE (addr
) == PLUS
)
2347 if (CONSTANT_P (XEXP (addr
, 0)))
2349 base
= XEXP (addr
, 1);
2350 offset
= XEXP (addr
, 0);
2352 else if (CONSTANT_P (XEXP (addr
, 1)))
2354 base
= XEXP (addr
, 0);
2355 offset
= XEXP (addr
, 1);
2362 offset
= const0_rtx
;
2364 if (GET_CODE (offset
) == CONST
)
2365 offset
= XEXP (offset
, 0);
2366 if (GET_CODE (offset
) == PLUS
)
2368 if (GET_CODE (XEXP (offset
, 0)) == CONST_INT
)
2370 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 1));
2371 offset
= XEXP (offset
, 0);
2373 else if (GET_CODE (XEXP (offset
, 1)) == CONST_INT
)
2375 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 0));
2376 offset
= XEXP (offset
, 1);
2380 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2381 offset
= const0_rtx
;
2384 else if (GET_CODE (offset
) != CONST_INT
)
2386 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2387 offset
= const0_rtx
;
2390 if (all_const
&& GET_CODE (base
) == PLUS
)
2391 base
= gen_rtx_CONST (GET_MODE (base
), base
);
2393 gcc_assert (GET_CODE (offset
) == CONST_INT
);
2395 val
.start
= INTVAL (offset
);
2396 val
.end
= val
.start
+ GET_MODE_SIZE (GET_MODE (x
));
2403 val
.start
= true_regnum (x
);
2404 if (val
.start
< 0 || val
.start
>= FIRST_PSEUDO_REGISTER
)
2406 /* A pseudo with no hard reg. */
2407 val
.start
= REGNO (x
);
2408 val
.end
= val
.start
+ 1;
2412 val
.end
= end_hard_regno (GET_MODE (x
), val
.start
);
2416 if (!REG_P (SUBREG_REG (x
)))
2417 /* This could be more precise, but it's good enough. */
2418 return decompose (SUBREG_REG (x
));
2420 val
.start
= true_regnum (x
);
2421 if (val
.start
< 0 || val
.start
>= FIRST_PSEUDO_REGISTER
)
2422 return decompose (SUBREG_REG (x
));
2425 val
.end
= val
.start
+ subreg_nregs (x
);
2429 /* This hasn't been assigned yet, so it can't conflict yet. */
2434 gcc_assert (CONSTANT_P (x
));
2441 /* Return 1 if altering Y will not modify the value of X.
2442 Y is also described by YDATA, which should be decompose (Y). */
2445 immune_p (rtx x
, rtx y
, struct decomposition ydata
)
2447 struct decomposition xdata
;
2450 return !refers_to_regno_for_reload_p (ydata
.start
, ydata
.end
, x
, (rtx
*) 0);
2454 gcc_assert (MEM_P (y
));
2455 /* If Y is memory and X is not, Y can't affect X. */
2459 xdata
= decompose (x
);
2461 if (! rtx_equal_p (xdata
.base
, ydata
.base
))
2463 /* If bases are distinct symbolic constants, there is no overlap. */
2464 if (CONSTANT_P (xdata
.base
) && CONSTANT_P (ydata
.base
))
2466 /* Constants and stack slots never overlap. */
2467 if (CONSTANT_P (xdata
.base
)
2468 && (ydata
.base
== frame_pointer_rtx
2469 || ydata
.base
== hard_frame_pointer_rtx
2470 || ydata
.base
== stack_pointer_rtx
))
2472 if (CONSTANT_P (ydata
.base
)
2473 && (xdata
.base
== frame_pointer_rtx
2474 || xdata
.base
== hard_frame_pointer_rtx
2475 || xdata
.base
== stack_pointer_rtx
))
2477 /* If either base is variable, we don't know anything. */
2481 return (xdata
.start
>= ydata
.end
|| ydata
.start
>= xdata
.end
);
2484 /* Similar, but calls decompose. */
2487 safe_from_earlyclobber (rtx op
, rtx clobber
)
2489 struct decomposition early_data
;
2491 early_data
= decompose (clobber
);
2492 return immune_p (op
, clobber
, early_data
);
2495 /* Main entry point of this file: search the body of INSN
2496 for values that need reloading and record them with push_reload.
2497 REPLACE nonzero means record also where the values occur
2498 so that subst_reloads can be used.
2500 IND_LEVELS says how many levels of indirection are supported by this
2501 machine; a value of zero means that a memory reference is not a valid
2504 LIVE_KNOWN says we have valid information about which hard
2505 regs are live at each point in the program; this is true when
2506 we are called from global_alloc but false when stupid register
2507 allocation has been done.
2509 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2510 which is nonnegative if the reg has been commandeered for reloading into.
2511 It is copied into STATIC_RELOAD_REG_P and referenced from there
2512 by various subroutines.
2514 Return TRUE if some operands need to be changed, because of swapping
2515 commutative operands, reg_equiv_address substitution, or whatever. */
2518 find_reloads (rtx insn
, int replace
, int ind_levels
, int live_known
,
2519 short *reload_reg_p
)
2521 int insn_code_number
;
2524 /* These start out as the constraints for the insn
2525 and they are chewed up as we consider alternatives. */
2526 char *constraints
[MAX_RECOG_OPERANDS
];
2527 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2529 enum reg_class preferred_class
[MAX_RECOG_OPERANDS
];
2530 char pref_or_nothing
[MAX_RECOG_OPERANDS
];
2531 /* Nonzero for a MEM operand whose entire address needs a reload.
2532 May be -1 to indicate the entire address may or may not need a reload. */
2533 int address_reloaded
[MAX_RECOG_OPERANDS
];
2534 /* Nonzero for an address operand that needs to be completely reloaded.
2535 May be -1 to indicate the entire operand may or may not need a reload. */
2536 int address_operand_reloaded
[MAX_RECOG_OPERANDS
];
2537 /* Value of enum reload_type to use for operand. */
2538 enum reload_type operand_type
[MAX_RECOG_OPERANDS
];
2539 /* Value of enum reload_type to use within address of operand. */
2540 enum reload_type address_type
[MAX_RECOG_OPERANDS
];
2541 /* Save the usage of each operand. */
2542 enum reload_usage
{ RELOAD_READ
, RELOAD_READ_WRITE
, RELOAD_WRITE
} modified
[MAX_RECOG_OPERANDS
];
2543 int no_input_reloads
= 0, no_output_reloads
= 0;
2545 int this_alternative
[MAX_RECOG_OPERANDS
];
2546 char this_alternative_match_win
[MAX_RECOG_OPERANDS
];
2547 char this_alternative_win
[MAX_RECOG_OPERANDS
];
2548 char this_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2549 char this_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2550 int this_alternative_matches
[MAX_RECOG_OPERANDS
];
2552 int goal_alternative
[MAX_RECOG_OPERANDS
];
2553 int this_alternative_number
;
2554 int goal_alternative_number
= 0;
2555 int operand_reloadnum
[MAX_RECOG_OPERANDS
];
2556 int goal_alternative_matches
[MAX_RECOG_OPERANDS
];
2557 int goal_alternative_matched
[MAX_RECOG_OPERANDS
];
2558 char goal_alternative_match_win
[MAX_RECOG_OPERANDS
];
2559 char goal_alternative_win
[MAX_RECOG_OPERANDS
];
2560 char goal_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2561 char goal_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2562 int goal_alternative_swapped
;
2565 char operands_match
[MAX_RECOG_OPERANDS
][MAX_RECOG_OPERANDS
];
2566 rtx substed_operand
[MAX_RECOG_OPERANDS
];
2567 rtx body
= PATTERN (insn
);
2568 rtx set
= single_set (insn
);
2569 int goal_earlyclobber
= 0, this_earlyclobber
;
2570 enum machine_mode operand_mode
[MAX_RECOG_OPERANDS
];
2576 n_earlyclobbers
= 0;
2577 replace_reloads
= replace
;
2578 hard_regs_live_known
= live_known
;
2579 static_reload_reg_p
= reload_reg_p
;
2581 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2582 neither are insns that SET cc0. Insns that use CC0 are not allowed
2583 to have any input reloads. */
2584 if (JUMP_P (insn
) || CALL_P (insn
))
2585 no_output_reloads
= 1;
2588 if (reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
2589 no_input_reloads
= 1;
2590 if (reg_set_p (cc0_rtx
, PATTERN (insn
)))
2591 no_output_reloads
= 1;
2594 #ifdef SECONDARY_MEMORY_NEEDED
2595 /* The eliminated forms of any secondary memory locations are per-insn, so
2596 clear them out here. */
2598 if (secondary_memlocs_elim_used
)
2600 memset (secondary_memlocs_elim
, 0,
2601 sizeof (secondary_memlocs_elim
[0]) * secondary_memlocs_elim_used
);
2602 secondary_memlocs_elim_used
= 0;
2606 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2607 is cheap to move between them. If it is not, there may not be an insn
2608 to do the copy, so we may need a reload. */
2609 if (GET_CODE (body
) == SET
2610 && REG_P (SET_DEST (body
))
2611 && REGNO (SET_DEST (body
)) < FIRST_PSEUDO_REGISTER
2612 && REG_P (SET_SRC (body
))
2613 && REGNO (SET_SRC (body
)) < FIRST_PSEUDO_REGISTER
2614 && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body
)),
2615 REGNO_REG_CLASS (REGNO (SET_SRC (body
))),
2616 REGNO_REG_CLASS (REGNO (SET_DEST (body
)))) == 2)
2619 extract_insn (insn
);
2621 noperands
= reload_n_operands
= recog_data
.n_operands
;
2622 n_alternatives
= recog_data
.n_alternatives
;
2624 /* Just return "no reloads" if insn has no operands with constraints. */
2625 if (noperands
== 0 || n_alternatives
== 0)
2628 insn_code_number
= INSN_CODE (insn
);
2629 this_insn_is_asm
= insn_code_number
< 0;
2631 memcpy (operand_mode
, recog_data
.operand_mode
,
2632 noperands
* sizeof (enum machine_mode
));
2633 memcpy (constraints
, recog_data
.constraints
, noperands
* sizeof (char *));
2637 /* If we will need to know, later, whether some pair of operands
2638 are the same, we must compare them now and save the result.
2639 Reloading the base and index registers will clobber them
2640 and afterward they will fail to match. */
2642 for (i
= 0; i
< noperands
; i
++)
2647 substed_operand
[i
] = recog_data
.operand
[i
];
2650 modified
[i
] = RELOAD_READ
;
2652 /* Scan this operand's constraint to see if it is an output operand,
2653 an in-out operand, is commutative, or should match another. */
2657 p
+= CONSTRAINT_LEN (c
, p
);
2661 modified
[i
] = RELOAD_WRITE
;
2664 modified
[i
] = RELOAD_READ_WRITE
;
2668 /* The last operand should not be marked commutative. */
2669 gcc_assert (i
!= noperands
- 1);
2671 /* We currently only support one commutative pair of
2672 operands. Some existing asm code currently uses more
2673 than one pair. Previously, that would usually work,
2674 but sometimes it would crash the compiler. We
2675 continue supporting that case as well as we can by
2676 silently ignoring all but the first pair. In the
2677 future we may handle it correctly. */
2678 if (commutative
< 0)
2681 gcc_assert (this_insn_is_asm
);
2684 /* Use of ISDIGIT is tempting here, but it may get expensive because
2685 of locale support we don't want. */
2686 case '0': case '1': case '2': case '3': case '4':
2687 case '5': case '6': case '7': case '8': case '9':
2689 c
= strtoul (p
- 1, &p
, 10);
2691 operands_match
[c
][i
]
2692 = operands_match_p (recog_data
.operand
[c
],
2693 recog_data
.operand
[i
]);
2695 /* An operand may not match itself. */
2696 gcc_assert (c
!= i
);
2698 /* If C can be commuted with C+1, and C might need to match I,
2699 then C+1 might also need to match I. */
2700 if (commutative
>= 0)
2702 if (c
== commutative
|| c
== commutative
+ 1)
2704 int other
= c
+ (c
== commutative
? 1 : -1);
2705 operands_match
[other
][i
]
2706 = operands_match_p (recog_data
.operand
[other
],
2707 recog_data
.operand
[i
]);
2709 if (i
== commutative
|| i
== commutative
+ 1)
2711 int other
= i
+ (i
== commutative
? 1 : -1);
2712 operands_match
[c
][other
]
2713 = operands_match_p (recog_data
.operand
[c
],
2714 recog_data
.operand
[other
]);
2716 /* Note that C is supposed to be less than I.
2717 No need to consider altering both C and I because in
2718 that case we would alter one into the other. */
2725 /* Examine each operand that is a memory reference or memory address
2726 and reload parts of the addresses into index registers.
2727 Also here any references to pseudo regs that didn't get hard regs
2728 but are equivalent to constants get replaced in the insn itself
2729 with those constants. Nobody will ever see them again.
2731 Finally, set up the preferred classes of each operand. */
2733 for (i
= 0; i
< noperands
; i
++)
2735 RTX_CODE code
= GET_CODE (recog_data
.operand
[i
]);
2737 address_reloaded
[i
] = 0;
2738 address_operand_reloaded
[i
] = 0;
2739 operand_type
[i
] = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT
2740 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT
2743 = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT_ADDRESS
2744 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT_ADDRESS
2747 if (*constraints
[i
] == 0)
2748 /* Ignore things like match_operator operands. */
2750 else if (constraints
[i
][0] == 'p'
2751 || EXTRA_ADDRESS_CONSTRAINT (constraints
[i
][0], constraints
[i
]))
2753 address_operand_reloaded
[i
]
2754 = find_reloads_address (recog_data
.operand_mode
[i
], (rtx
*) 0,
2755 recog_data
.operand
[i
],
2756 recog_data
.operand_loc
[i
],
2757 i
, operand_type
[i
], ind_levels
, insn
);
2759 /* If we now have a simple operand where we used to have a
2760 PLUS or MULT, re-recognize and try again. */
2761 if ((OBJECT_P (*recog_data
.operand_loc
[i
])
2762 || GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2763 && (GET_CODE (recog_data
.operand
[i
]) == MULT
2764 || GET_CODE (recog_data
.operand
[i
]) == PLUS
))
2766 INSN_CODE (insn
) = -1;
2767 retval
= find_reloads (insn
, replace
, ind_levels
, live_known
,
2772 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2773 substed_operand
[i
] = recog_data
.operand
[i
];
2775 /* Address operands are reloaded in their existing mode,
2776 no matter what is specified in the machine description. */
2777 operand_mode
[i
] = GET_MODE (recog_data
.operand
[i
]);
2779 else if (code
== MEM
)
2782 = find_reloads_address (GET_MODE (recog_data
.operand
[i
]),
2783 recog_data
.operand_loc
[i
],
2784 XEXP (recog_data
.operand
[i
], 0),
2785 &XEXP (recog_data
.operand
[i
], 0),
2786 i
, address_type
[i
], ind_levels
, insn
);
2787 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2788 substed_operand
[i
] = recog_data
.operand
[i
];
2790 else if (code
== SUBREG
)
2792 rtx reg
= SUBREG_REG (recog_data
.operand
[i
]);
2794 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2797 && &SET_DEST (set
) == recog_data
.operand_loc
[i
],
2799 &address_reloaded
[i
]);
2801 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2802 that didn't get a hard register, emit a USE with a REG_EQUAL
2803 note in front so that we might inherit a previous, possibly
2809 && (GET_MODE_SIZE (GET_MODE (reg
))
2810 >= GET_MODE_SIZE (GET_MODE (op
)))
2811 && reg_equiv_constant
[REGNO (reg
)] == 0)
2812 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode
, reg
),
2814 REG_EQUAL
, reg_equiv_memory_loc
[REGNO (reg
)]);
2816 substed_operand
[i
] = recog_data
.operand
[i
] = op
;
2818 else if (code
== PLUS
|| GET_RTX_CLASS (code
) == RTX_UNARY
)
2819 /* We can get a PLUS as an "operand" as a result of register
2820 elimination. See eliminate_regs and gen_reload. We handle
2821 a unary operator by reloading the operand. */
2822 substed_operand
[i
] = recog_data
.operand
[i
]
2823 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2824 ind_levels
, 0, insn
,
2825 &address_reloaded
[i
]);
2826 else if (code
== REG
)
2828 /* This is equivalent to calling find_reloads_toplev.
2829 The code is duplicated for speed.
2830 When we find a pseudo always equivalent to a constant,
2831 we replace it by the constant. We must be sure, however,
2832 that we don't try to replace it in the insn in which it
2834 int regno
= REGNO (recog_data
.operand
[i
]);
2835 if (reg_equiv_constant
[regno
] != 0
2836 && (set
== 0 || &SET_DEST (set
) != recog_data
.operand_loc
[i
]))
2838 /* Record the existing mode so that the check if constants are
2839 allowed will work when operand_mode isn't specified. */
2841 if (operand_mode
[i
] == VOIDmode
)
2842 operand_mode
[i
] = GET_MODE (recog_data
.operand
[i
]);
2844 substed_operand
[i
] = recog_data
.operand
[i
]
2845 = reg_equiv_constant
[regno
];
2847 if (reg_equiv_memory_loc
[regno
] != 0
2848 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
2849 /* We need not give a valid is_set_dest argument since the case
2850 of a constant equivalence was checked above. */
2851 substed_operand
[i
] = recog_data
.operand
[i
]
2852 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2853 ind_levels
, 0, insn
,
2854 &address_reloaded
[i
]);
2856 /* If the operand is still a register (we didn't replace it with an
2857 equivalent), get the preferred class to reload it into. */
2858 code
= GET_CODE (recog_data
.operand
[i
]);
2860 = ((code
== REG
&& REGNO (recog_data
.operand
[i
])
2861 >= FIRST_PSEUDO_REGISTER
)
2862 ? reg_preferred_class (REGNO (recog_data
.operand
[i
]))
2866 && REGNO (recog_data
.operand
[i
]) >= FIRST_PSEUDO_REGISTER
2867 && reg_alternate_class (REGNO (recog_data
.operand
[i
])) == NO_REGS
);
2870 /* If this is simply a copy from operand 1 to operand 0, merge the
2871 preferred classes for the operands. */
2872 if (set
!= 0 && noperands
>= 2 && recog_data
.operand
[0] == SET_DEST (set
)
2873 && recog_data
.operand
[1] == SET_SRC (set
))
2875 preferred_class
[0] = preferred_class
[1]
2876 = reg_class_subunion
[(int) preferred_class
[0]][(int) preferred_class
[1]];
2877 pref_or_nothing
[0] |= pref_or_nothing
[1];
2878 pref_or_nothing
[1] |= pref_or_nothing
[0];
2881 /* Now see what we need for pseudo-regs that didn't get hard regs
2882 or got the wrong kind of hard reg. For this, we must consider
2883 all the operands together against the register constraints. */
2885 best
= MAX_RECOG_OPERANDS
* 2 + 600;
2888 goal_alternative_swapped
= 0;
2891 /* The constraints are made of several alternatives.
2892 Each operand's constraint looks like foo,bar,... with commas
2893 separating the alternatives. The first alternatives for all
2894 operands go together, the second alternatives go together, etc.
2896 First loop over alternatives. */
2898 for (this_alternative_number
= 0;
2899 this_alternative_number
< n_alternatives
;
2900 this_alternative_number
++)
2902 /* Loop over operands for one constraint alternative. */
2903 /* LOSERS counts those that don't fit this alternative
2904 and would require loading. */
2906 /* BAD is set to 1 if it some operand can't fit this alternative
2907 even after reloading. */
2909 /* REJECT is a count of how undesirable this alternative says it is
2910 if any reloading is required. If the alternative matches exactly
2911 then REJECT is ignored, but otherwise it gets this much
2912 counted against it in addition to the reloading needed. Each
2913 ? counts three times here since we want the disparaging caused by
2914 a bad register class to only count 1/3 as much. */
2917 this_earlyclobber
= 0;
2919 for (i
= 0; i
< noperands
; i
++)
2921 char *p
= constraints
[i
];
2926 /* 0 => this operand can be reloaded somehow for this alternative. */
2928 /* 0 => this operand can be reloaded if the alternative allows regs. */
2932 rtx operand
= recog_data
.operand
[i
];
2934 /* Nonzero means this is a MEM that must be reloaded into a reg
2935 regardless of what the constraint says. */
2936 int force_reload
= 0;
2938 /* Nonzero if a constant forced into memory would be OK for this
2941 int earlyclobber
= 0;
2943 /* If the predicate accepts a unary operator, it means that
2944 we need to reload the operand, but do not do this for
2945 match_operator and friends. */
2946 if (UNARY_P (operand
) && *p
!= 0)
2947 operand
= XEXP (operand
, 0);
2949 /* If the operand is a SUBREG, extract
2950 the REG or MEM (or maybe even a constant) within.
2951 (Constants can occur as a result of reg_equiv_constant.) */
2953 while (GET_CODE (operand
) == SUBREG
)
2955 /* Offset only matters when operand is a REG and
2956 it is a hard reg. This is because it is passed
2957 to reg_fits_class_p if it is a REG and all pseudos
2958 return 0 from that function. */
2959 if (REG_P (SUBREG_REG (operand
))
2960 && REGNO (SUBREG_REG (operand
)) < FIRST_PSEUDO_REGISTER
)
2962 if (!subreg_offset_representable_p
2963 (REGNO (SUBREG_REG (operand
)),
2964 GET_MODE (SUBREG_REG (operand
)),
2965 SUBREG_BYTE (operand
),
2966 GET_MODE (operand
)))
2968 offset
+= subreg_regno_offset (REGNO (SUBREG_REG (operand
)),
2969 GET_MODE (SUBREG_REG (operand
)),
2970 SUBREG_BYTE (operand
),
2971 GET_MODE (operand
));
2973 operand
= SUBREG_REG (operand
);
2974 /* Force reload if this is a constant or PLUS or if there may
2975 be a problem accessing OPERAND in the outer mode. */
2976 if (CONSTANT_P (operand
)
2977 || GET_CODE (operand
) == PLUS
2978 /* We must force a reload of paradoxical SUBREGs
2979 of a MEM because the alignment of the inner value
2980 may not be enough to do the outer reference. On
2981 big-endian machines, it may also reference outside
2984 On machines that extend byte operations and we have a
2985 SUBREG where both the inner and outer modes are no wider
2986 than a word and the inner mode is narrower, is integral,
2987 and gets extended when loaded from memory, combine.c has
2988 made assumptions about the behavior of the machine in such
2989 register access. If the data is, in fact, in memory we
2990 must always load using the size assumed to be in the
2991 register and let the insn do the different-sized
2994 This is doubly true if WORD_REGISTER_OPERATIONS. In
2995 this case eliminate_regs has left non-paradoxical
2996 subregs for push_reload to see. Make sure it does
2997 by forcing the reload.
2999 ??? When is it right at this stage to have a subreg
3000 of a mem that is _not_ to be handled specially? IMO
3001 those should have been reduced to just a mem. */
3002 || ((MEM_P (operand
)
3004 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3005 #ifndef WORD_REGISTER_OPERATIONS
3006 && (((GET_MODE_BITSIZE (GET_MODE (operand
))
3007 < BIGGEST_ALIGNMENT
)
3008 && (GET_MODE_SIZE (operand_mode
[i
])
3009 > GET_MODE_SIZE (GET_MODE (operand
))))
3011 #ifdef LOAD_EXTEND_OP
3012 || (GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
3013 && (GET_MODE_SIZE (GET_MODE (operand
))
3015 && (GET_MODE_SIZE (operand_mode
[i
])
3016 > GET_MODE_SIZE (GET_MODE (operand
)))
3017 && INTEGRAL_MODE_P (GET_MODE (operand
))
3018 && LOAD_EXTEND_OP (GET_MODE (operand
)) != UNKNOWN
)
3027 this_alternative
[i
] = (int) NO_REGS
;
3028 this_alternative_win
[i
] = 0;
3029 this_alternative_match_win
[i
] = 0;
3030 this_alternative_offmemok
[i
] = 0;
3031 this_alternative_earlyclobber
[i
] = 0;
3032 this_alternative_matches
[i
] = -1;
3034 /* An empty constraint or empty alternative
3035 allows anything which matched the pattern. */
3036 if (*p
== 0 || *p
== ',')
3039 /* Scan this alternative's specs for this operand;
3040 set WIN if the operand fits any letter in this alternative.
3041 Otherwise, clear BADOP if this operand could
3042 fit some letter after reloads,
3043 or set WINREG if this operand could fit after reloads
3044 provided the constraint allows some registers. */
3047 switch ((c
= *p
, len
= CONSTRAINT_LEN (c
, p
)), c
)
3056 case '=': case '+': case '*':
3060 /* We only support one commutative marker, the first
3061 one. We already set commutative above. */
3073 /* Ignore rest of this alternative as far as
3074 reloading is concerned. */
3077 while (*p
&& *p
!= ',');
3081 case '0': case '1': case '2': case '3': case '4':
3082 case '5': case '6': case '7': case '8': case '9':
3083 m
= strtoul (p
, &end
, 10);
3087 this_alternative_matches
[i
] = m
;
3088 /* We are supposed to match a previous operand.
3089 If we do, we win if that one did.
3090 If we do not, count both of the operands as losers.
3091 (This is too conservative, since most of the time
3092 only a single reload insn will be needed to make
3093 the two operands win. As a result, this alternative
3094 may be rejected when it is actually desirable.) */
3095 if ((swapped
&& (m
!= commutative
|| i
!= commutative
+ 1))
3096 /* If we are matching as if two operands were swapped,
3097 also pretend that operands_match had been computed
3099 But if I is the second of those and C is the first,
3100 don't exchange them, because operands_match is valid
3101 only on one side of its diagonal. */
3103 [(m
== commutative
|| m
== commutative
+ 1)
3104 ? 2 * commutative
+ 1 - m
: m
]
3105 [(i
== commutative
|| i
== commutative
+ 1)
3106 ? 2 * commutative
+ 1 - i
: i
])
3107 : operands_match
[m
][i
])
3109 /* If we are matching a non-offsettable address where an
3110 offsettable address was expected, then we must reject
3111 this combination, because we can't reload it. */
3112 if (this_alternative_offmemok
[m
]
3113 && MEM_P (recog_data
.operand
[m
])
3114 && this_alternative
[m
] == (int) NO_REGS
3115 && ! this_alternative_win
[m
])
3118 did_match
= this_alternative_win
[m
];
3122 /* Operands don't match. */
3125 /* Retroactively mark the operand we had to match
3126 as a loser, if it wasn't already. */
3127 if (this_alternative_win
[m
])
3129 this_alternative_win
[m
] = 0;
3130 if (this_alternative
[m
] == (int) NO_REGS
)
3132 /* But count the pair only once in the total badness of
3133 this alternative, if the pair can be a dummy reload.
3134 The pointers in operand_loc are not swapped; swap
3135 them by hand if necessary. */
3136 if (swapped
&& i
== commutative
)
3137 loc1
= commutative
+ 1;
3138 else if (swapped
&& i
== commutative
+ 1)
3142 if (swapped
&& m
== commutative
)
3143 loc2
= commutative
+ 1;
3144 else if (swapped
&& m
== commutative
+ 1)
3149 = find_dummy_reload (recog_data
.operand
[i
],
3150 recog_data
.operand
[m
],
3151 recog_data
.operand_loc
[loc1
],
3152 recog_data
.operand_loc
[loc2
],
3153 operand_mode
[i
], operand_mode
[m
],
3154 this_alternative
[m
], -1,
3155 this_alternative_earlyclobber
[m
]);
3160 /* This can be fixed with reloads if the operand
3161 we are supposed to match can be fixed with reloads. */
3163 this_alternative
[i
] = this_alternative
[m
];
3165 /* If we have to reload this operand and some previous
3166 operand also had to match the same thing as this
3167 operand, we don't know how to do that. So reject this
3169 if (! did_match
|| force_reload
)
3170 for (j
= 0; j
< i
; j
++)
3171 if (this_alternative_matches
[j
]
3172 == this_alternative_matches
[i
])
3177 /* All necessary reloads for an address_operand
3178 were handled in find_reloads_address. */
3180 = (int) base_reg_class (VOIDmode
, ADDRESS
, SCRATCH
);
3190 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3191 && reg_renumber
[REGNO (operand
)] < 0))
3193 if (CONST_POOL_OK_P (operand
))
3200 && ! address_reloaded
[i
]
3201 && (GET_CODE (XEXP (operand
, 0)) == PRE_DEC
3202 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
3208 && ! address_reloaded
[i
]
3209 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
3210 || GET_CODE (XEXP (operand
, 0)) == POST_INC
))
3214 /* Memory operand whose address is not offsettable. */
3219 && ! (ind_levels
? offsettable_memref_p (operand
)
3220 : offsettable_nonstrict_memref_p (operand
))
3221 /* Certain mem addresses will become offsettable
3222 after they themselves are reloaded. This is important;
3223 we don't want our own handling of unoffsettables
3224 to override the handling of reg_equiv_address. */
3225 && !(REG_P (XEXP (operand
, 0))
3227 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0)))
3231 /* Memory operand whose address is offsettable. */
3235 if ((MEM_P (operand
)
3236 /* If IND_LEVELS, find_reloads_address won't reload a
3237 pseudo that didn't get a hard reg, so we have to
3238 reject that case. */
3239 && ((ind_levels
? offsettable_memref_p (operand
)
3240 : offsettable_nonstrict_memref_p (operand
))
3241 /* A reloaded address is offsettable because it is now
3242 just a simple register indirect. */
3243 || address_reloaded
[i
] == 1))
3245 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3246 && reg_renumber
[REGNO (operand
)] < 0
3247 /* If reg_equiv_address is nonzero, we will be
3248 loading it into a register; hence it will be
3249 offsettable, but we cannot say that reg_equiv_mem
3250 is offsettable without checking. */
3251 && ((reg_equiv_mem
[REGNO (operand
)] != 0
3252 && offsettable_memref_p (reg_equiv_mem
[REGNO (operand
)]))
3253 || (reg_equiv_address
[REGNO (operand
)] != 0))))
3255 if (CONST_POOL_OK_P (operand
)
3263 /* Output operand that is stored before the need for the
3264 input operands (and their index registers) is over. */
3265 earlyclobber
= 1, this_earlyclobber
= 1;
3270 if (GET_CODE (operand
) == CONST_DOUBLE
3271 || (GET_CODE (operand
) == CONST_VECTOR
3272 && (GET_MODE_CLASS (GET_MODE (operand
))
3273 == MODE_VECTOR_FLOAT
)))
3279 if (GET_CODE (operand
) == CONST_DOUBLE
3280 && CONST_DOUBLE_OK_FOR_CONSTRAINT_P (operand
, c
, p
))
3285 if (GET_CODE (operand
) == CONST_INT
3286 || (GET_CODE (operand
) == CONST_DOUBLE
3287 && GET_MODE (operand
) == VOIDmode
))
3290 if (CONSTANT_P (operand
)
3291 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (operand
)))
3296 if (GET_CODE (operand
) == CONST_INT
3297 || (GET_CODE (operand
) == CONST_DOUBLE
3298 && GET_MODE (operand
) == VOIDmode
))
3310 if (GET_CODE (operand
) == CONST_INT
3311 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (operand
), c
, p
))
3322 /* A PLUS is never a valid operand, but reload can make
3323 it from a register when eliminating registers. */
3324 && GET_CODE (operand
) != PLUS
3325 /* A SCRATCH is not a valid operand. */
3326 && GET_CODE (operand
) != SCRATCH
3327 && (! CONSTANT_P (operand
)
3329 || LEGITIMATE_PIC_OPERAND_P (operand
))
3330 && (GENERAL_REGS
== ALL_REGS
3332 || (REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3333 && reg_renumber
[REGNO (operand
)] < 0)))
3335 /* Drop through into 'r' case. */
3339 = (int) reg_class_subunion
[this_alternative
[i
]][(int) GENERAL_REGS
];
3343 if (REG_CLASS_FROM_CONSTRAINT (c
, p
) == NO_REGS
)
3345 #ifdef EXTRA_CONSTRAINT_STR
3346 if (EXTRA_MEMORY_CONSTRAINT (c
, p
))
3350 if (EXTRA_CONSTRAINT_STR (operand
, c
, p
))
3352 /* If the address was already reloaded,
3354 else if (MEM_P (operand
)
3355 && address_reloaded
[i
] == 1)
3357 /* Likewise if the address will be reloaded because
3358 reg_equiv_address is nonzero. For reg_equiv_mem
3359 we have to check. */
3360 else if (REG_P (operand
)
3361 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3362 && reg_renumber
[REGNO (operand
)] < 0
3363 && ((reg_equiv_mem
[REGNO (operand
)] != 0
3364 && EXTRA_CONSTRAINT_STR (reg_equiv_mem
[REGNO (operand
)], c
, p
))
3365 || (reg_equiv_address
[REGNO (operand
)] != 0)))
3368 /* If we didn't already win, we can reload
3369 constants via force_const_mem, and other
3370 MEMs by reloading the address like for 'o'. */
3371 if (CONST_POOL_OK_P (operand
)
3378 if (EXTRA_ADDRESS_CONSTRAINT (c
, p
))
3380 if (EXTRA_CONSTRAINT_STR (operand
, c
, p
))
3383 /* If we didn't already win, we can reload
3384 the address into a base register. */
3386 = (int) base_reg_class (VOIDmode
, ADDRESS
, SCRATCH
);
3391 if (EXTRA_CONSTRAINT_STR (operand
, c
, p
))
3398 = (int) (reg_class_subunion
3399 [this_alternative
[i
]]
3400 [(int) REG_CLASS_FROM_CONSTRAINT (c
, p
)]);
3402 if (GET_MODE (operand
) == BLKmode
)
3406 && reg_fits_class_p (operand
, this_alternative
[i
],
3407 offset
, GET_MODE (recog_data
.operand
[i
])))
3411 while ((p
+= len
), c
);
3415 /* If this operand could be handled with a reg,
3416 and some reg is allowed, then this operand can be handled. */
3417 if (winreg
&& this_alternative
[i
] != (int) NO_REGS
)
3420 /* Record which operands fit this alternative. */
3421 this_alternative_earlyclobber
[i
] = earlyclobber
;
3422 if (win
&& ! force_reload
)
3423 this_alternative_win
[i
] = 1;
3424 else if (did_match
&& ! force_reload
)
3425 this_alternative_match_win
[i
] = 1;
3428 int const_to_mem
= 0;
3430 this_alternative_offmemok
[i
] = offmemok
;
3434 /* Alternative loses if it has no regs for a reg operand. */
3436 && this_alternative
[i
] == (int) NO_REGS
3437 && this_alternative_matches
[i
] < 0)
3440 /* If this is a constant that is reloaded into the desired
3441 class by copying it to memory first, count that as another
3442 reload. This is consistent with other code and is
3443 required to avoid choosing another alternative when
3444 the constant is moved into memory by this function on
3445 an early reload pass. Note that the test here is
3446 precisely the same as in the code below that calls
3448 if (CONST_POOL_OK_P (operand
)
3449 && ((PREFERRED_RELOAD_CLASS (operand
,
3450 (enum reg_class
) this_alternative
[i
])
3452 || no_input_reloads
)
3453 && operand_mode
[i
] != VOIDmode
)
3456 if (this_alternative
[i
] != (int) NO_REGS
)
3460 /* Alternative loses if it requires a type of reload not
3461 permitted for this insn. We can always reload SCRATCH
3462 and objects with a REG_UNUSED note. */
3463 if (GET_CODE (operand
) != SCRATCH
3464 && modified
[i
] != RELOAD_READ
&& no_output_reloads
3465 && ! find_reg_note (insn
, REG_UNUSED
, operand
))
3467 else if (modified
[i
] != RELOAD_WRITE
&& no_input_reloads
3471 /* If we can't reload this value at all, reject this
3472 alternative. Note that we could also lose due to
3473 LIMIT_RELOAD_CLASS, but we don't check that
3476 if (! CONSTANT_P (operand
)
3477 && (enum reg_class
) this_alternative
[i
] != NO_REGS
)
3479 if (PREFERRED_RELOAD_CLASS
3480 (operand
, (enum reg_class
) this_alternative
[i
])
3484 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
3485 if (operand_type
[i
] == RELOAD_FOR_OUTPUT
3486 && PREFERRED_OUTPUT_RELOAD_CLASS
3487 (operand
, (enum reg_class
) this_alternative
[i
])
3493 /* We prefer to reload pseudos over reloading other things,
3494 since such reloads may be able to be eliminated later.
3495 If we are reloading a SCRATCH, we won't be generating any
3496 insns, just using a register, so it is also preferred.
3497 So bump REJECT in other cases. Don't do this in the
3498 case where we are forcing a constant into memory and
3499 it will then win since we don't want to have a different
3500 alternative match then. */
3501 if (! (REG_P (operand
)
3502 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
3503 && GET_CODE (operand
) != SCRATCH
3504 && ! (const_to_mem
&& constmemok
))
3507 /* Input reloads can be inherited more often than output
3508 reloads can be removed, so penalize output reloads. */
3509 if (operand_type
[i
] != RELOAD_FOR_INPUT
3510 && GET_CODE (operand
) != SCRATCH
)
3514 /* If this operand is a pseudo register that didn't get a hard
3515 reg and this alternative accepts some register, see if the
3516 class that we want is a subset of the preferred class for this
3517 register. If not, but it intersects that class, use the
3518 preferred class instead. If it does not intersect the preferred
3519 class, show that usage of this alternative should be discouraged;
3520 it will be discouraged more still if the register is `preferred
3521 or nothing'. We do this because it increases the chance of
3522 reusing our spill register in a later insn and avoiding a pair
3523 of memory stores and loads.
3525 Don't bother with this if this alternative will accept this
3528 Don't do this for a multiword operand, since it is only a
3529 small win and has the risk of requiring more spill registers,
3530 which could cause a large loss.
3532 Don't do this if the preferred class has only one register
3533 because we might otherwise exhaust the class. */
3535 if (! win
&& ! did_match
3536 && this_alternative
[i
] != (int) NO_REGS
3537 && GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
3538 && reg_class_size
[(int) preferred_class
[i
]] > 0
3539 && ! SMALL_REGISTER_CLASS_P (preferred_class
[i
]))
3541 if (! reg_class_subset_p (this_alternative
[i
],
3542 preferred_class
[i
]))
3544 /* Since we don't have a way of forming the intersection,
3545 we just do something special if the preferred class
3546 is a subset of the class we have; that's the most
3547 common case anyway. */
3548 if (reg_class_subset_p (preferred_class
[i
],
3549 this_alternative
[i
]))
3550 this_alternative
[i
] = (int) preferred_class
[i
];
3552 reject
+= (2 + 2 * pref_or_nothing
[i
]);
3557 /* Now see if any output operands that are marked "earlyclobber"
3558 in this alternative conflict with any input operands
3559 or any memory addresses. */
3561 for (i
= 0; i
< noperands
; i
++)
3562 if (this_alternative_earlyclobber
[i
]
3563 && (this_alternative_win
[i
] || this_alternative_match_win
[i
]))
3565 struct decomposition early_data
;
3567 early_data
= decompose (recog_data
.operand
[i
]);
3569 gcc_assert (modified
[i
] != RELOAD_READ
);
3571 if (this_alternative
[i
] == NO_REGS
)
3573 this_alternative_earlyclobber
[i
] = 0;
3574 gcc_assert (this_insn_is_asm
);
3575 error_for_asm (this_insn
,
3576 "%<&%> constraint used with no register class");
3579 for (j
= 0; j
< noperands
; j
++)
3580 /* Is this an input operand or a memory ref? */
3581 if ((MEM_P (recog_data
.operand
[j
])
3582 || modified
[j
] != RELOAD_WRITE
)
3584 /* Ignore things like match_operator operands. */
3585 && *recog_data
.constraints
[j
] != 0
3586 /* Don't count an input operand that is constrained to match
3587 the early clobber operand. */
3588 && ! (this_alternative_matches
[j
] == i
3589 && rtx_equal_p (recog_data
.operand
[i
],
3590 recog_data
.operand
[j
]))
3591 /* Is it altered by storing the earlyclobber operand? */
3592 && !immune_p (recog_data
.operand
[j
], recog_data
.operand
[i
],
3595 /* If the output is in a non-empty few-regs class,
3596 it's costly to reload it, so reload the input instead. */
3597 if (SMALL_REGISTER_CLASS_P (this_alternative
[i
])
3598 && (REG_P (recog_data
.operand
[j
])
3599 || GET_CODE (recog_data
.operand
[j
]) == SUBREG
))
3602 this_alternative_win
[j
] = 0;
3603 this_alternative_match_win
[j
] = 0;
3608 /* If an earlyclobber operand conflicts with something,
3609 it must be reloaded, so request this and count the cost. */
3613 this_alternative_win
[i
] = 0;
3614 this_alternative_match_win
[j
] = 0;
3615 for (j
= 0; j
< noperands
; j
++)
3616 if (this_alternative_matches
[j
] == i
3617 && this_alternative_match_win
[j
])
3619 this_alternative_win
[j
] = 0;
3620 this_alternative_match_win
[j
] = 0;
3626 /* If one alternative accepts all the operands, no reload required,
3627 choose that alternative; don't consider the remaining ones. */
3630 /* Unswap these so that they are never swapped at `finish'. */
3631 if (commutative
>= 0)
3633 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3634 recog_data
.operand
[commutative
+ 1]
3635 = substed_operand
[commutative
+ 1];
3637 for (i
= 0; i
< noperands
; i
++)
3639 goal_alternative_win
[i
] = this_alternative_win
[i
];
3640 goal_alternative_match_win
[i
] = this_alternative_match_win
[i
];
3641 goal_alternative
[i
] = this_alternative
[i
];
3642 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3643 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3644 goal_alternative_earlyclobber
[i
]
3645 = this_alternative_earlyclobber
[i
];
3647 goal_alternative_number
= this_alternative_number
;
3648 goal_alternative_swapped
= swapped
;
3649 goal_earlyclobber
= this_earlyclobber
;
3653 /* REJECT, set by the ! and ? constraint characters and when a register
3654 would be reloaded into a non-preferred class, discourages the use of
3655 this alternative for a reload goal. REJECT is incremented by six
3656 for each ? and two for each non-preferred class. */
3657 losers
= losers
* 6 + reject
;
3659 /* If this alternative can be made to work by reloading,
3660 and it needs less reloading than the others checked so far,
3661 record it as the chosen goal for reloading. */
3662 if (! bad
&& best
> losers
)
3664 for (i
= 0; i
< noperands
; i
++)
3666 goal_alternative
[i
] = this_alternative
[i
];
3667 goal_alternative_win
[i
] = this_alternative_win
[i
];
3668 goal_alternative_match_win
[i
] = this_alternative_match_win
[i
];
3669 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3670 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3671 goal_alternative_earlyclobber
[i
]
3672 = this_alternative_earlyclobber
[i
];
3674 goal_alternative_swapped
= swapped
;
3676 goal_alternative_number
= this_alternative_number
;
3677 goal_earlyclobber
= this_earlyclobber
;
3681 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3682 then we need to try each alternative twice,
3683 the second time matching those two operands
3684 as if we had exchanged them.
3685 To do this, really exchange them in operands.
3687 If we have just tried the alternatives the second time,
3688 return operands to normal and drop through. */
3690 if (commutative
>= 0)
3695 enum reg_class tclass
;
3698 recog_data
.operand
[commutative
] = substed_operand
[commutative
+ 1];
3699 recog_data
.operand
[commutative
+ 1] = substed_operand
[commutative
];
3700 /* Swap the duplicates too. */
3701 for (i
= 0; i
< recog_data
.n_dups
; i
++)
3702 if (recog_data
.dup_num
[i
] == commutative
3703 || recog_data
.dup_num
[i
] == commutative
+ 1)
3704 *recog_data
.dup_loc
[i
]
3705 = recog_data
.operand
[(int) recog_data
.dup_num
[i
]];
3707 tclass
= preferred_class
[commutative
];
3708 preferred_class
[commutative
] = preferred_class
[commutative
+ 1];
3709 preferred_class
[commutative
+ 1] = tclass
;
3711 t
= pref_or_nothing
[commutative
];
3712 pref_or_nothing
[commutative
] = pref_or_nothing
[commutative
+ 1];
3713 pref_or_nothing
[commutative
+ 1] = t
;
3715 t
= address_reloaded
[commutative
];
3716 address_reloaded
[commutative
] = address_reloaded
[commutative
+ 1];
3717 address_reloaded
[commutative
+ 1] = t
;
3719 memcpy (constraints
, recog_data
.constraints
,
3720 noperands
* sizeof (char *));
3725 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3726 recog_data
.operand
[commutative
+ 1]
3727 = substed_operand
[commutative
+ 1];
3728 /* Unswap the duplicates too. */
3729 for (i
= 0; i
< recog_data
.n_dups
; i
++)
3730 if (recog_data
.dup_num
[i
] == commutative
3731 || recog_data
.dup_num
[i
] == commutative
+ 1)
3732 *recog_data
.dup_loc
[i
]
3733 = recog_data
.operand
[(int) recog_data
.dup_num
[i
]];
3737 /* The operands don't meet the constraints.
3738 goal_alternative describes the alternative
3739 that we could reach by reloading the fewest operands.
3740 Reload so as to fit it. */
3742 if (best
== MAX_RECOG_OPERANDS
* 2 + 600)
3744 /* No alternative works with reloads?? */
3745 if (insn_code_number
>= 0)
3746 fatal_insn ("unable to generate reloads for:", insn
);
3747 error_for_asm (insn
, "inconsistent operand constraints in an %<asm%>");
3748 /* Avoid further trouble with this insn. */
3749 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3754 /* Jump to `finish' from above if all operands are valid already.
3755 In that case, goal_alternative_win is all 1. */
3758 /* Right now, for any pair of operands I and J that are required to match,
3760 goal_alternative_matches[J] is I.
3761 Set up goal_alternative_matched as the inverse function:
3762 goal_alternative_matched[I] = J. */
3764 for (i
= 0; i
< noperands
; i
++)
3765 goal_alternative_matched
[i
] = -1;
3767 for (i
= 0; i
< noperands
; i
++)
3768 if (! goal_alternative_win
[i
]
3769 && goal_alternative_matches
[i
] >= 0)
3770 goal_alternative_matched
[goal_alternative_matches
[i
]] = i
;
3772 for (i
= 0; i
< noperands
; i
++)
3773 goal_alternative_win
[i
] |= goal_alternative_match_win
[i
];
3775 /* If the best alternative is with operands 1 and 2 swapped,
3776 consider them swapped before reporting the reloads. Update the
3777 operand numbers of any reloads already pushed. */
3779 if (goal_alternative_swapped
)
3783 tem
= substed_operand
[commutative
];
3784 substed_operand
[commutative
] = substed_operand
[commutative
+ 1];
3785 substed_operand
[commutative
+ 1] = tem
;
3786 tem
= recog_data
.operand
[commutative
];
3787 recog_data
.operand
[commutative
] = recog_data
.operand
[commutative
+ 1];
3788 recog_data
.operand
[commutative
+ 1] = tem
;
3789 tem
= *recog_data
.operand_loc
[commutative
];
3790 *recog_data
.operand_loc
[commutative
]
3791 = *recog_data
.operand_loc
[commutative
+ 1];
3792 *recog_data
.operand_loc
[commutative
+ 1] = tem
;
3794 for (i
= 0; i
< n_reloads
; i
++)
3796 if (rld
[i
].opnum
== commutative
)
3797 rld
[i
].opnum
= commutative
+ 1;
3798 else if (rld
[i
].opnum
== commutative
+ 1)
3799 rld
[i
].opnum
= commutative
;
3803 for (i
= 0; i
< noperands
; i
++)
3805 operand_reloadnum
[i
] = -1;
3807 /* If this is an earlyclobber operand, we need to widen the scope.
3808 The reload must remain valid from the start of the insn being
3809 reloaded until after the operand is stored into its destination.
3810 We approximate this with RELOAD_OTHER even though we know that we
3811 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3813 One special case that is worth checking is when we have an
3814 output that is earlyclobber but isn't used past the insn (typically
3815 a SCRATCH). In this case, we only need have the reload live
3816 through the insn itself, but not for any of our input or output
3818 But we must not accidentally narrow the scope of an existing
3819 RELOAD_OTHER reload - leave these alone.
3821 In any case, anything needed to address this operand can remain
3822 however they were previously categorized. */
3824 if (goal_alternative_earlyclobber
[i
] && operand_type
[i
] != RELOAD_OTHER
)
3826 = (find_reg_note (insn
, REG_UNUSED
, recog_data
.operand
[i
])
3827 ? RELOAD_FOR_INSN
: RELOAD_OTHER
);
3830 /* Any constants that aren't allowed and can't be reloaded
3831 into registers are here changed into memory references. */
3832 for (i
= 0; i
< noperands
; i
++)
3833 if (! goal_alternative_win
[i
]
3834 && CONST_POOL_OK_P (recog_data
.operand
[i
])
3835 && ((PREFERRED_RELOAD_CLASS (recog_data
.operand
[i
],
3836 (enum reg_class
) goal_alternative
[i
])
3838 || no_input_reloads
)
3839 && operand_mode
[i
] != VOIDmode
)
3841 int this_address_reloaded
;
3843 this_address_reloaded
= 0;
3844 substed_operand
[i
] = recog_data
.operand
[i
]
3845 = find_reloads_toplev (force_const_mem (operand_mode
[i
],
3846 recog_data
.operand
[i
]),
3847 i
, address_type
[i
], ind_levels
, 0, insn
,
3848 &this_address_reloaded
);
3849 if (alternative_allows_const_pool_ref (this_address_reloaded
== 0
3850 ? substed_operand
[i
]
3852 recog_data
.constraints
[i
],
3853 goal_alternative_number
))
3854 goal_alternative_win
[i
] = 1;
3857 /* Likewise any invalid constants appearing as operand of a PLUS
3858 that is to be reloaded. */
3859 for (i
= 0; i
< noperands
; i
++)
3860 if (! goal_alternative_win
[i
]
3861 && GET_CODE (recog_data
.operand
[i
]) == PLUS
3862 && CONST_POOL_OK_P (XEXP (recog_data
.operand
[i
], 1))
3863 && (PREFERRED_RELOAD_CLASS (XEXP (recog_data
.operand
[i
], 1),
3864 (enum reg_class
) goal_alternative
[i
])
3866 && operand_mode
[i
] != VOIDmode
)
3868 rtx tem
= force_const_mem (operand_mode
[i
],
3869 XEXP (recog_data
.operand
[i
], 1));
3870 tem
= gen_rtx_PLUS (operand_mode
[i
],
3871 XEXP (recog_data
.operand
[i
], 0), tem
);
3873 substed_operand
[i
] = recog_data
.operand
[i
]
3874 = find_reloads_toplev (tem
, i
, address_type
[i
],
3875 ind_levels
, 0, insn
, NULL
);
3878 /* Record the values of the earlyclobber operands for the caller. */
3879 if (goal_earlyclobber
)
3880 for (i
= 0; i
< noperands
; i
++)
3881 if (goal_alternative_earlyclobber
[i
])
3882 reload_earlyclobbers
[n_earlyclobbers
++] = recog_data
.operand
[i
];
3884 /* Now record reloads for all the operands that need them. */
3885 for (i
= 0; i
< noperands
; i
++)
3886 if (! goal_alternative_win
[i
])
3888 /* Operands that match previous ones have already been handled. */
3889 if (goal_alternative_matches
[i
] >= 0)
3891 /* Handle an operand with a nonoffsettable address
3892 appearing where an offsettable address will do
3893 by reloading the address into a base register.
3895 ??? We can also do this when the operand is a register and
3896 reg_equiv_mem is not offsettable, but this is a bit tricky,
3897 so we don't bother with it. It may not be worth doing. */
3898 else if (goal_alternative_matched
[i
] == -1
3899 && goal_alternative_offmemok
[i
]
3900 && MEM_P (recog_data
.operand
[i
]))
3902 /* If the address to be reloaded is a VOIDmode constant,
3903 use Pmode as mode of the reload register, as would have
3904 been done by find_reloads_address. */
3905 enum machine_mode address_mode
;
3906 address_mode
= GET_MODE (XEXP (recog_data
.operand
[i
], 0));
3907 if (address_mode
== VOIDmode
)
3908 address_mode
= Pmode
;
3910 operand_reloadnum
[i
]
3911 = push_reload (XEXP (recog_data
.operand
[i
], 0), NULL_RTX
,
3912 &XEXP (recog_data
.operand
[i
], 0), (rtx
*) 0,
3913 base_reg_class (VOIDmode
, MEM
, SCRATCH
),
3915 VOIDmode
, 0, 0, i
, RELOAD_FOR_INPUT
);
3916 rld
[operand_reloadnum
[i
]].inc
3917 = GET_MODE_SIZE (GET_MODE (recog_data
.operand
[i
]));
3919 /* If this operand is an output, we will have made any
3920 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3921 now we are treating part of the operand as an input, so
3922 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3924 if (modified
[i
] == RELOAD_WRITE
)
3926 for (j
= 0; j
< n_reloads
; j
++)
3928 if (rld
[j
].opnum
== i
)
3930 if (rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
)
3931 rld
[j
].when_needed
= RELOAD_FOR_INPUT_ADDRESS
;
3932 else if (rld
[j
].when_needed
3933 == RELOAD_FOR_OUTADDR_ADDRESS
)
3934 rld
[j
].when_needed
= RELOAD_FOR_INPADDR_ADDRESS
;
3939 else if (goal_alternative_matched
[i
] == -1)
3941 operand_reloadnum
[i
]
3942 = push_reload ((modified
[i
] != RELOAD_WRITE
3943 ? recog_data
.operand
[i
] : 0),
3944 (modified
[i
] != RELOAD_READ
3945 ? recog_data
.operand
[i
] : 0),
3946 (modified
[i
] != RELOAD_WRITE
3947 ? recog_data
.operand_loc
[i
] : 0),
3948 (modified
[i
] != RELOAD_READ
3949 ? recog_data
.operand_loc
[i
] : 0),
3950 (enum reg_class
) goal_alternative
[i
],
3951 (modified
[i
] == RELOAD_WRITE
3952 ? VOIDmode
: operand_mode
[i
]),
3953 (modified
[i
] == RELOAD_READ
3954 ? VOIDmode
: operand_mode
[i
]),
3955 (insn_code_number
< 0 ? 0
3956 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
3957 0, i
, operand_type
[i
]);
3959 /* In a matching pair of operands, one must be input only
3960 and the other must be output only.
3961 Pass the input operand as IN and the other as OUT. */
3962 else if (modified
[i
] == RELOAD_READ
3963 && modified
[goal_alternative_matched
[i
]] == RELOAD_WRITE
)
3965 operand_reloadnum
[i
]
3966 = push_reload (recog_data
.operand
[i
],
3967 recog_data
.operand
[goal_alternative_matched
[i
]],
3968 recog_data
.operand_loc
[i
],
3969 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3970 (enum reg_class
) goal_alternative
[i
],
3972 operand_mode
[goal_alternative_matched
[i
]],
3973 0, 0, i
, RELOAD_OTHER
);
3974 operand_reloadnum
[goal_alternative_matched
[i
]] = output_reloadnum
;
3976 else if (modified
[i
] == RELOAD_WRITE
3977 && modified
[goal_alternative_matched
[i
]] == RELOAD_READ
)
3979 operand_reloadnum
[goal_alternative_matched
[i
]]
3980 = push_reload (recog_data
.operand
[goal_alternative_matched
[i
]],
3981 recog_data
.operand
[i
],
3982 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3983 recog_data
.operand_loc
[i
],
3984 (enum reg_class
) goal_alternative
[i
],
3985 operand_mode
[goal_alternative_matched
[i
]],
3987 0, 0, i
, RELOAD_OTHER
);
3988 operand_reloadnum
[i
] = output_reloadnum
;
3992 gcc_assert (insn_code_number
< 0);
3993 error_for_asm (insn
, "inconsistent operand constraints "
3995 /* Avoid further trouble with this insn. */
3996 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
4001 else if (goal_alternative_matched
[i
] < 0
4002 && goal_alternative_matches
[i
] < 0
4003 && address_operand_reloaded
[i
] != 1
4006 /* For each non-matching operand that's a MEM or a pseudo-register
4007 that didn't get a hard register, make an optional reload.
4008 This may get done even if the insn needs no reloads otherwise. */
4010 rtx operand
= recog_data
.operand
[i
];
4012 while (GET_CODE (operand
) == SUBREG
)
4013 operand
= SUBREG_REG (operand
);
4014 if ((MEM_P (operand
)
4016 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
4017 /* If this is only for an output, the optional reload would not
4018 actually cause us to use a register now, just note that
4019 something is stored here. */
4020 && ((enum reg_class
) goal_alternative
[i
] != NO_REGS
4021 || modified
[i
] == RELOAD_WRITE
)
4022 && ! no_input_reloads
4023 /* An optional output reload might allow to delete INSN later.
4024 We mustn't make in-out reloads on insns that are not permitted
4026 If this is an asm, we can't delete it; we must not even call
4027 push_reload for an optional output reload in this case,
4028 because we can't be sure that the constraint allows a register,
4029 and push_reload verifies the constraints for asms. */
4030 && (modified
[i
] == RELOAD_READ
4031 || (! no_output_reloads
&& ! this_insn_is_asm
)))
4032 operand_reloadnum
[i
]
4033 = push_reload ((modified
[i
] != RELOAD_WRITE
4034 ? recog_data
.operand
[i
] : 0),
4035 (modified
[i
] != RELOAD_READ
4036 ? recog_data
.operand
[i
] : 0),
4037 (modified
[i
] != RELOAD_WRITE
4038 ? recog_data
.operand_loc
[i
] : 0),
4039 (modified
[i
] != RELOAD_READ
4040 ? recog_data
.operand_loc
[i
] : 0),
4041 (enum reg_class
) goal_alternative
[i
],
4042 (modified
[i
] == RELOAD_WRITE
4043 ? VOIDmode
: operand_mode
[i
]),
4044 (modified
[i
] == RELOAD_READ
4045 ? VOIDmode
: operand_mode
[i
]),
4046 (insn_code_number
< 0 ? 0
4047 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
4048 1, i
, operand_type
[i
]);
4049 /* If a memory reference remains (either as a MEM or a pseudo that
4050 did not get a hard register), yet we can't make an optional
4051 reload, check if this is actually a pseudo register reference;
4052 we then need to emit a USE and/or a CLOBBER so that reload
4053 inheritance will do the right thing. */
4057 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
4058 && reg_renumber
[REGNO (operand
)] < 0)))
4060 operand
= *recog_data
.operand_loc
[i
];
4062 while (GET_CODE (operand
) == SUBREG
)
4063 operand
= SUBREG_REG (operand
);
4064 if (REG_P (operand
))
4066 if (modified
[i
] != RELOAD_WRITE
)
4067 /* We mark the USE with QImode so that we recognize
4068 it as one that can be safely deleted at the end
4070 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, operand
),
4072 if (modified
[i
] != RELOAD_READ
)
4073 emit_insn_after (gen_rtx_CLOBBER (VOIDmode
, operand
), insn
);
4077 else if (goal_alternative_matches
[i
] >= 0
4078 && goal_alternative_win
[goal_alternative_matches
[i
]]
4079 && modified
[i
] == RELOAD_READ
4080 && modified
[goal_alternative_matches
[i
]] == RELOAD_WRITE
4081 && ! no_input_reloads
&& ! no_output_reloads
4084 /* Similarly, make an optional reload for a pair of matching
4085 objects that are in MEM or a pseudo that didn't get a hard reg. */
4087 rtx operand
= recog_data
.operand
[i
];
4089 while (GET_CODE (operand
) == SUBREG
)
4090 operand
= SUBREG_REG (operand
);
4091 if ((MEM_P (operand
)
4093 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
4094 && ((enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]]
4096 operand_reloadnum
[i
] = operand_reloadnum
[goal_alternative_matches
[i
]]
4097 = push_reload (recog_data
.operand
[goal_alternative_matches
[i
]],
4098 recog_data
.operand
[i
],
4099 recog_data
.operand_loc
[goal_alternative_matches
[i
]],
4100 recog_data
.operand_loc
[i
],
4101 (enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]],
4102 operand_mode
[goal_alternative_matches
[i
]],
4104 0, 1, goal_alternative_matches
[i
], RELOAD_OTHER
);
4107 /* Perform whatever substitutions on the operands we are supposed
4108 to make due to commutativity or replacement of registers
4109 with equivalent constants or memory slots. */
4111 for (i
= 0; i
< noperands
; i
++)
4113 /* We only do this on the last pass through reload, because it is
4114 possible for some data (like reg_equiv_address) to be changed during
4115 later passes. Moreover, we lose the opportunity to get a useful
4116 reload_{in,out}_reg when we do these replacements. */
4120 rtx substitution
= substed_operand
[i
];
4122 *recog_data
.operand_loc
[i
] = substitution
;
4124 /* If we're replacing an operand with a LABEL_REF, we need to
4125 make sure that there's a REG_LABEL_OPERAND note attached to
4126 this instruction. */
4127 if (GET_CODE (substitution
) == LABEL_REF
4128 && !find_reg_note (insn
, REG_LABEL_OPERAND
,
4129 XEXP (substitution
, 0))
4130 /* For a JUMP_P, if it was a branch target it must have
4131 already been recorded as such. */
4133 || !label_is_jump_target_p (XEXP (substitution
, 0),
4135 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_LABEL_OPERAND
,
4136 XEXP (substitution
, 0),
4140 retval
|= (substed_operand
[i
] != *recog_data
.operand_loc
[i
]);
4143 /* If this insn pattern contains any MATCH_DUP's, make sure that
4144 they will be substituted if the operands they match are substituted.
4145 Also do now any substitutions we already did on the operands.
4147 Don't do this if we aren't making replacements because we might be
4148 propagating things allocated by frame pointer elimination into places
4149 it doesn't expect. */
4151 if (insn_code_number
>= 0 && replace
)
4152 for (i
= insn_data
[insn_code_number
].n_dups
- 1; i
>= 0; i
--)
4154 int opno
= recog_data
.dup_num
[i
];
4155 *recog_data
.dup_loc
[i
] = *recog_data
.operand_loc
[opno
];
4156 dup_replacements (recog_data
.dup_loc
[i
], recog_data
.operand_loc
[opno
]);
4160 /* This loses because reloading of prior insns can invalidate the equivalence
4161 (or at least find_equiv_reg isn't smart enough to find it any more),
4162 causing this insn to need more reload regs than it needed before.
4163 It may be too late to make the reload regs available.
4164 Now this optimization is done safely in choose_reload_regs. */
4166 /* For each reload of a reg into some other class of reg,
4167 search for an existing equivalent reg (same value now) in the right class.
4168 We can use it as long as we don't need to change its contents. */
4169 for (i
= 0; i
< n_reloads
; i
++)
4170 if (rld
[i
].reg_rtx
== 0
4172 && REG_P (rld
[i
].in
)
4176 = find_equiv_reg (rld
[i
].in
, insn
, rld
[i
].class, -1,
4177 static_reload_reg_p
, 0, rld
[i
].inmode
);
4178 /* Prevent generation of insn to load the value
4179 because the one we found already has the value. */
4181 rld
[i
].in
= rld
[i
].reg_rtx
;
4185 /* If we detected error and replaced asm instruction by USE, forget about the
4187 if (GET_CODE (PATTERN (insn
)) == USE
4188 && GET_CODE (XEXP (PATTERN (insn
), 0)) == CONST_INT
)
4191 /* Perhaps an output reload can be combined with another
4192 to reduce needs by one. */
4193 if (!goal_earlyclobber
)
4196 /* If we have a pair of reloads for parts of an address, they are reloading
4197 the same object, the operands themselves were not reloaded, and they
4198 are for two operands that are supposed to match, merge the reloads and
4199 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
4201 for (i
= 0; i
< n_reloads
; i
++)
4205 for (j
= i
+ 1; j
< n_reloads
; j
++)
4206 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4207 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4208 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4209 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4210 && (rld
[j
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4211 || rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4212 || rld
[j
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4213 || rld
[j
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4214 && rtx_equal_p (rld
[i
].in
, rld
[j
].in
)
4215 && (operand_reloadnum
[rld
[i
].opnum
] < 0
4216 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
)
4217 && (operand_reloadnum
[rld
[j
].opnum
] < 0
4218 || rld
[operand_reloadnum
[rld
[j
].opnum
]].optional
)
4219 && (goal_alternative_matches
[rld
[i
].opnum
] == rld
[j
].opnum
4220 || (goal_alternative_matches
[rld
[j
].opnum
]
4223 for (k
= 0; k
< n_replacements
; k
++)
4224 if (replacements
[k
].what
== j
)
4225 replacements
[k
].what
= i
;
4227 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4228 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4229 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4231 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
4236 /* Scan all the reloads and update their type.
4237 If a reload is for the address of an operand and we didn't reload
4238 that operand, change the type. Similarly, change the operand number
4239 of a reload when two operands match. If a reload is optional, treat it
4240 as though the operand isn't reloaded.
4242 ??? This latter case is somewhat odd because if we do the optional
4243 reload, it means the object is hanging around. Thus we need only
4244 do the address reload if the optional reload was NOT done.
4246 Change secondary reloads to be the address type of their operand, not
4249 If an operand's reload is now RELOAD_OTHER, change any
4250 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4251 RELOAD_FOR_OTHER_ADDRESS. */
4253 for (i
= 0; i
< n_reloads
; i
++)
4255 if (rld
[i
].secondary_p
4256 && rld
[i
].when_needed
== operand_type
[rld
[i
].opnum
])
4257 rld
[i
].when_needed
= address_type
[rld
[i
].opnum
];
4259 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4260 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4261 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4262 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4263 && (operand_reloadnum
[rld
[i
].opnum
] < 0
4264 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
))
4266 /* If we have a secondary reload to go along with this reload,
4267 change its type to RELOAD_FOR_OPADDR_ADDR. */
4269 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4270 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
4271 && rld
[i
].secondary_in_reload
!= -1)
4273 int secondary_in_reload
= rld
[i
].secondary_in_reload
;
4275 rld
[secondary_in_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4277 /* If there's a tertiary reload we have to change it also. */
4278 if (secondary_in_reload
> 0
4279 && rld
[secondary_in_reload
].secondary_in_reload
!= -1)
4280 rld
[rld
[secondary_in_reload
].secondary_in_reload
].when_needed
4281 = RELOAD_FOR_OPADDR_ADDR
;
4284 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4285 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4286 && rld
[i
].secondary_out_reload
!= -1)
4288 int secondary_out_reload
= rld
[i
].secondary_out_reload
;
4290 rld
[secondary_out_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4292 /* If there's a tertiary reload we have to change it also. */
4293 if (secondary_out_reload
4294 && rld
[secondary_out_reload
].secondary_out_reload
!= -1)
4295 rld
[rld
[secondary_out_reload
].secondary_out_reload
].when_needed
4296 = RELOAD_FOR_OPADDR_ADDR
;
4299 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4300 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4301 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4303 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
4306 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4307 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
4308 && operand_reloadnum
[rld
[i
].opnum
] >= 0
4309 && (rld
[operand_reloadnum
[rld
[i
].opnum
]].when_needed
4311 rld
[i
].when_needed
= RELOAD_FOR_OTHER_ADDRESS
;
4313 if (goal_alternative_matches
[rld
[i
].opnum
] >= 0)
4314 rld
[i
].opnum
= goal_alternative_matches
[rld
[i
].opnum
];
4317 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4318 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4319 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4321 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4322 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4323 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4324 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4325 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4326 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4327 This is complicated by the fact that a single operand can have more
4328 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4329 choose_reload_regs without affecting code quality, and cases that
4330 actually fail are extremely rare, so it turns out to be better to fix
4331 the problem here by not generating cases that choose_reload_regs will
4333 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4334 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4336 We can reduce the register pressure by exploiting that a
4337 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4338 does not conflict with any of them, if it is only used for the first of
4339 the RELOAD_FOR_X_ADDRESS reloads. */
4341 int first_op_addr_num
= -2;
4342 int first_inpaddr_num
[MAX_RECOG_OPERANDS
];
4343 int first_outpaddr_num
[MAX_RECOG_OPERANDS
];
4344 int need_change
= 0;
4345 /* We use last_op_addr_reload and the contents of the above arrays
4346 first as flags - -2 means no instance encountered, -1 means exactly
4347 one instance encountered.
4348 If more than one instance has been encountered, we store the reload
4349 number of the first reload of the kind in question; reload numbers
4350 are known to be non-negative. */
4351 for (i
= 0; i
< noperands
; i
++)
4352 first_inpaddr_num
[i
] = first_outpaddr_num
[i
] = -2;
4353 for (i
= n_reloads
- 1; i
>= 0; i
--)
4355 switch (rld
[i
].when_needed
)
4357 case RELOAD_FOR_OPERAND_ADDRESS
:
4358 if (++first_op_addr_num
>= 0)
4360 first_op_addr_num
= i
;
4364 case RELOAD_FOR_INPUT_ADDRESS
:
4365 if (++first_inpaddr_num
[rld
[i
].opnum
] >= 0)
4367 first_inpaddr_num
[rld
[i
].opnum
] = i
;
4371 case RELOAD_FOR_OUTPUT_ADDRESS
:
4372 if (++first_outpaddr_num
[rld
[i
].opnum
] >= 0)
4374 first_outpaddr_num
[rld
[i
].opnum
] = i
;
4385 for (i
= 0; i
< n_reloads
; i
++)
4388 enum reload_type type
;
4390 switch (rld
[i
].when_needed
)
4392 case RELOAD_FOR_OPADDR_ADDR
:
4393 first_num
= first_op_addr_num
;
4394 type
= RELOAD_FOR_OPERAND_ADDRESS
;
4396 case RELOAD_FOR_INPADDR_ADDRESS
:
4397 first_num
= first_inpaddr_num
[rld
[i
].opnum
];
4398 type
= RELOAD_FOR_INPUT_ADDRESS
;
4400 case RELOAD_FOR_OUTADDR_ADDRESS
:
4401 first_num
= first_outpaddr_num
[rld
[i
].opnum
];
4402 type
= RELOAD_FOR_OUTPUT_ADDRESS
;
4409 else if (i
> first_num
)
4410 rld
[i
].when_needed
= type
;
4413 /* Check if the only TYPE reload that uses reload I is
4414 reload FIRST_NUM. */
4415 for (j
= n_reloads
- 1; j
> first_num
; j
--)
4417 if (rld
[j
].when_needed
== type
4418 && (rld
[i
].secondary_p
4419 ? rld
[j
].secondary_in_reload
== i
4420 : reg_mentioned_p (rld
[i
].in
, rld
[j
].in
)))
4422 rld
[i
].when_needed
= type
;
4431 /* See if we have any reloads that are now allowed to be merged
4432 because we've changed when the reload is needed to
4433 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4434 check for the most common cases. */
4436 for (i
= 0; i
< n_reloads
; i
++)
4437 if (rld
[i
].in
!= 0 && rld
[i
].out
== 0
4438 && (rld
[i
].when_needed
== RELOAD_FOR_OPERAND_ADDRESS
4439 || rld
[i
].when_needed
== RELOAD_FOR_OPADDR_ADDR
4440 || rld
[i
].when_needed
== RELOAD_FOR_OTHER_ADDRESS
))
4441 for (j
= 0; j
< n_reloads
; j
++)
4442 if (i
!= j
&& rld
[j
].in
!= 0 && rld
[j
].out
== 0
4443 && rld
[j
].when_needed
== rld
[i
].when_needed
4444 && MATCHES (rld
[i
].in
, rld
[j
].in
)
4445 && rld
[i
].class == rld
[j
].class
4446 && !rld
[i
].nocombine
&& !rld
[j
].nocombine
4447 && rld
[i
].reg_rtx
== rld
[j
].reg_rtx
)
4449 rld
[i
].opnum
= MIN (rld
[i
].opnum
, rld
[j
].opnum
);
4450 transfer_replacements (i
, j
);
4455 /* If we made any reloads for addresses, see if they violate a
4456 "no input reloads" requirement for this insn. But loads that we
4457 do after the insn (such as for output addresses) are fine. */
4458 if (no_input_reloads
)
4459 for (i
= 0; i
< n_reloads
; i
++)
4460 gcc_assert (rld
[i
].in
== 0
4461 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
4462 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
);
4465 /* Compute reload_mode and reload_nregs. */
4466 for (i
= 0; i
< n_reloads
; i
++)
4469 = (rld
[i
].inmode
== VOIDmode
4470 || (GET_MODE_SIZE (rld
[i
].outmode
)
4471 > GET_MODE_SIZE (rld
[i
].inmode
)))
4472 ? rld
[i
].outmode
: rld
[i
].inmode
;
4474 rld
[i
].nregs
= CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].mode
);
4477 /* Special case a simple move with an input reload and a
4478 destination of a hard reg, if the hard reg is ok, use it. */
4479 for (i
= 0; i
< n_reloads
; i
++)
4480 if (rld
[i
].when_needed
== RELOAD_FOR_INPUT
4481 && GET_CODE (PATTERN (insn
)) == SET
4482 && REG_P (SET_DEST (PATTERN (insn
)))
4483 && (SET_SRC (PATTERN (insn
)) == rld
[i
].in
4484 || SET_SRC (PATTERN (insn
)) == rld
[i
].in_reg
)
4485 && !elimination_target_reg_p (SET_DEST (PATTERN (insn
))))
4487 rtx dest
= SET_DEST (PATTERN (insn
));
4488 unsigned int regno
= REGNO (dest
);
4490 if (regno
< FIRST_PSEUDO_REGISTER
4491 && TEST_HARD_REG_BIT (reg_class_contents
[rld
[i
].class], regno
)
4492 && HARD_REGNO_MODE_OK (regno
, rld
[i
].mode
))
4494 int nr
= hard_regno_nregs
[regno
][rld
[i
].mode
];
4497 for (nri
= 1; nri
< nr
; nri
++)
4498 if (! TEST_HARD_REG_BIT (reg_class_contents
[rld
[i
].class], regno
+ nri
))
4502 rld
[i
].reg_rtx
= dest
;
4509 /* Return true if alternative number ALTNUM in constraint-string
4510 CONSTRAINT is guaranteed to accept a reloaded constant-pool reference.
4511 MEM gives the reference if it didn't need any reloads, otherwise it
4515 alternative_allows_const_pool_ref (rtx mem
, const char *constraint
, int altnum
)
4519 /* Skip alternatives before the one requested. */
4522 while (*constraint
++ != ',');
4525 /* Scan the requested alternative for 'm' or 'o'.
4526 If one of them is present, this alternative accepts the result of
4527 passing a constant-pool reference through find_reloads_toplev.
4529 The same is true of extra memory constraints if the address
4530 was reloaded into a register. However, the target may elect
4531 to disallow the original constant address, forcing it to be
4532 reloaded into a register instead. */
4533 for (; (c
= *constraint
) && c
!= ',' && c
!= '#';
4534 constraint
+= CONSTRAINT_LEN (c
, constraint
))
4536 if (c
== 'm' || c
== 'o')
4538 #ifdef EXTRA_CONSTRAINT_STR
4539 if (EXTRA_MEMORY_CONSTRAINT (c
, constraint
)
4540 && (mem
== NULL
|| EXTRA_CONSTRAINT_STR (mem
, c
, constraint
)))
4547 /* Scan X for memory references and scan the addresses for reloading.
4548 Also checks for references to "constant" regs that we want to eliminate
4549 and replaces them with the values they stand for.
4550 We may alter X destructively if it contains a reference to such.
4551 If X is just a constant reg, we return the equivalent value
4554 IND_LEVELS says how many levels of indirect addressing this machine
4557 OPNUM and TYPE identify the purpose of the reload.
4559 IS_SET_DEST is true if X is the destination of a SET, which is not
4560 appropriate to be replaced by a constant.
4562 INSN, if nonzero, is the insn in which we do the reload. It is used
4563 to determine if we may generate output reloads, and where to put USEs
4564 for pseudos that we have to replace with stack slots.
4566 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4567 result of find_reloads_address. */
4570 find_reloads_toplev (rtx x
, int opnum
, enum reload_type type
,
4571 int ind_levels
, int is_set_dest
, rtx insn
,
4572 int *address_reloaded
)
4574 RTX_CODE code
= GET_CODE (x
);
4576 const char *fmt
= GET_RTX_FORMAT (code
);
4582 /* This code is duplicated for speed in find_reloads. */
4583 int regno
= REGNO (x
);
4584 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
4585 x
= reg_equiv_constant
[regno
];
4587 /* This creates (subreg (mem...)) which would cause an unnecessary
4588 reload of the mem. */
4589 else if (reg_equiv_mem
[regno
] != 0)
4590 x
= reg_equiv_mem
[regno
];
4592 else if (reg_equiv_memory_loc
[regno
]
4593 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
4595 rtx mem
= make_memloc (x
, regno
);
4596 if (reg_equiv_address
[regno
]
4597 || ! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
4599 /* If this is not a toplevel operand, find_reloads doesn't see
4600 this substitution. We have to emit a USE of the pseudo so
4601 that delete_output_reload can see it. */
4602 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
4603 /* We mark the USE with QImode so that we recognize it
4604 as one that can be safely deleted at the end of
4606 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, x
), insn
),
4609 i
= find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0), &XEXP (x
, 0),
4610 opnum
, type
, ind_levels
, insn
);
4611 if (!rtx_equal_p (x
, mem
))
4612 push_reg_equiv_alt_mem (regno
, x
);
4613 if (address_reloaded
)
4614 *address_reloaded
= i
;
4623 i
= find_reloads_address (GET_MODE (x
), &tem
, XEXP (x
, 0), &XEXP (x
, 0),
4624 opnum
, type
, ind_levels
, insn
);
4625 if (address_reloaded
)
4626 *address_reloaded
= i
;
4631 if (code
== SUBREG
&& REG_P (SUBREG_REG (x
)))
4633 /* Check for SUBREG containing a REG that's equivalent to a
4634 constant. If the constant has a known value, truncate it
4635 right now. Similarly if we are extracting a single-word of a
4636 multi-word constant. If the constant is symbolic, allow it
4637 to be substituted normally. push_reload will strip the
4638 subreg later. The constant must not be VOIDmode, because we
4639 will lose the mode of the register (this should never happen
4640 because one of the cases above should handle it). */
4642 int regno
= REGNO (SUBREG_REG (x
));
4645 if (regno
>= FIRST_PSEUDO_REGISTER
4646 && reg_renumber
[regno
] < 0
4647 && reg_equiv_constant
[regno
] != 0)
4650 simplify_gen_subreg (GET_MODE (x
), reg_equiv_constant
[regno
],
4651 GET_MODE (SUBREG_REG (x
)), SUBREG_BYTE (x
));
4653 if (CONSTANT_P (tem
) && !LEGITIMATE_CONSTANT_P (tem
))
4655 tem
= force_const_mem (GET_MODE (x
), tem
);
4656 i
= find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
4657 &XEXP (tem
, 0), opnum
, type
,
4659 if (address_reloaded
)
4660 *address_reloaded
= i
;
4665 /* If the subreg contains a reg that will be converted to a mem,
4666 convert the subreg to a narrower memref now.
4667 Otherwise, we would get (subreg (mem ...) ...),
4668 which would force reload of the mem.
4670 We also need to do this if there is an equivalent MEM that is
4671 not offsettable. In that case, alter_subreg would produce an
4672 invalid address on big-endian machines.
4674 For machines that extend byte loads, we must not reload using
4675 a wider mode if we have a paradoxical SUBREG. find_reloads will
4676 force a reload in that case. So we should not do anything here. */
4678 if (regno
>= FIRST_PSEUDO_REGISTER
4679 #ifdef LOAD_EXTEND_OP
4680 && (GET_MODE_SIZE (GET_MODE (x
))
4681 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4683 && (reg_equiv_address
[regno
] != 0
4684 || (reg_equiv_mem
[regno
] != 0
4685 && (! strict_memory_address_p (GET_MODE (x
),
4686 XEXP (reg_equiv_mem
[regno
], 0))
4687 || ! offsettable_memref_p (reg_equiv_mem
[regno
])
4688 || num_not_at_initial_offset
))))
4689 x
= find_reloads_subreg_address (x
, 1, opnum
, type
, ind_levels
,
4693 for (copied
= 0, i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4697 rtx new_part
= find_reloads_toplev (XEXP (x
, i
), opnum
, type
,
4698 ind_levels
, is_set_dest
, insn
,
4700 /* If we have replaced a reg with it's equivalent memory loc -
4701 that can still be handled here e.g. if it's in a paradoxical
4702 subreg - we must make the change in a copy, rather than using
4703 a destructive change. This way, find_reloads can still elect
4704 not to do the change. */
4705 if (new_part
!= XEXP (x
, i
) && ! CONSTANT_P (new_part
) && ! copied
)
4707 x
= shallow_copy_rtx (x
);
4710 XEXP (x
, i
) = new_part
;
4716 /* Return a mem ref for the memory equivalent of reg REGNO.
4717 This mem ref is not shared with anything. */
4720 make_memloc (rtx ad
, int regno
)
4722 /* We must rerun eliminate_regs, in case the elimination
4723 offsets have changed. */
4725 = XEXP (eliminate_regs (reg_equiv_memory_loc
[regno
], 0, NULL_RTX
), 0);
4727 /* If TEM might contain a pseudo, we must copy it to avoid
4728 modifying it when we do the substitution for the reload. */
4729 if (rtx_varies_p (tem
, 0))
4730 tem
= copy_rtx (tem
);
4732 tem
= replace_equiv_address_nv (reg_equiv_memory_loc
[regno
], tem
);
4733 tem
= adjust_address_nv (tem
, GET_MODE (ad
), 0);
4735 /* Copy the result if it's still the same as the equivalence, to avoid
4736 modifying it when we do the substitution for the reload. */
4737 if (tem
== reg_equiv_memory_loc
[regno
])
4738 tem
= copy_rtx (tem
);
4742 /* Returns true if AD could be turned into a valid memory reference
4743 to mode MODE by reloading the part pointed to by PART into a
4747 maybe_memory_address_p (enum machine_mode mode
, rtx ad
, rtx
*part
)
4751 rtx reg
= gen_rtx_REG (GET_MODE (tem
), max_reg_num ());
4754 retv
= memory_address_p (mode
, ad
);
4760 /* Record all reloads needed for handling memory address AD
4761 which appears in *LOC in a memory reference to mode MODE
4762 which itself is found in location *MEMREFLOC.
4763 Note that we take shortcuts assuming that no multi-reg machine mode
4764 occurs as part of an address.
4766 OPNUM and TYPE specify the purpose of this reload.
4768 IND_LEVELS says how many levels of indirect addressing this machine
4771 INSN, if nonzero, is the insn in which we do the reload. It is used
4772 to determine if we may generate output reloads, and where to put USEs
4773 for pseudos that we have to replace with stack slots.
4775 Value is one if this address is reloaded or replaced as a whole; it is
4776 zero if the top level of this address was not reloaded or replaced, and
4777 it is -1 if it may or may not have been reloaded or replaced.
4779 Note that there is no verification that the address will be valid after
4780 this routine does its work. Instead, we rely on the fact that the address
4781 was valid when reload started. So we need only undo things that reload
4782 could have broken. These are wrong register types, pseudos not allocated
4783 to a hard register, and frame pointer elimination. */
4786 find_reloads_address (enum machine_mode mode
, rtx
*memrefloc
, rtx ad
,
4787 rtx
*loc
, int opnum
, enum reload_type type
,
4788 int ind_levels
, rtx insn
)
4791 int removed_and
= 0;
4795 /* If the address is a register, see if it is a legitimate address and
4796 reload if not. We first handle the cases where we need not reload
4797 or where we must reload in a non-standard way. */
4803 if (reg_equiv_constant
[regno
] != 0)
4805 find_reloads_address_part (reg_equiv_constant
[regno
], loc
,
4806 base_reg_class (mode
, MEM
, SCRATCH
),
4807 GET_MODE (ad
), opnum
, type
, ind_levels
);
4811 tem
= reg_equiv_memory_loc
[regno
];
4814 if (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
)
4816 tem
= make_memloc (ad
, regno
);
4817 if (! strict_memory_address_p (GET_MODE (tem
), XEXP (tem
, 0)))
4821 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
4822 &XEXP (tem
, 0), opnum
,
4823 ADDR_TYPE (type
), ind_levels
, insn
);
4824 if (!rtx_equal_p (tem
, orig
))
4825 push_reg_equiv_alt_mem (regno
, tem
);
4827 /* We can avoid a reload if the register's equivalent memory
4828 expression is valid as an indirect memory address.
4829 But not all addresses are valid in a mem used as an indirect
4830 address: only reg or reg+constant. */
4833 && strict_memory_address_p (mode
, tem
)
4834 && (REG_P (XEXP (tem
, 0))
4835 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4836 && REG_P (XEXP (XEXP (tem
, 0), 0))
4837 && CONSTANT_P (XEXP (XEXP (tem
, 0), 1)))))
4839 /* TEM is not the same as what we'll be replacing the
4840 pseudo with after reload, put a USE in front of INSN
4841 in the final reload pass. */
4843 && num_not_at_initial_offset
4844 && ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
4847 /* We mark the USE with QImode so that we
4848 recognize it as one that can be safely
4849 deleted at the end of reload. */
4850 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, ad
),
4853 /* This doesn't really count as replacing the address
4854 as a whole, since it is still a memory access. */
4862 /* The only remaining case where we can avoid a reload is if this is a
4863 hard register that is valid as a base register and which is not the
4864 subject of a CLOBBER in this insn. */
4866 else if (regno
< FIRST_PSEUDO_REGISTER
4867 && regno_ok_for_base_p (regno
, mode
, MEM
, SCRATCH
)
4868 && ! regno_clobbered_p (regno
, this_insn
, mode
, 0))
4871 /* If we do not have one of the cases above, we must do the reload. */
4872 push_reload (ad
, NULL_RTX
, loc
, (rtx
*) 0, base_reg_class (mode
, MEM
, SCRATCH
),
4873 GET_MODE (ad
), VOIDmode
, 0, 0, opnum
, type
);
4877 if (strict_memory_address_p (mode
, ad
))
4879 /* The address appears valid, so reloads are not needed.
4880 But the address may contain an eliminable register.
4881 This can happen because a machine with indirect addressing
4882 may consider a pseudo register by itself a valid address even when
4883 it has failed to get a hard reg.
4884 So do a tree-walk to find and eliminate all such regs. */
4886 /* But first quickly dispose of a common case. */
4887 if (GET_CODE (ad
) == PLUS
4888 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
4889 && REG_P (XEXP (ad
, 0))
4890 && reg_equiv_constant
[REGNO (XEXP (ad
, 0))] == 0)
4893 subst_reg_equivs_changed
= 0;
4894 *loc
= subst_reg_equivs (ad
, insn
);
4896 if (! subst_reg_equivs_changed
)
4899 /* Check result for validity after substitution. */
4900 if (strict_memory_address_p (mode
, ad
))
4904 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4909 LEGITIMIZE_RELOAD_ADDRESS (ad
, GET_MODE (*memrefloc
), opnum
, type
,
4914 *memrefloc
= copy_rtx (*memrefloc
);
4915 XEXP (*memrefloc
, 0) = ad
;
4916 move_replacements (&ad
, &XEXP (*memrefloc
, 0));
4922 /* The address is not valid. We have to figure out why. First see if
4923 we have an outer AND and remove it if so. Then analyze what's inside. */
4925 if (GET_CODE (ad
) == AND
)
4928 loc
= &XEXP (ad
, 0);
4932 /* One possibility for why the address is invalid is that it is itself
4933 a MEM. This can happen when the frame pointer is being eliminated, a
4934 pseudo is not allocated to a hard register, and the offset between the
4935 frame and stack pointers is not its initial value. In that case the
4936 pseudo will have been replaced by a MEM referring to the
4940 /* First ensure that the address in this MEM is valid. Then, unless
4941 indirect addresses are valid, reload the MEM into a register. */
4943 find_reloads_address (GET_MODE (ad
), &tem
, XEXP (ad
, 0), &XEXP (ad
, 0),
4944 opnum
, ADDR_TYPE (type
),
4945 ind_levels
== 0 ? 0 : ind_levels
- 1, insn
);
4947 /* If tem was changed, then we must create a new memory reference to
4948 hold it and store it back into memrefloc. */
4949 if (tem
!= ad
&& memrefloc
)
4951 *memrefloc
= copy_rtx (*memrefloc
);
4952 copy_replacements (tem
, XEXP (*memrefloc
, 0));
4953 loc
= &XEXP (*memrefloc
, 0);
4955 loc
= &XEXP (*loc
, 0);
4958 /* Check similar cases as for indirect addresses as above except
4959 that we can allow pseudos and a MEM since they should have been
4960 taken care of above. */
4963 || (GET_CODE (XEXP (tem
, 0)) == SYMBOL_REF
&& ! indirect_symref_ok
)
4964 || MEM_P (XEXP (tem
, 0))
4965 || ! (REG_P (XEXP (tem
, 0))
4966 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4967 && REG_P (XEXP (XEXP (tem
, 0), 0))
4968 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)))
4970 /* Must use TEM here, not AD, since it is the one that will
4971 have any subexpressions reloaded, if needed. */
4972 push_reload (tem
, NULL_RTX
, loc
, (rtx
*) 0,
4973 base_reg_class (mode
, MEM
, SCRATCH
), GET_MODE (tem
),
4976 return ! removed_and
;
4982 /* If we have address of a stack slot but it's not valid because the
4983 displacement is too large, compute the sum in a register.
4984 Handle all base registers here, not just fp/ap/sp, because on some
4985 targets (namely SH) we can also get too large displacements from
4986 big-endian corrections. */
4987 else if (GET_CODE (ad
) == PLUS
4988 && REG_P (XEXP (ad
, 0))
4989 && REGNO (XEXP (ad
, 0)) < FIRST_PSEUDO_REGISTER
4990 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
4991 && regno_ok_for_base_p (REGNO (XEXP (ad
, 0)), mode
, PLUS
,
4995 /* Unshare the MEM rtx so we can safely alter it. */
4998 *memrefloc
= copy_rtx (*memrefloc
);
4999 loc
= &XEXP (*memrefloc
, 0);
5001 loc
= &XEXP (*loc
, 0);
5004 if (double_reg_address_ok
)
5006 /* Unshare the sum as well. */
5007 *loc
= ad
= copy_rtx (ad
);
5009 /* Reload the displacement into an index reg.
5010 We assume the frame pointer or arg pointer is a base reg. */
5011 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
5012 INDEX_REG_CLASS
, GET_MODE (ad
), opnum
,
5018 /* If the sum of two regs is not necessarily valid,
5019 reload the sum into a base reg.
5020 That will at least work. */
5021 find_reloads_address_part (ad
, loc
,
5022 base_reg_class (mode
, MEM
, SCRATCH
),
5023 Pmode
, opnum
, type
, ind_levels
);
5025 return ! removed_and
;
5028 /* If we have an indexed stack slot, there are three possible reasons why
5029 it might be invalid: The index might need to be reloaded, the address
5030 might have been made by frame pointer elimination and hence have a
5031 constant out of range, or both reasons might apply.
5033 We can easily check for an index needing reload, but even if that is the
5034 case, we might also have an invalid constant. To avoid making the
5035 conservative assumption and requiring two reloads, we see if this address
5036 is valid when not interpreted strictly. If it is, the only problem is
5037 that the index needs a reload and find_reloads_address_1 will take care
5040 Handle all base registers here, not just fp/ap/sp, because on some
5041 targets (namely SPARC) we can also get invalid addresses from preventive
5042 subreg big-endian corrections made by find_reloads_toplev. We
5043 can also get expressions involving LO_SUM (rather than PLUS) from
5044 find_reloads_subreg_address.
5046 If we decide to do something, it must be that `double_reg_address_ok'
5047 is true. We generate a reload of the base register + constant and
5048 rework the sum so that the reload register will be added to the index.
5049 This is safe because we know the address isn't shared.
5051 We check for the base register as both the first and second operand of
5052 the innermost PLUS and/or LO_SUM. */
5054 for (op_index
= 0; op_index
< 2; ++op_index
)
5056 rtx operand
, addend
;
5057 enum rtx_code inner_code
;
5059 if (GET_CODE (ad
) != PLUS
)
5062 inner_code
= GET_CODE (XEXP (ad
, 0));
5063 if (!(GET_CODE (ad
) == PLUS
5064 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
5065 && (inner_code
== PLUS
|| inner_code
== LO_SUM
)))
5068 operand
= XEXP (XEXP (ad
, 0), op_index
);
5069 if (!REG_P (operand
) || REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
5072 addend
= XEXP (XEXP (ad
, 0), 1 - op_index
);
5074 if ((regno_ok_for_base_p (REGNO (operand
), mode
, inner_code
,
5076 || operand
== frame_pointer_rtx
5077 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
5078 || operand
== hard_frame_pointer_rtx
5080 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
5081 || operand
== arg_pointer_rtx
5083 || operand
== stack_pointer_rtx
)
5084 && ! maybe_memory_address_p (mode
, ad
,
5085 &XEXP (XEXP (ad
, 0), 1 - op_index
)))
5090 offset_reg
= plus_constant (operand
, INTVAL (XEXP (ad
, 1)));
5092 /* Form the adjusted address. */
5093 if (GET_CODE (XEXP (ad
, 0)) == PLUS
)
5094 ad
= gen_rtx_PLUS (GET_MODE (ad
),
5095 op_index
== 0 ? offset_reg
: addend
,
5096 op_index
== 0 ? addend
: offset_reg
);
5098 ad
= gen_rtx_LO_SUM (GET_MODE (ad
),
5099 op_index
== 0 ? offset_reg
: addend
,
5100 op_index
== 0 ? addend
: offset_reg
);
5103 cls
= base_reg_class (mode
, MEM
, GET_CODE (addend
));
5104 find_reloads_address_part (XEXP (ad
, op_index
),
5105 &XEXP (ad
, op_index
), cls
,
5106 GET_MODE (ad
), opnum
, type
, ind_levels
);
5107 find_reloads_address_1 (mode
,
5108 XEXP (ad
, 1 - op_index
), 1, GET_CODE (ad
),
5109 GET_CODE (XEXP (ad
, op_index
)),
5110 &XEXP (ad
, 1 - op_index
), opnum
,
5117 /* See if address becomes valid when an eliminable register
5118 in a sum is replaced. */
5121 if (GET_CODE (ad
) == PLUS
)
5122 tem
= subst_indexed_address (ad
);
5123 if (tem
!= ad
&& strict_memory_address_p (mode
, tem
))
5125 /* Ok, we win that way. Replace any additional eliminable
5128 subst_reg_equivs_changed
= 0;
5129 tem
= subst_reg_equivs (tem
, insn
);
5131 /* Make sure that didn't make the address invalid again. */
5133 if (! subst_reg_equivs_changed
|| strict_memory_address_p (mode
, tem
))
5140 /* If constants aren't valid addresses, reload the constant address
5142 if (CONSTANT_P (ad
) && ! strict_memory_address_p (mode
, ad
))
5144 /* If AD is an address in the constant pool, the MEM rtx may be shared.
5145 Unshare it so we can safely alter it. */
5146 if (memrefloc
&& GET_CODE (ad
) == SYMBOL_REF
5147 && CONSTANT_POOL_ADDRESS_P (ad
))
5149 *memrefloc
= copy_rtx (*memrefloc
);
5150 loc
= &XEXP (*memrefloc
, 0);
5152 loc
= &XEXP (*loc
, 0);
5155 find_reloads_address_part (ad
, loc
, base_reg_class (mode
, MEM
, SCRATCH
),
5156 Pmode
, opnum
, type
, ind_levels
);
5157 return ! removed_and
;
5160 return find_reloads_address_1 (mode
, ad
, 0, MEM
, SCRATCH
, loc
, opnum
, type
,
5164 /* Find all pseudo regs appearing in AD
5165 that are eliminable in favor of equivalent values
5166 and do not have hard regs; replace them by their equivalents.
5167 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
5168 front of it for pseudos that we have to replace with stack slots. */
5171 subst_reg_equivs (rtx ad
, rtx insn
)
5173 RTX_CODE code
= GET_CODE (ad
);
5193 int regno
= REGNO (ad
);
5195 if (reg_equiv_constant
[regno
] != 0)
5197 subst_reg_equivs_changed
= 1;
5198 return reg_equiv_constant
[regno
];
5200 if (reg_equiv_memory_loc
[regno
] && num_not_at_initial_offset
)
5202 rtx mem
= make_memloc (ad
, regno
);
5203 if (! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
5205 subst_reg_equivs_changed
= 1;
5206 /* We mark the USE with QImode so that we recognize it
5207 as one that can be safely deleted at the end of
5209 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, ad
), insn
),
5218 /* Quickly dispose of a common case. */
5219 if (XEXP (ad
, 0) == frame_pointer_rtx
5220 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
5228 fmt
= GET_RTX_FORMAT (code
);
5229 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5231 XEXP (ad
, i
) = subst_reg_equivs (XEXP (ad
, i
), insn
);
5235 /* Compute the sum of X and Y, making canonicalizations assumed in an
5236 address, namely: sum constant integers, surround the sum of two
5237 constants with a CONST, put the constant as the second operand, and
5238 group the constant on the outermost sum.
5240 This routine assumes both inputs are already in canonical form. */
5243 form_sum (rtx x
, rtx y
)
5246 enum machine_mode mode
= GET_MODE (x
);
5248 if (mode
== VOIDmode
)
5249 mode
= GET_MODE (y
);
5251 if (mode
== VOIDmode
)
5254 if (GET_CODE (x
) == CONST_INT
)
5255 return plus_constant (y
, INTVAL (x
));
5256 else if (GET_CODE (y
) == CONST_INT
)
5257 return plus_constant (x
, INTVAL (y
));
5258 else if (CONSTANT_P (x
))
5259 tem
= x
, x
= y
, y
= tem
;
5261 if (GET_CODE (x
) == PLUS
&& CONSTANT_P (XEXP (x
, 1)))
5262 return form_sum (XEXP (x
, 0), form_sum (XEXP (x
, 1), y
));
5264 /* Note that if the operands of Y are specified in the opposite
5265 order in the recursive calls below, infinite recursion will occur. */
5266 if (GET_CODE (y
) == PLUS
&& CONSTANT_P (XEXP (y
, 1)))
5267 return form_sum (form_sum (x
, XEXP (y
, 0)), XEXP (y
, 1));
5269 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5270 constant will have been placed second. */
5271 if (CONSTANT_P (x
) && CONSTANT_P (y
))
5273 if (GET_CODE (x
) == CONST
)
5275 if (GET_CODE (y
) == CONST
)
5278 return gen_rtx_CONST (VOIDmode
, gen_rtx_PLUS (mode
, x
, y
));
5281 return gen_rtx_PLUS (mode
, x
, y
);
5284 /* If ADDR is a sum containing a pseudo register that should be
5285 replaced with a constant (from reg_equiv_constant),
5286 return the result of doing so, and also apply the associative
5287 law so that the result is more likely to be a valid address.
5288 (But it is not guaranteed to be one.)
5290 Note that at most one register is replaced, even if more are
5291 replaceable. Also, we try to put the result into a canonical form
5292 so it is more likely to be a valid address.
5294 In all other cases, return ADDR. */
5297 subst_indexed_address (rtx addr
)
5299 rtx op0
= 0, op1
= 0, op2
= 0;
5303 if (GET_CODE (addr
) == PLUS
)
5305 /* Try to find a register to replace. */
5306 op0
= XEXP (addr
, 0), op1
= XEXP (addr
, 1), op2
= 0;
5308 && (regno
= REGNO (op0
)) >= FIRST_PSEUDO_REGISTER
5309 && reg_renumber
[regno
] < 0
5310 && reg_equiv_constant
[regno
] != 0)
5311 op0
= reg_equiv_constant
[regno
];
5312 else if (REG_P (op1
)
5313 && (regno
= REGNO (op1
)) >= FIRST_PSEUDO_REGISTER
5314 && reg_renumber
[regno
] < 0
5315 && reg_equiv_constant
[regno
] != 0)
5316 op1
= reg_equiv_constant
[regno
];
5317 else if (GET_CODE (op0
) == PLUS
5318 && (tem
= subst_indexed_address (op0
)) != op0
)
5320 else if (GET_CODE (op1
) == PLUS
5321 && (tem
= subst_indexed_address (op1
)) != op1
)
5326 /* Pick out up to three things to add. */
5327 if (GET_CODE (op1
) == PLUS
)
5328 op2
= XEXP (op1
, 1), op1
= XEXP (op1
, 0);
5329 else if (GET_CODE (op0
) == PLUS
)
5330 op2
= op1
, op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
5332 /* Compute the sum. */
5334 op1
= form_sum (op1
, op2
);
5336 op0
= form_sum (op0
, op1
);
5343 /* Update the REG_INC notes for an insn. It updates all REG_INC
5344 notes for the instruction which refer to REGNO the to refer
5345 to the reload number.
5347 INSN is the insn for which any REG_INC notes need updating.
5349 REGNO is the register number which has been reloaded.
5351 RELOADNUM is the reload number. */
5354 update_auto_inc_notes (rtx insn ATTRIBUTE_UNUSED
, int regno ATTRIBUTE_UNUSED
,
5355 int reloadnum ATTRIBUTE_UNUSED
)
5360 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5361 if (REG_NOTE_KIND (link
) == REG_INC
5362 && (int) REGNO (XEXP (link
, 0)) == regno
)
5363 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5367 /* Record the pseudo registers we must reload into hard registers in a
5368 subexpression of a would-be memory address, X referring to a value
5369 in mode MODE. (This function is not called if the address we find
5372 CONTEXT = 1 means we are considering regs as index regs,
5373 = 0 means we are considering them as base regs.
5374 OUTER_CODE is the code of the enclosing RTX, typically a MEM, a PLUS,
5376 If CONTEXT == 0 and OUTER_CODE is a PLUS or LO_SUM, then INDEX_CODE
5377 is the code of the index part of the address. Otherwise, pass SCRATCH
5379 OPNUM and TYPE specify the purpose of any reloads made.
5381 IND_LEVELS says how many levels of indirect addressing are
5382 supported at this point in the address.
5384 INSN, if nonzero, is the insn in which we do the reload. It is used
5385 to determine if we may generate output reloads.
5387 We return nonzero if X, as a whole, is reloaded or replaced. */
5389 /* Note that we take shortcuts assuming that no multi-reg machine mode
5390 occurs as part of an address.
5391 Also, this is not fully machine-customizable; it works for machines
5392 such as VAXen and 68000's and 32000's, but other possible machines
5393 could have addressing modes that this does not handle right.
5394 If you add push_reload calls here, you need to make sure gen_reload
5395 handles those cases gracefully. */
5398 find_reloads_address_1 (enum machine_mode mode
, rtx x
, int context
,
5399 enum rtx_code outer_code
, enum rtx_code index_code
,
5400 rtx
*loc
, int opnum
, enum reload_type type
,
5401 int ind_levels
, rtx insn
)
5403 #define REG_OK_FOR_CONTEXT(CONTEXT, REGNO, MODE, OUTER, INDEX) \
5405 ? regno_ok_for_base_p (REGNO, MODE, OUTER, INDEX) \
5406 : REGNO_OK_FOR_INDEX_P (REGNO))
5408 enum reg_class context_reg_class
;
5409 RTX_CODE code
= GET_CODE (x
);
5412 context_reg_class
= INDEX_REG_CLASS
;
5414 context_reg_class
= base_reg_class (mode
, outer_code
, index_code
);
5420 rtx orig_op0
= XEXP (x
, 0);
5421 rtx orig_op1
= XEXP (x
, 1);
5422 RTX_CODE code0
= GET_CODE (orig_op0
);
5423 RTX_CODE code1
= GET_CODE (orig_op1
);
5427 if (GET_CODE (op0
) == SUBREG
)
5429 op0
= SUBREG_REG (op0
);
5430 code0
= GET_CODE (op0
);
5431 if (code0
== REG
&& REGNO (op0
) < FIRST_PSEUDO_REGISTER
)
5432 op0
= gen_rtx_REG (word_mode
,
5434 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0
)),
5435 GET_MODE (SUBREG_REG (orig_op0
)),
5436 SUBREG_BYTE (orig_op0
),
5437 GET_MODE (orig_op0
))));
5440 if (GET_CODE (op1
) == SUBREG
)
5442 op1
= SUBREG_REG (op1
);
5443 code1
= GET_CODE (op1
);
5444 if (code1
== REG
&& REGNO (op1
) < FIRST_PSEUDO_REGISTER
)
5445 /* ??? Why is this given op1's mode and above for
5446 ??? op0 SUBREGs we use word_mode? */
5447 op1
= gen_rtx_REG (GET_MODE (op1
),
5449 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1
)),
5450 GET_MODE (SUBREG_REG (orig_op1
)),
5451 SUBREG_BYTE (orig_op1
),
5452 GET_MODE (orig_op1
))));
5454 /* Plus in the index register may be created only as a result of
5455 register rematerialization for expression like &localvar*4. Reload it.
5456 It may be possible to combine the displacement on the outer level,
5457 but it is probably not worthwhile to do so. */
5460 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5461 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5462 push_reload (*loc
, NULL_RTX
, loc
, (rtx
*) 0,
5464 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5468 if (code0
== MULT
|| code0
== SIGN_EXTEND
|| code0
== TRUNCATE
5469 || code0
== ZERO_EXTEND
|| code1
== MEM
)
5471 find_reloads_address_1 (mode
, orig_op0
, 1, PLUS
, SCRATCH
,
5472 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5474 find_reloads_address_1 (mode
, orig_op1
, 0, PLUS
, code0
,
5475 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5479 else if (code1
== MULT
|| code1
== SIGN_EXTEND
|| code1
== TRUNCATE
5480 || code1
== ZERO_EXTEND
|| code0
== MEM
)
5482 find_reloads_address_1 (mode
, orig_op0
, 0, PLUS
, code1
,
5483 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5485 find_reloads_address_1 (mode
, orig_op1
, 1, PLUS
, SCRATCH
,
5486 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5490 else if (code0
== CONST_INT
|| code0
== CONST
5491 || code0
== SYMBOL_REF
|| code0
== LABEL_REF
)
5492 find_reloads_address_1 (mode
, orig_op1
, 0, PLUS
, code0
,
5493 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5496 else if (code1
== CONST_INT
|| code1
== CONST
5497 || code1
== SYMBOL_REF
|| code1
== LABEL_REF
)
5498 find_reloads_address_1 (mode
, orig_op0
, 0, PLUS
, code1
,
5499 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5502 else if (code0
== REG
&& code1
== REG
)
5504 if (REGNO_OK_FOR_INDEX_P (REGNO (op1
))
5505 && regno_ok_for_base_p (REGNO (op0
), mode
, PLUS
, REG
))
5507 else if (REGNO_OK_FOR_INDEX_P (REGNO (op0
))
5508 && regno_ok_for_base_p (REGNO (op1
), mode
, PLUS
, REG
))
5510 else if (regno_ok_for_base_p (REGNO (op0
), mode
, PLUS
, REG
))
5511 find_reloads_address_1 (mode
, orig_op1
, 1, PLUS
, SCRATCH
,
5512 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5514 else if (REGNO_OK_FOR_INDEX_P (REGNO (op1
)))
5515 find_reloads_address_1 (mode
, orig_op0
, 0, PLUS
, REG
,
5516 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5518 else if (regno_ok_for_base_p (REGNO (op1
), mode
, PLUS
, REG
))
5519 find_reloads_address_1 (mode
, orig_op0
, 1, PLUS
, SCRATCH
,
5520 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5522 else if (REGNO_OK_FOR_INDEX_P (REGNO (op0
)))
5523 find_reloads_address_1 (mode
, orig_op1
, 0, PLUS
, REG
,
5524 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5528 find_reloads_address_1 (mode
, orig_op0
, 0, PLUS
, REG
,
5529 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5531 find_reloads_address_1 (mode
, orig_op1
, 1, PLUS
, SCRATCH
,
5532 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5537 else if (code0
== REG
)
5539 find_reloads_address_1 (mode
, orig_op0
, 1, PLUS
, SCRATCH
,
5540 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5542 find_reloads_address_1 (mode
, orig_op1
, 0, PLUS
, REG
,
5543 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5547 else if (code1
== REG
)
5549 find_reloads_address_1 (mode
, orig_op1
, 1, PLUS
, SCRATCH
,
5550 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5552 find_reloads_address_1 (mode
, orig_op0
, 0, PLUS
, REG
,
5553 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5563 rtx op0
= XEXP (x
, 0);
5564 rtx op1
= XEXP (x
, 1);
5565 enum rtx_code index_code
;
5569 if (GET_CODE (op1
) != PLUS
&& GET_CODE (op1
) != MINUS
)
5572 /* Currently, we only support {PRE,POST}_MODIFY constructs
5573 where a base register is {inc,dec}remented by the contents
5574 of another register or by a constant value. Thus, these
5575 operands must match. */
5576 gcc_assert (op0
== XEXP (op1
, 0));
5578 /* Require index register (or constant). Let's just handle the
5579 register case in the meantime... If the target allows
5580 auto-modify by a constant then we could try replacing a pseudo
5581 register with its equivalent constant where applicable.
5583 We also handle the case where the register was eliminated
5584 resulting in a PLUS subexpression.
5586 If we later decide to reload the whole PRE_MODIFY or
5587 POST_MODIFY, inc_for_reload might clobber the reload register
5588 before reading the index. The index register might therefore
5589 need to live longer than a TYPE reload normally would, so be
5590 conservative and class it as RELOAD_OTHER. */
5591 if ((REG_P (XEXP (op1
, 1))
5592 && !REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1
, 1))))
5593 || GET_CODE (XEXP (op1
, 1)) == PLUS
)
5594 find_reloads_address_1 (mode
, XEXP (op1
, 1), 1, code
, SCRATCH
,
5595 &XEXP (op1
, 1), opnum
, RELOAD_OTHER
,
5598 gcc_assert (REG_P (XEXP (op1
, 0)));
5600 regno
= REGNO (XEXP (op1
, 0));
5601 index_code
= GET_CODE (XEXP (op1
, 1));
5603 /* A register that is incremented cannot be constant! */
5604 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
5605 || reg_equiv_constant
[regno
] == 0);
5607 /* Handle a register that is equivalent to a memory location
5608 which cannot be addressed directly. */
5609 if (reg_equiv_memory_loc
[regno
] != 0
5610 && (reg_equiv_address
[regno
] != 0
5611 || num_not_at_initial_offset
))
5613 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5615 if (reg_equiv_address
[regno
]
5616 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5620 /* First reload the memory location's address.
5621 We can't use ADDR_TYPE (type) here, because we need to
5622 write back the value after reading it, hence we actually
5623 need two registers. */
5624 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5625 &XEXP (tem
, 0), opnum
,
5629 if (!rtx_equal_p (tem
, orig
))
5630 push_reg_equiv_alt_mem (regno
, tem
);
5632 /* Then reload the memory location into a base
5634 reloadnum
= push_reload (tem
, tem
, &XEXP (x
, 0),
5636 base_reg_class (mode
, code
,
5638 GET_MODE (x
), GET_MODE (x
), 0,
5639 0, opnum
, RELOAD_OTHER
);
5641 update_auto_inc_notes (this_insn
, regno
, reloadnum
);
5646 if (reg_renumber
[regno
] >= 0)
5647 regno
= reg_renumber
[regno
];
5649 /* We require a base register here... */
5650 if (!regno_ok_for_base_p (regno
, GET_MODE (x
), code
, index_code
))
5652 reloadnum
= push_reload (XEXP (op1
, 0), XEXP (x
, 0),
5653 &XEXP (op1
, 0), &XEXP (x
, 0),
5654 base_reg_class (mode
, code
, index_code
),
5655 GET_MODE (x
), GET_MODE (x
), 0, 0,
5656 opnum
, RELOAD_OTHER
);
5658 update_auto_inc_notes (this_insn
, regno
, reloadnum
);
5668 if (REG_P (XEXP (x
, 0)))
5670 int regno
= REGNO (XEXP (x
, 0));
5674 /* A register that is incremented cannot be constant! */
5675 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
5676 || reg_equiv_constant
[regno
] == 0);
5678 /* Handle a register that is equivalent to a memory location
5679 which cannot be addressed directly. */
5680 if (reg_equiv_memory_loc
[regno
] != 0
5681 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5683 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5684 if (reg_equiv_address
[regno
]
5685 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5689 /* First reload the memory location's address.
5690 We can't use ADDR_TYPE (type) here, because we need to
5691 write back the value after reading it, hence we actually
5692 need two registers. */
5693 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5694 &XEXP (tem
, 0), opnum
, type
,
5696 if (!rtx_equal_p (tem
, orig
))
5697 push_reg_equiv_alt_mem (regno
, tem
);
5698 /* Put this inside a new increment-expression. */
5699 x
= gen_rtx_fmt_e (GET_CODE (x
), GET_MODE (x
), tem
);
5700 /* Proceed to reload that, as if it contained a register. */
5704 /* If we have a hard register that is ok in this incdec context,
5705 don't make a reload. If the register isn't nice enough for
5706 autoincdec, we can reload it. But, if an autoincrement of a
5707 register that we here verified as playing nice, still outside
5708 isn't "valid", it must be that no autoincrement is "valid".
5709 If that is true and something made an autoincrement anyway,
5710 this must be a special context where one is allowed.
5711 (For example, a "push" instruction.)
5712 We can't improve this address, so leave it alone. */
5714 /* Otherwise, reload the autoincrement into a suitable hard reg
5715 and record how much to increment by. */
5717 if (reg_renumber
[regno
] >= 0)
5718 regno
= reg_renumber
[regno
];
5719 if (regno
>= FIRST_PSEUDO_REGISTER
5720 || !REG_OK_FOR_CONTEXT (context
, regno
, mode
, code
,
5725 /* If we can output the register afterwards, do so, this
5726 saves the extra update.
5727 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5728 CALL_INSN - and it does not set CC0.
5729 But don't do this if we cannot directly address the
5730 memory location, since this will make it harder to
5731 reuse address reloads, and increases register pressure.
5732 Also don't do this if we can probably update x directly. */
5733 rtx equiv
= (MEM_P (XEXP (x
, 0))
5735 : reg_equiv_mem
[regno
]);
5736 int icode
= (int) optab_handler (add_optab
, Pmode
)->insn_code
;
5737 if (insn
&& NONJUMP_INSN_P (insn
) && equiv
5738 && memory_operand (equiv
, GET_MODE (equiv
))
5740 && ! sets_cc0_p (PATTERN (insn
))
5742 && ! (icode
!= CODE_FOR_nothing
5743 && ((*insn_data
[icode
].operand
[0].predicate
)
5745 && ((*insn_data
[icode
].operand
[1].predicate
)
5748 /* We use the original pseudo for loc, so that
5749 emit_reload_insns() knows which pseudo this
5750 reload refers to and updates the pseudo rtx, not
5751 its equivalent memory location, as well as the
5752 corresponding entry in reg_last_reload_reg. */
5753 loc
= &XEXP (x_orig
, 0);
5756 = push_reload (x
, x
, loc
, loc
,
5758 GET_MODE (x
), GET_MODE (x
), 0, 0,
5759 opnum
, RELOAD_OTHER
);
5764 = push_reload (x
, x
, loc
, (rtx
*) 0,
5766 GET_MODE (x
), GET_MODE (x
), 0, 0,
5769 = find_inc_amount (PATTERN (this_insn
), XEXP (x_orig
, 0));
5774 update_auto_inc_notes (this_insn
, REGNO (XEXP (x_orig
, 0)),
5784 /* Look for parts to reload in the inner expression and reload them
5785 too, in addition to this operation. Reloading all inner parts in
5786 addition to this one shouldn't be necessary, but at this point,
5787 we don't know if we can possibly omit any part that *can* be
5788 reloaded. Targets that are better off reloading just either part
5789 (or perhaps even a different part of an outer expression), should
5790 define LEGITIMIZE_RELOAD_ADDRESS. */
5791 find_reloads_address_1 (GET_MODE (XEXP (x
, 0)), XEXP (x
, 0),
5792 context
, code
, SCRATCH
, &XEXP (x
, 0), opnum
,
5793 type
, ind_levels
, insn
);
5794 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5796 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5800 /* This is probably the result of a substitution, by eliminate_regs, of
5801 an equivalent address for a pseudo that was not allocated to a hard
5802 register. Verify that the specified address is valid and reload it
5805 Since we know we are going to reload this item, don't decrement for
5806 the indirection level.
5808 Note that this is actually conservative: it would be slightly more
5809 efficient to use the value of SPILL_INDIRECT_LEVELS from
5812 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5813 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5814 push_reload (*loc
, NULL_RTX
, loc
, (rtx
*) 0,
5816 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5821 int regno
= REGNO (x
);
5823 if (reg_equiv_constant
[regno
] != 0)
5825 find_reloads_address_part (reg_equiv_constant
[regno
], loc
,
5827 GET_MODE (x
), opnum
, type
, ind_levels
);
5831 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5832 that feeds this insn. */
5833 if (reg_equiv_mem
[regno
] != 0)
5835 push_reload (reg_equiv_mem
[regno
], NULL_RTX
, loc
, (rtx
*) 0,
5837 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5842 if (reg_equiv_memory_loc
[regno
]
5843 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5845 rtx tem
= make_memloc (x
, regno
);
5846 if (reg_equiv_address
[regno
] != 0
5847 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5850 find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0),
5851 &XEXP (x
, 0), opnum
, ADDR_TYPE (type
),
5853 if (!rtx_equal_p (x
, tem
))
5854 push_reg_equiv_alt_mem (regno
, x
);
5858 if (reg_renumber
[regno
] >= 0)
5859 regno
= reg_renumber
[regno
];
5861 if (regno
>= FIRST_PSEUDO_REGISTER
5862 || !REG_OK_FOR_CONTEXT (context
, regno
, mode
, outer_code
,
5865 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5867 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5871 /* If a register appearing in an address is the subject of a CLOBBER
5872 in this insn, reload it into some other register to be safe.
5873 The CLOBBER is supposed to make the register unavailable
5874 from before this insn to after it. */
5875 if (regno_clobbered_p (regno
, this_insn
, GET_MODE (x
), 0))
5877 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5879 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5886 if (REG_P (SUBREG_REG (x
)))
5888 /* If this is a SUBREG of a hard register and the resulting register
5889 is of the wrong class, reload the whole SUBREG. This avoids
5890 needless copies if SUBREG_REG is multi-word. */
5891 if (REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5893 int regno ATTRIBUTE_UNUSED
= subreg_regno (x
);
5895 if (!REG_OK_FOR_CONTEXT (context
, regno
, mode
, outer_code
,
5898 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5900 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5904 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5905 is larger than the class size, then reload the whole SUBREG. */
5908 enum reg_class
class = context_reg_class
;
5909 if ((unsigned) CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x
)))
5910 > reg_class_size
[class])
5912 x
= find_reloads_subreg_address (x
, 0, opnum
,
5915 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0, class,
5916 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5928 const char *fmt
= GET_RTX_FORMAT (code
);
5931 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5934 /* Pass SCRATCH for INDEX_CODE, since CODE can never be a PLUS once
5936 find_reloads_address_1 (mode
, XEXP (x
, i
), context
, code
, SCRATCH
,
5937 &XEXP (x
, i
), opnum
, type
, ind_levels
, insn
);
5941 #undef REG_OK_FOR_CONTEXT
5945 /* X, which is found at *LOC, is a part of an address that needs to be
5946 reloaded into a register of class CLASS. If X is a constant, or if
5947 X is a PLUS that contains a constant, check that the constant is a
5948 legitimate operand and that we are supposed to be able to load
5949 it into the register.
5951 If not, force the constant into memory and reload the MEM instead.
5953 MODE is the mode to use, in case X is an integer constant.
5955 OPNUM and TYPE describe the purpose of any reloads made.
5957 IND_LEVELS says how many levels of indirect addressing this machine
5961 find_reloads_address_part (rtx x
, rtx
*loc
, enum reg_class
class,
5962 enum machine_mode mode
, int opnum
,
5963 enum reload_type type
, int ind_levels
)
5966 && (! LEGITIMATE_CONSTANT_P (x
)
5967 || PREFERRED_RELOAD_CLASS (x
, class) == NO_REGS
))
5969 x
= force_const_mem (mode
, x
);
5970 find_reloads_address (mode
, &x
, XEXP (x
, 0), &XEXP (x
, 0),
5971 opnum
, type
, ind_levels
, 0);
5974 else if (GET_CODE (x
) == PLUS
5975 && CONSTANT_P (XEXP (x
, 1))
5976 && (! LEGITIMATE_CONSTANT_P (XEXP (x
, 1))
5977 || PREFERRED_RELOAD_CLASS (XEXP (x
, 1), class) == NO_REGS
))
5981 tem
= force_const_mem (GET_MODE (x
), XEXP (x
, 1));
5982 x
= gen_rtx_PLUS (GET_MODE (x
), XEXP (x
, 0), tem
);
5983 find_reloads_address (mode
, &XEXP (x
, 1), XEXP (tem
, 0), &XEXP (tem
, 0),
5984 opnum
, type
, ind_levels
, 0);
5987 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0, class,
5988 mode
, VOIDmode
, 0, 0, opnum
, type
);
5991 /* X, a subreg of a pseudo, is a part of an address that needs to be
5994 If the pseudo is equivalent to a memory location that cannot be directly
5995 addressed, make the necessary address reloads.
5997 If address reloads have been necessary, or if the address is changed
5998 by register elimination, return the rtx of the memory location;
5999 otherwise, return X.
6001 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
6004 OPNUM and TYPE identify the purpose of the reload.
6006 IND_LEVELS says how many levels of indirect addressing are
6007 supported at this point in the address.
6009 INSN, if nonzero, is the insn in which we do the reload. It is used
6010 to determine where to put USEs for pseudos that we have to replace with
6014 find_reloads_subreg_address (rtx x
, int force_replace
, int opnum
,
6015 enum reload_type type
, int ind_levels
, rtx insn
)
6017 int regno
= REGNO (SUBREG_REG (x
));
6019 if (reg_equiv_memory_loc
[regno
])
6021 /* If the address is not directly addressable, or if the address is not
6022 offsettable, then it must be replaced. */
6024 && (reg_equiv_address
[regno
]
6025 || ! offsettable_memref_p (reg_equiv_mem
[regno
])))
6028 if (force_replace
|| num_not_at_initial_offset
)
6030 rtx tem
= make_memloc (SUBREG_REG (x
), regno
);
6032 /* If the address changes because of register elimination, then
6033 it must be replaced. */
6035 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
6037 unsigned outer_size
= GET_MODE_SIZE (GET_MODE (x
));
6038 unsigned inner_size
= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)));
6041 enum machine_mode orig_mode
= GET_MODE (orig
);
6044 /* For big-endian paradoxical subregs, SUBREG_BYTE does not
6045 hold the correct (negative) byte offset. */
6046 if (BYTES_BIG_ENDIAN
&& outer_size
> inner_size
)
6047 offset
= inner_size
- outer_size
;
6049 offset
= SUBREG_BYTE (x
);
6051 XEXP (tem
, 0) = plus_constant (XEXP (tem
, 0), offset
);
6052 PUT_MODE (tem
, GET_MODE (x
));
6053 if (MEM_OFFSET (tem
))
6054 set_mem_offset (tem
, plus_constant (MEM_OFFSET (tem
), offset
));
6056 /* If this was a paradoxical subreg that we replaced, the
6057 resulting memory must be sufficiently aligned to allow
6058 us to widen the mode of the memory. */
6059 if (outer_size
> inner_size
)
6063 base
= XEXP (tem
, 0);
6064 if (GET_CODE (base
) == PLUS
)
6066 if (GET_CODE (XEXP (base
, 1)) == CONST_INT
6067 && INTVAL (XEXP (base
, 1)) % outer_size
!= 0)
6069 base
= XEXP (base
, 0);
6072 || (REGNO_POINTER_ALIGN (REGNO (base
))
6073 < outer_size
* BITS_PER_UNIT
))
6077 reloaded
= find_reloads_address (GET_MODE (tem
), &tem
,
6078 XEXP (tem
, 0), &XEXP (tem
, 0),
6079 opnum
, type
, ind_levels
, insn
);
6080 /* ??? Do we need to handle nonzero offsets somehow? */
6081 if (!offset
&& !rtx_equal_p (tem
, orig
))
6082 push_reg_equiv_alt_mem (regno
, tem
);
6084 /* For some processors an address may be valid in the
6085 original mode but not in a smaller mode. For
6086 example, ARM accepts a scaled index register in
6087 SImode but not in HImode. find_reloads_address
6088 assumes that we pass it a valid address, and doesn't
6089 force a reload. This will probably be fine if
6090 find_reloads_address finds some reloads. But if it
6091 doesn't find any, then we may have just converted a
6092 valid address into an invalid one. Check for that
6095 && strict_memory_address_p (orig_mode
, XEXP (tem
, 0))
6096 && !strict_memory_address_p (GET_MODE (tem
),
6098 push_reload (XEXP (tem
, 0), NULL_RTX
, &XEXP (tem
, 0), (rtx
*) 0,
6099 base_reg_class (GET_MODE (tem
), MEM
, SCRATCH
),
6100 GET_MODE (XEXP (tem
, 0)), VOIDmode
, 0, 0,
6103 /* If this is not a toplevel operand, find_reloads doesn't see
6104 this substitution. We have to emit a USE of the pseudo so
6105 that delete_output_reload can see it. */
6106 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
6107 /* We mark the USE with QImode so that we recognize it
6108 as one that can be safely deleted at the end of
6110 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
,
6120 /* Substitute into the current INSN the registers into which we have reloaded
6121 the things that need reloading. The array `replacements'
6122 contains the locations of all pointers that must be changed
6123 and says what to replace them with.
6125 Return the rtx that X translates into; usually X, but modified. */
6128 subst_reloads (rtx insn
)
6132 for (i
= 0; i
< n_replacements
; i
++)
6134 struct replacement
*r
= &replacements
[i
];
6135 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
6139 /* This checking takes a very long time on some platforms
6140 causing the gcc.c-torture/compile/limits-fnargs.c test
6141 to time out during testing. See PR 31850.
6143 Internal consistency test. Check that we don't modify
6144 anything in the equivalence arrays. Whenever something from
6145 those arrays needs to be reloaded, it must be unshared before
6146 being substituted into; the equivalence must not be modified.
6147 Otherwise, if the equivalence is used after that, it will
6148 have been modified, and the thing substituted (probably a
6149 register) is likely overwritten and not a usable equivalence. */
6152 for (check_regno
= 0; check_regno
< max_regno
; check_regno
++)
6154 #define CHECK_MODF(ARRAY) \
6155 gcc_assert (!ARRAY[check_regno] \
6156 || !loc_mentioned_in_p (r->where, \
6157 ARRAY[check_regno]))
6159 CHECK_MODF (reg_equiv_constant
);
6160 CHECK_MODF (reg_equiv_memory_loc
);
6161 CHECK_MODF (reg_equiv_address
);
6162 CHECK_MODF (reg_equiv_mem
);
6165 #endif /* DEBUG_RELOAD */
6167 /* If we're replacing a LABEL_REF with a register, there must
6168 already be an indication (to e.g. flow) which label this
6169 register refers to. */
6170 gcc_assert (GET_CODE (*r
->where
) != LABEL_REF
6172 || find_reg_note (insn
,
6174 XEXP (*r
->where
, 0))
6175 || label_is_jump_target_p (XEXP (*r
->where
, 0), insn
));
6177 /* Encapsulate RELOADREG so its machine mode matches what
6178 used to be there. Note that gen_lowpart_common will
6179 do the wrong thing if RELOADREG is multi-word. RELOADREG
6180 will always be a REG here. */
6181 if (GET_MODE (reloadreg
) != r
->mode
&& r
->mode
!= VOIDmode
)
6182 reloadreg
= reload_adjust_reg_for_mode (reloadreg
, r
->mode
);
6184 /* If we are putting this into a SUBREG and RELOADREG is a
6185 SUBREG, we would be making nested SUBREGs, so we have to fix
6186 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
6188 if (r
->subreg_loc
!= 0 && GET_CODE (reloadreg
) == SUBREG
)
6190 if (GET_MODE (*r
->subreg_loc
)
6191 == GET_MODE (SUBREG_REG (reloadreg
)))
6192 *r
->subreg_loc
= SUBREG_REG (reloadreg
);
6196 SUBREG_BYTE (*r
->subreg_loc
) + SUBREG_BYTE (reloadreg
);
6198 /* When working with SUBREGs the rule is that the byte
6199 offset must be a multiple of the SUBREG's mode. */
6200 final_offset
= (final_offset
/
6201 GET_MODE_SIZE (GET_MODE (*r
->subreg_loc
)));
6202 final_offset
= (final_offset
*
6203 GET_MODE_SIZE (GET_MODE (*r
->subreg_loc
)));
6205 *r
->where
= SUBREG_REG (reloadreg
);
6206 SUBREG_BYTE (*r
->subreg_loc
) = final_offset
;
6210 *r
->where
= reloadreg
;
6212 /* If reload got no reg and isn't optional, something's wrong. */
6214 gcc_assert (rld
[r
->what
].optional
);
6218 /* Make a copy of any replacements being done into X and move those
6219 copies to locations in Y, a copy of X. */
6222 copy_replacements (rtx x
, rtx y
)
6224 /* We can't support X being a SUBREG because we might then need to know its
6225 location if something inside it was replaced. */
6226 gcc_assert (GET_CODE (x
) != SUBREG
);
6228 copy_replacements_1 (&x
, &y
, n_replacements
);
6232 copy_replacements_1 (rtx
*px
, rtx
*py
, int orig_replacements
)
6236 struct replacement
*r
;
6240 for (j
= 0; j
< orig_replacements
; j
++)
6242 if (replacements
[j
].subreg_loc
== px
)
6244 r
= &replacements
[n_replacements
++];
6245 r
->where
= replacements
[j
].where
;
6247 r
->what
= replacements
[j
].what
;
6248 r
->mode
= replacements
[j
].mode
;
6250 else if (replacements
[j
].where
== px
)
6252 r
= &replacements
[n_replacements
++];
6255 r
->what
= replacements
[j
].what
;
6256 r
->mode
= replacements
[j
].mode
;
6262 code
= GET_CODE (x
);
6263 fmt
= GET_RTX_FORMAT (code
);
6265 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6268 copy_replacements_1 (&XEXP (x
, i
), &XEXP (y
, i
), orig_replacements
);
6269 else if (fmt
[i
] == 'E')
6270 for (j
= XVECLEN (x
, i
); --j
>= 0; )
6271 copy_replacements_1 (&XVECEXP (x
, i
, j
), &XVECEXP (y
, i
, j
),
6276 /* Change any replacements being done to *X to be done to *Y. */
6279 move_replacements (rtx
*x
, rtx
*y
)
6283 for (i
= 0; i
< n_replacements
; i
++)
6284 if (replacements
[i
].subreg_loc
== x
)
6285 replacements
[i
].subreg_loc
= y
;
6286 else if (replacements
[i
].where
== x
)
6288 replacements
[i
].where
= y
;
6289 replacements
[i
].subreg_loc
= 0;
6293 /* If LOC was scheduled to be replaced by something, return the replacement.
6294 Otherwise, return *LOC. */
6297 find_replacement (rtx
*loc
)
6299 struct replacement
*r
;
6301 for (r
= &replacements
[0]; r
< &replacements
[n_replacements
]; r
++)
6303 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
6305 if (reloadreg
&& r
->where
== loc
)
6307 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
6308 reloadreg
= gen_rtx_REG (r
->mode
, REGNO (reloadreg
));
6312 else if (reloadreg
&& r
->subreg_loc
== loc
)
6314 /* RELOADREG must be either a REG or a SUBREG.
6316 ??? Is it actually still ever a SUBREG? If so, why? */
6318 if (REG_P (reloadreg
))
6319 return gen_rtx_REG (GET_MODE (*loc
),
6320 (REGNO (reloadreg
) +
6321 subreg_regno_offset (REGNO (SUBREG_REG (*loc
)),
6322 GET_MODE (SUBREG_REG (*loc
)),
6325 else if (GET_MODE (reloadreg
) == GET_MODE (*loc
))
6329 int final_offset
= SUBREG_BYTE (reloadreg
) + SUBREG_BYTE (*loc
);
6331 /* When working with SUBREGs the rule is that the byte
6332 offset must be a multiple of the SUBREG's mode. */
6333 final_offset
= (final_offset
/ GET_MODE_SIZE (GET_MODE (*loc
)));
6334 final_offset
= (final_offset
* GET_MODE_SIZE (GET_MODE (*loc
)));
6335 return gen_rtx_SUBREG (GET_MODE (*loc
), SUBREG_REG (reloadreg
),
6341 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6342 what's inside and make a new rtl if so. */
6343 if (GET_CODE (*loc
) == PLUS
|| GET_CODE (*loc
) == MINUS
6344 || GET_CODE (*loc
) == MULT
)
6346 rtx x
= find_replacement (&XEXP (*loc
, 0));
6347 rtx y
= find_replacement (&XEXP (*loc
, 1));
6349 if (x
!= XEXP (*loc
, 0) || y
!= XEXP (*loc
, 1))
6350 return gen_rtx_fmt_ee (GET_CODE (*loc
), GET_MODE (*loc
), x
, y
);
6356 /* Return nonzero if register in range [REGNO, ENDREGNO)
6357 appears either explicitly or implicitly in X
6358 other than being stored into (except for earlyclobber operands).
6360 References contained within the substructure at LOC do not count.
6361 LOC may be zero, meaning don't ignore anything.
6363 This is similar to refers_to_regno_p in rtlanal.c except that we
6364 look at equivalences for pseudos that didn't get hard registers. */
6367 refers_to_regno_for_reload_p (unsigned int regno
, unsigned int endregno
,
6379 code
= GET_CODE (x
);
6386 /* If this is a pseudo, a hard register must not have been allocated.
6387 X must therefore either be a constant or be in memory. */
6388 if (r
>= FIRST_PSEUDO_REGISTER
)
6390 if (reg_equiv_memory_loc
[r
])
6391 return refers_to_regno_for_reload_p (regno
, endregno
,
6392 reg_equiv_memory_loc
[r
],
6395 gcc_assert (reg_equiv_constant
[r
] || reg_equiv_invariant
[r
]);
6399 return (endregno
> r
6400 && regno
< r
+ (r
< FIRST_PSEUDO_REGISTER
6401 ? hard_regno_nregs
[r
][GET_MODE (x
)]
6405 /* If this is a SUBREG of a hard reg, we can see exactly which
6406 registers are being modified. Otherwise, handle normally. */
6407 if (REG_P (SUBREG_REG (x
))
6408 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
6410 unsigned int inner_regno
= subreg_regno (x
);
6411 unsigned int inner_endregno
6412 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
6413 ? subreg_nregs (x
) : 1);
6415 return endregno
> inner_regno
&& regno
< inner_endregno
;
6421 if (&SET_DEST (x
) != loc
6422 /* Note setting a SUBREG counts as referring to the REG it is in for
6423 a pseudo but not for hard registers since we can
6424 treat each word individually. */
6425 && ((GET_CODE (SET_DEST (x
)) == SUBREG
6426 && loc
!= &SUBREG_REG (SET_DEST (x
))
6427 && REG_P (SUBREG_REG (SET_DEST (x
)))
6428 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
6429 && refers_to_regno_for_reload_p (regno
, endregno
,
6430 SUBREG_REG (SET_DEST (x
)),
6432 /* If the output is an earlyclobber operand, this is
6434 || ((!REG_P (SET_DEST (x
))
6435 || earlyclobber_operand_p (SET_DEST (x
)))
6436 && refers_to_regno_for_reload_p (regno
, endregno
,
6437 SET_DEST (x
), loc
))))
6440 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
6449 /* X does not match, so try its subexpressions. */
6451 fmt
= GET_RTX_FORMAT (code
);
6452 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6454 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
6462 if (refers_to_regno_for_reload_p (regno
, endregno
,
6466 else if (fmt
[i
] == 'E')
6469 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6470 if (loc
!= &XVECEXP (x
, i
, j
)
6471 && refers_to_regno_for_reload_p (regno
, endregno
,
6472 XVECEXP (x
, i
, j
), loc
))
6479 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6480 we check if any register number in X conflicts with the relevant register
6481 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6482 contains a MEM (we don't bother checking for memory addresses that can't
6483 conflict because we expect this to be a rare case.
6485 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6486 that we look at equivalences for pseudos that didn't get hard registers. */
6489 reg_overlap_mentioned_for_reload_p (rtx x
, rtx in
)
6491 int regno
, endregno
;
6493 /* Overly conservative. */
6494 if (GET_CODE (x
) == STRICT_LOW_PART
6495 || GET_RTX_CLASS (GET_CODE (x
)) == RTX_AUTOINC
)
6498 /* If either argument is a constant, then modifying X can not affect IN. */
6499 if (CONSTANT_P (x
) || CONSTANT_P (in
))
6501 else if (GET_CODE (x
) == SUBREG
&& GET_CODE (SUBREG_REG (x
)) == MEM
)
6502 return refers_to_mem_for_reload_p (in
);
6503 else if (GET_CODE (x
) == SUBREG
)
6505 regno
= REGNO (SUBREG_REG (x
));
6506 if (regno
< FIRST_PSEUDO_REGISTER
)
6507 regno
+= subreg_regno_offset (REGNO (SUBREG_REG (x
)),
6508 GET_MODE (SUBREG_REG (x
)),
6511 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
6512 ? subreg_nregs (x
) : 1);
6514 return refers_to_regno_for_reload_p (regno
, endregno
, in
, (rtx
*) 0);
6520 /* If this is a pseudo, it must not have been assigned a hard register.
6521 Therefore, it must either be in memory or be a constant. */
6523 if (regno
>= FIRST_PSEUDO_REGISTER
)
6525 if (reg_equiv_memory_loc
[regno
])
6526 return refers_to_mem_for_reload_p (in
);
6527 gcc_assert (reg_equiv_constant
[regno
]);
6531 endregno
= END_HARD_REGNO (x
);
6533 return refers_to_regno_for_reload_p (regno
, endregno
, in
, (rtx
*) 0);
6536 return refers_to_mem_for_reload_p (in
);
6537 else if (GET_CODE (x
) == SCRATCH
|| GET_CODE (x
) == PC
6538 || GET_CODE (x
) == CC0
)
6539 return reg_mentioned_p (x
, in
);
6542 gcc_assert (GET_CODE (x
) == PLUS
);
6544 /* We actually want to know if X is mentioned somewhere inside IN.
6545 We must not say that (plus (sp) (const_int 124)) is in
6546 (plus (sp) (const_int 64)), since that can lead to incorrect reload
6547 allocation when spuriously changing a RELOAD_FOR_OUTPUT_ADDRESS
6548 into a RELOAD_OTHER on behalf of another RELOAD_OTHER. */
6553 else if (GET_CODE (in
) == PLUS
)
6554 return (rtx_equal_p (x
, in
)
6555 || reg_overlap_mentioned_for_reload_p (x
, XEXP (in
, 0))
6556 || reg_overlap_mentioned_for_reload_p (x
, XEXP (in
, 1)));
6557 else return (reg_overlap_mentioned_for_reload_p (XEXP (x
, 0), in
)
6558 || reg_overlap_mentioned_for_reload_p (XEXP (x
, 1), in
));
6564 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6568 refers_to_mem_for_reload_p (rtx x
)
6577 return (REGNO (x
) >= FIRST_PSEUDO_REGISTER
6578 && reg_equiv_memory_loc
[REGNO (x
)]);
6580 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
6581 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
6583 && (MEM_P (XEXP (x
, i
))
6584 || refers_to_mem_for_reload_p (XEXP (x
, i
))))
6590 /* Check the insns before INSN to see if there is a suitable register
6591 containing the same value as GOAL.
6592 If OTHER is -1, look for a register in class CLASS.
6593 Otherwise, just see if register number OTHER shares GOAL's value.
6595 Return an rtx for the register found, or zero if none is found.
6597 If RELOAD_REG_P is (short *)1,
6598 we reject any hard reg that appears in reload_reg_rtx
6599 because such a hard reg is also needed coming into this insn.
6601 If RELOAD_REG_P is any other nonzero value,
6602 it is a vector indexed by hard reg number
6603 and we reject any hard reg whose element in the vector is nonnegative
6604 as well as any that appears in reload_reg_rtx.
6606 If GOAL is zero, then GOALREG is a register number; we look
6607 for an equivalent for that register.
6609 MODE is the machine mode of the value we want an equivalence for.
6610 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6612 This function is used by jump.c as well as in the reload pass.
6614 If GOAL is the sum of the stack pointer and a constant, we treat it
6615 as if it were a constant except that sp is required to be unchanging. */
6618 find_equiv_reg (rtx goal
, rtx insn
, enum reg_class
class, int other
,
6619 short *reload_reg_p
, int goalreg
, enum machine_mode mode
)
6622 rtx goaltry
, valtry
, value
, where
;
6628 int goal_mem_addr_varies
= 0;
6629 int need_stable_sp
= 0;
6636 else if (REG_P (goal
))
6637 regno
= REGNO (goal
);
6638 else if (MEM_P (goal
))
6640 enum rtx_code code
= GET_CODE (XEXP (goal
, 0));
6641 if (MEM_VOLATILE_P (goal
))
6643 if (flag_float_store
&& SCALAR_FLOAT_MODE_P (GET_MODE (goal
)))
6645 /* An address with side effects must be reexecuted. */
6660 else if (CONSTANT_P (goal
))
6662 else if (GET_CODE (goal
) == PLUS
6663 && XEXP (goal
, 0) == stack_pointer_rtx
6664 && CONSTANT_P (XEXP (goal
, 1)))
6665 goal_const
= need_stable_sp
= 1;
6666 else if (GET_CODE (goal
) == PLUS
6667 && XEXP (goal
, 0) == frame_pointer_rtx
6668 && CONSTANT_P (XEXP (goal
, 1)))
6674 /* Scan insns back from INSN, looking for one that copies
6675 a value into or out of GOAL.
6676 Stop and give up if we reach a label. */
6682 if (p
== 0 || LABEL_P (p
)
6683 || num
> PARAM_VALUE (PARAM_MAX_RELOAD_SEARCH_INSNS
))
6686 if (NONJUMP_INSN_P (p
)
6687 /* If we don't want spill regs ... */
6688 && (! (reload_reg_p
!= 0
6689 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6690 /* ... then ignore insns introduced by reload; they aren't
6691 useful and can cause results in reload_as_needed to be
6692 different from what they were when calculating the need for
6693 spills. If we notice an input-reload insn here, we will
6694 reject it below, but it might hide a usable equivalent.
6695 That makes bad code. It may even fail: perhaps no reg was
6696 spilled for this insn because it was assumed we would find
6698 || INSN_UID (p
) < reload_first_uid
))
6701 pat
= single_set (p
);
6703 /* First check for something that sets some reg equal to GOAL. */
6706 && true_regnum (SET_SRC (pat
)) == regno
6707 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6710 && true_regnum (SET_DEST (pat
)) == regno
6711 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0)
6713 (goal_const
&& rtx_equal_p (SET_SRC (pat
), goal
)
6714 /* When looking for stack pointer + const,
6715 make sure we don't use a stack adjust. */
6716 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat
), goal
)
6717 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6719 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0
6720 && rtx_renumbered_equal_p (goal
, SET_SRC (pat
)))
6722 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0
6723 && rtx_renumbered_equal_p (goal
, SET_DEST (pat
)))
6724 /* If we are looking for a constant,
6725 and something equivalent to that constant was copied
6726 into a reg, we can use that reg. */
6727 || (goal_const
&& REG_NOTES (p
) != 0
6728 && (tem
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
))
6729 && ((rtx_equal_p (XEXP (tem
, 0), goal
)
6731 = true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6732 || (REG_P (SET_DEST (pat
))
6733 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6734 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem
, 0)))
6735 && GET_CODE (goal
) == CONST_INT
6737 = operand_subword (XEXP (tem
, 0), 0, 0,
6739 && rtx_equal_p (goal
, goaltry
)
6741 = operand_subword (SET_DEST (pat
), 0, 0,
6743 && (valueno
= true_regnum (valtry
)) >= 0)))
6744 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
6746 && REG_P (SET_DEST (pat
))
6747 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6748 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem
, 0)))
6749 && GET_CODE (goal
) == CONST_INT
6750 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 1, 0,
6752 && rtx_equal_p (goal
, goaltry
)
6754 = operand_subword (SET_DEST (pat
), 1, 0, VOIDmode
))
6755 && (valueno
= true_regnum (valtry
)) >= 0)))
6759 if (valueno
!= other
)
6762 else if ((unsigned) valueno
>= FIRST_PSEUDO_REGISTER
)
6764 else if (!in_hard_reg_set_p (reg_class_contents
[(int) class],
6774 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6775 (or copying VALUE into GOAL, if GOAL is also a register).
6776 Now verify that VALUE is really valid. */
6778 /* VALUENO is the register number of VALUE; a hard register. */
6780 /* Don't try to re-use something that is killed in this insn. We want
6781 to be able to trust REG_UNUSED notes. */
6782 if (REG_NOTES (where
) != 0 && find_reg_note (where
, REG_UNUSED
, value
))
6785 /* If we propose to get the value from the stack pointer or if GOAL is
6786 a MEM based on the stack pointer, we need a stable SP. */
6787 if (valueno
== STACK_POINTER_REGNUM
|| regno
== STACK_POINTER_REGNUM
6788 || (goal_mem
&& reg_overlap_mentioned_for_reload_p (stack_pointer_rtx
,
6792 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6793 if (GET_MODE (value
) != mode
)
6796 /* Reject VALUE if it was loaded from GOAL
6797 and is also a register that appears in the address of GOAL. */
6799 if (goal_mem
&& value
== SET_DEST (single_set (where
))
6800 && refers_to_regno_for_reload_p (valueno
, end_hard_regno (mode
, valueno
),
6804 /* Reject registers that overlap GOAL. */
6806 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
)
6807 nregs
= hard_regno_nregs
[regno
][mode
];
6810 valuenregs
= hard_regno_nregs
[valueno
][mode
];
6812 if (!goal_mem
&& !goal_const
6813 && regno
+ nregs
> valueno
&& regno
< valueno
+ valuenregs
)
6816 /* Reject VALUE if it is one of the regs reserved for reloads.
6817 Reload1 knows how to reuse them anyway, and it would get
6818 confused if we allocated one without its knowledge.
6819 (Now that insns introduced by reload are ignored above,
6820 this case shouldn't happen, but I'm not positive.) */
6822 if (reload_reg_p
!= 0 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6825 for (i
= 0; i
< valuenregs
; ++i
)
6826 if (reload_reg_p
[valueno
+ i
] >= 0)
6830 /* Reject VALUE if it is a register being used for an input reload
6831 even if it is not one of those reserved. */
6833 if (reload_reg_p
!= 0)
6836 for (i
= 0; i
< n_reloads
; i
++)
6837 if (rld
[i
].reg_rtx
!= 0 && rld
[i
].in
)
6839 int regno1
= REGNO (rld
[i
].reg_rtx
);
6840 int nregs1
= hard_regno_nregs
[regno1
]
6841 [GET_MODE (rld
[i
].reg_rtx
)];
6842 if (regno1
< valueno
+ valuenregs
6843 && regno1
+ nregs1
> valueno
)
6849 /* We must treat frame pointer as varying here,
6850 since it can vary--in a nonlocal goto as generated by expand_goto. */
6851 goal_mem_addr_varies
= !CONSTANT_ADDRESS_P (XEXP (goal
, 0));
6853 /* Now verify that the values of GOAL and VALUE remain unaltered
6854 until INSN is reached. */
6863 /* Don't trust the conversion past a function call
6864 if either of the two is in a call-clobbered register, or memory. */
6869 if (goal_mem
|| need_stable_sp
)
6872 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
)
6873 for (i
= 0; i
< nregs
; ++i
)
6874 if (call_used_regs
[regno
+ i
]
6875 || HARD_REGNO_CALL_PART_CLOBBERED (regno
+ i
, mode
))
6878 if (valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
)
6879 for (i
= 0; i
< valuenregs
; ++i
)
6880 if (call_used_regs
[valueno
+ i
]
6881 || HARD_REGNO_CALL_PART_CLOBBERED (valueno
+ i
, mode
))
6889 /* Watch out for unspec_volatile, and volatile asms. */
6890 if (volatile_insn_p (pat
))
6893 /* If this insn P stores in either GOAL or VALUE, return 0.
6894 If GOAL is a memory ref and this insn writes memory, return 0.
6895 If GOAL is a memory ref and its address is not constant,
6896 and this insn P changes a register used in GOAL, return 0. */
6898 if (GET_CODE (pat
) == COND_EXEC
)
6899 pat
= COND_EXEC_CODE (pat
);
6900 if (GET_CODE (pat
) == SET
|| GET_CODE (pat
) == CLOBBER
)
6902 rtx dest
= SET_DEST (pat
);
6903 while (GET_CODE (dest
) == SUBREG
6904 || GET_CODE (dest
) == ZERO_EXTRACT
6905 || GET_CODE (dest
) == STRICT_LOW_PART
)
6906 dest
= XEXP (dest
, 0);
6909 int xregno
= REGNO (dest
);
6911 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6912 xnregs
= hard_regno_nregs
[xregno
][GET_MODE (dest
)];
6915 if (xregno
< regno
+ nregs
&& xregno
+ xnregs
> regno
)
6917 if (xregno
< valueno
+ valuenregs
6918 && xregno
+ xnregs
> valueno
)
6920 if (goal_mem_addr_varies
6921 && reg_overlap_mentioned_for_reload_p (dest
, goal
))
6923 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6926 else if (goal_mem
&& MEM_P (dest
)
6927 && ! push_operand (dest
, GET_MODE (dest
)))
6929 else if (MEM_P (dest
) && regno
>= FIRST_PSEUDO_REGISTER
6930 && reg_equiv_memory_loc
[regno
] != 0)
6932 else if (need_stable_sp
&& push_operand (dest
, GET_MODE (dest
)))
6935 else if (GET_CODE (pat
) == PARALLEL
)
6938 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; i
--)
6940 rtx v1
= XVECEXP (pat
, 0, i
);
6941 if (GET_CODE (v1
) == COND_EXEC
)
6942 v1
= COND_EXEC_CODE (v1
);
6943 if (GET_CODE (v1
) == SET
|| GET_CODE (v1
) == CLOBBER
)
6945 rtx dest
= SET_DEST (v1
);
6946 while (GET_CODE (dest
) == SUBREG
6947 || GET_CODE (dest
) == ZERO_EXTRACT
6948 || GET_CODE (dest
) == STRICT_LOW_PART
)
6949 dest
= XEXP (dest
, 0);
6952 int xregno
= REGNO (dest
);
6954 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6955 xnregs
= hard_regno_nregs
[xregno
][GET_MODE (dest
)];
6958 if (xregno
< regno
+ nregs
6959 && xregno
+ xnregs
> regno
)
6961 if (xregno
< valueno
+ valuenregs
6962 && xregno
+ xnregs
> valueno
)
6964 if (goal_mem_addr_varies
6965 && reg_overlap_mentioned_for_reload_p (dest
,
6968 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6971 else if (goal_mem
&& MEM_P (dest
)
6972 && ! push_operand (dest
, GET_MODE (dest
)))
6974 else if (MEM_P (dest
) && regno
>= FIRST_PSEUDO_REGISTER
6975 && reg_equiv_memory_loc
[regno
] != 0)
6977 else if (need_stable_sp
6978 && push_operand (dest
, GET_MODE (dest
)))
6984 if (CALL_P (p
) && CALL_INSN_FUNCTION_USAGE (p
))
6988 for (link
= CALL_INSN_FUNCTION_USAGE (p
); XEXP (link
, 1) != 0;
6989 link
= XEXP (link
, 1))
6991 pat
= XEXP (link
, 0);
6992 if (GET_CODE (pat
) == CLOBBER
)
6994 rtx dest
= SET_DEST (pat
);
6998 int xregno
= REGNO (dest
);
7000 = hard_regno_nregs
[xregno
][GET_MODE (dest
)];
7002 if (xregno
< regno
+ nregs
7003 && xregno
+ xnregs
> regno
)
7005 else if (xregno
< valueno
+ valuenregs
7006 && xregno
+ xnregs
> valueno
)
7008 else if (goal_mem_addr_varies
7009 && reg_overlap_mentioned_for_reload_p (dest
,
7014 else if (goal_mem
&& MEM_P (dest
)
7015 && ! push_operand (dest
, GET_MODE (dest
)))
7017 else if (need_stable_sp
7018 && push_operand (dest
, GET_MODE (dest
)))
7025 /* If this insn auto-increments or auto-decrements
7026 either regno or valueno, return 0 now.
7027 If GOAL is a memory ref and its address is not constant,
7028 and this insn P increments a register used in GOAL, return 0. */
7032 for (link
= REG_NOTES (p
); link
; link
= XEXP (link
, 1))
7033 if (REG_NOTE_KIND (link
) == REG_INC
7034 && REG_P (XEXP (link
, 0)))
7036 int incno
= REGNO (XEXP (link
, 0));
7037 if (incno
< regno
+ nregs
&& incno
>= regno
)
7039 if (incno
< valueno
+ valuenregs
&& incno
>= valueno
)
7041 if (goal_mem_addr_varies
7042 && reg_overlap_mentioned_for_reload_p (XEXP (link
, 0),
7052 /* Find a place where INCED appears in an increment or decrement operator
7053 within X, and return the amount INCED is incremented or decremented by.
7054 The value is always positive. */
7057 find_inc_amount (rtx x
, rtx inced
)
7059 enum rtx_code code
= GET_CODE (x
);
7065 rtx addr
= XEXP (x
, 0);
7066 if ((GET_CODE (addr
) == PRE_DEC
7067 || GET_CODE (addr
) == POST_DEC
7068 || GET_CODE (addr
) == PRE_INC
7069 || GET_CODE (addr
) == POST_INC
)
7070 && XEXP (addr
, 0) == inced
)
7071 return GET_MODE_SIZE (GET_MODE (x
));
7072 else if ((GET_CODE (addr
) == PRE_MODIFY
7073 || GET_CODE (addr
) == POST_MODIFY
)
7074 && GET_CODE (XEXP (addr
, 1)) == PLUS
7075 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
7076 && XEXP (addr
, 0) == inced
7077 && GET_CODE (XEXP (XEXP (addr
, 1), 1)) == CONST_INT
)
7079 i
= INTVAL (XEXP (XEXP (addr
, 1), 1));
7080 return i
< 0 ? -i
: i
;
7084 fmt
= GET_RTX_FORMAT (code
);
7085 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
7089 int tem
= find_inc_amount (XEXP (x
, i
), inced
);
7096 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
7098 int tem
= find_inc_amount (XVECEXP (x
, i
, j
), inced
);
7108 /* Return 1 if registers from REGNO to ENDREGNO are the subjects of a
7109 REG_INC note in insn INSN. REGNO must refer to a hard register. */
7113 reg_inc_found_and_valid_p (unsigned int regno
, unsigned int endregno
,
7120 if (! INSN_P (insn
))
7123 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
7124 if (REG_NOTE_KIND (link
) == REG_INC
)
7126 unsigned int test
= (int) REGNO (XEXP (link
, 0));
7127 if (test
>= regno
&& test
< endregno
)
7134 #define reg_inc_found_and_valid_p(regno,endregno,insn) 0
7138 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
7139 If SETS is 1, also consider SETs. If SETS is 2, enable checking
7140 REG_INC. REGNO must refer to a hard register. */
7143 regno_clobbered_p (unsigned int regno
, rtx insn
, enum machine_mode mode
,
7146 unsigned int nregs
, endregno
;
7148 /* regno must be a hard register. */
7149 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
);
7151 nregs
= hard_regno_nregs
[regno
][mode
];
7152 endregno
= regno
+ nregs
;
7154 if ((GET_CODE (PATTERN (insn
)) == CLOBBER
7155 || (sets
== 1 && GET_CODE (PATTERN (insn
)) == SET
))
7156 && REG_P (XEXP (PATTERN (insn
), 0)))
7158 unsigned int test
= REGNO (XEXP (PATTERN (insn
), 0));
7160 return test
>= regno
&& test
< endregno
;
7163 if (sets
== 2 && reg_inc_found_and_valid_p (regno
, endregno
, insn
))
7166 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
7168 int i
= XVECLEN (PATTERN (insn
), 0) - 1;
7172 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
7173 if ((GET_CODE (elt
) == CLOBBER
7174 || (sets
== 1 && GET_CODE (PATTERN (insn
)) == SET
))
7175 && REG_P (XEXP (elt
, 0)))
7177 unsigned int test
= REGNO (XEXP (elt
, 0));
7179 if (test
>= regno
&& test
< endregno
)
7183 && reg_inc_found_and_valid_p (regno
, endregno
, elt
))
7191 /* Find the low part, with mode MODE, of a hard regno RELOADREG. */
7193 reload_adjust_reg_for_mode (rtx reloadreg
, enum machine_mode mode
)
7197 if (GET_MODE (reloadreg
) == mode
)
7200 regno
= REGNO (reloadreg
);
7202 if (WORDS_BIG_ENDIAN
)
7203 regno
+= (int) hard_regno_nregs
[regno
][GET_MODE (reloadreg
)]
7204 - (int) hard_regno_nregs
[regno
][mode
];
7206 return gen_rtx_REG (mode
, regno
);
7209 static const char *const reload_when_needed_name
[] =
7212 "RELOAD_FOR_OUTPUT",
7214 "RELOAD_FOR_INPUT_ADDRESS",
7215 "RELOAD_FOR_INPADDR_ADDRESS",
7216 "RELOAD_FOR_OUTPUT_ADDRESS",
7217 "RELOAD_FOR_OUTADDR_ADDRESS",
7218 "RELOAD_FOR_OPERAND_ADDRESS",
7219 "RELOAD_FOR_OPADDR_ADDR",
7221 "RELOAD_FOR_OTHER_ADDRESS"
7224 /* These functions are used to print the variables set by 'find_reloads' */
7227 debug_reload_to_stream (FILE *f
)
7234 for (r
= 0; r
< n_reloads
; r
++)
7236 fprintf (f
, "Reload %d: ", r
);
7240 fprintf (f
, "reload_in (%s) = ",
7241 GET_MODE_NAME (rld
[r
].inmode
));
7242 print_inline_rtx (f
, rld
[r
].in
, 24);
7243 fprintf (f
, "\n\t");
7246 if (rld
[r
].out
!= 0)
7248 fprintf (f
, "reload_out (%s) = ",
7249 GET_MODE_NAME (rld
[r
].outmode
));
7250 print_inline_rtx (f
, rld
[r
].out
, 24);
7251 fprintf (f
, "\n\t");
7254 fprintf (f
, "%s, ", reg_class_names
[(int) rld
[r
].class]);
7256 fprintf (f
, "%s (opnum = %d)",
7257 reload_when_needed_name
[(int) rld
[r
].when_needed
],
7260 if (rld
[r
].optional
)
7261 fprintf (f
, ", optional");
7263 if (rld
[r
].nongroup
)
7264 fprintf (f
, ", nongroup");
7266 if (rld
[r
].inc
!= 0)
7267 fprintf (f
, ", inc by %d", rld
[r
].inc
);
7269 if (rld
[r
].nocombine
)
7270 fprintf (f
, ", can't combine");
7272 if (rld
[r
].secondary_p
)
7273 fprintf (f
, ", secondary_reload_p");
7275 if (rld
[r
].in_reg
!= 0)
7277 fprintf (f
, "\n\treload_in_reg: ");
7278 print_inline_rtx (f
, rld
[r
].in_reg
, 24);
7281 if (rld
[r
].out_reg
!= 0)
7283 fprintf (f
, "\n\treload_out_reg: ");
7284 print_inline_rtx (f
, rld
[r
].out_reg
, 24);
7287 if (rld
[r
].reg_rtx
!= 0)
7289 fprintf (f
, "\n\treload_reg_rtx: ");
7290 print_inline_rtx (f
, rld
[r
].reg_rtx
, 24);
7294 if (rld
[r
].secondary_in_reload
!= -1)
7296 fprintf (f
, "%ssecondary_in_reload = %d",
7297 prefix
, rld
[r
].secondary_in_reload
);
7301 if (rld
[r
].secondary_out_reload
!= -1)
7302 fprintf (f
, "%ssecondary_out_reload = %d\n",
7303 prefix
, rld
[r
].secondary_out_reload
);
7306 if (rld
[r
].secondary_in_icode
!= CODE_FOR_nothing
)
7308 fprintf (f
, "%ssecondary_in_icode = %s", prefix
,
7309 insn_data
[rld
[r
].secondary_in_icode
].name
);
7313 if (rld
[r
].secondary_out_icode
!= CODE_FOR_nothing
)
7314 fprintf (f
, "%ssecondary_out_icode = %s", prefix
,
7315 insn_data
[rld
[r
].secondary_out_icode
].name
);
7324 debug_reload_to_stream (stderr
);