* config/bfin/bfin.md (addpdi3, us_truncpdisi2): New patterns.
[official-gcc/alias-decl.git] / gcc / config / bfin / lib1funcs.asm
blobc8d7fe855cf0075691a20c254d3f37ae87ae3700
1 /* libgcc functions for Blackfin.
2 Copyright (C) 2005 Free Software Foundation, Inc.
3 Contributed by Analog Devices.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
12 GCC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to
19 the Free Software Foundation, 51 Franklin Street, Fifth Floor,
20 Boston, MA 02110-1301, USA. */
22 /* As a special exception, if you link this library with files
23 compiled with GCC to produce an executable, this does not cause
24 the resulting executable to be covered by the GNU General Public License.
25 This exception does not however invalidate any other reasons why
26 the executable file might be covered by the GNU General Public License. */
29 #ifdef L_divsi3
30 .text
31 .align 2
32 .global ___divsi3;
33 .type ___divsi3, STT_FUNC;
35 ___divsi3:
36 [--SP]= RETS;
37 [--SP] = R7;
39 R2 = -R0;
40 CC = R0 < 0;
41 IF CC R0 = R2;
42 R7 = CC;
44 R2 = -R1;
45 CC = R1 < 0;
46 IF CC R1 = R2;
47 R2 = CC;
48 R7 = R7 ^ R2;
50 CALL ___udivsi3;
52 CC = R7;
53 R1 = -R0;
54 IF CC R0 = R1;
56 R7 = [SP++];
57 RETS = [SP++];
58 RTS;
59 #endif
61 #ifdef L_modsi3
62 .align 2
63 .global ___modsi3;
64 .type ___modsi3, STT_FUNC;
66 ___modsi3:
67 [--SP] = RETS;
68 [--SP] = R0;
69 [--SP] = R1;
70 CALL ___divsi3;
71 R2 = [SP++];
72 R1 = [SP++];
73 R2 *= R0;
74 R0 = R1 - R2;
75 RETS = [SP++];
76 RTS;
77 #endif
79 #ifdef L_udivsi3
80 .align 2
81 .global ___udivsi3;
82 .type ___udivsi3, STT_FUNC;
84 ___udivsi3:
85 P0 = 32;
86 LSETUP (0f, 1f) LC0 = P0;
87 /* upper half of dividend */
88 R3 = 0;
90 /* The first time round in the loop we shift in garbage, but since we
91 perform 33 shifts, it doesn't matter. */
92 R0 = ROT R0 BY 1;
93 R3 = ROT R3 BY 1;
94 R2 = R3 - R1;
95 CC = R3 < R1 (IU);
97 /* Last instruction of the loop. */
98 IF ! CC R3 = R2;
100 /* Shift in the last bit. */
101 R0 = ROT R0 BY 1;
102 /* R0 is the result, R3 contains the remainder. */
103 R0 = ~ R0;
104 RTS;
105 #endif
107 #ifdef L_umodsi3
108 .align 2
109 .global ___umodsi3;
110 .type ___umodsi3, STT_FUNC;
112 ___umodsi3:
113 [--SP] = RETS;
114 CALL ___udivsi3;
115 R0 = R3;
116 RETS = [SP++];
117 RTS;
118 #endif
120 #ifdef L_umulsi3_highpart
121 .align 2
122 .global ___umulsi3_highpart;
123 .type ___umulsi3_highpart, STT_FUNC;
125 ___umulsi3_highpart:
126 A1 = R1.L * R0.L (FU);
127 A1 = A1 >> 16;
128 A0 = R1.H * R0.H, A1 += R1.L * R0.H (FU);
129 A1 += R0.L * R1.H (FU);
130 A1 = A1 >> 16;
131 A0 += A1;
132 R0 = A0 (FU);
133 RTS;
134 #endif
136 #ifdef L_smulsi3_highpart
137 .align 2
138 .global ___smulsi3_highpart;
139 .type ___smulsi3_highpart, STT_FUNC;
141 ___smulsi3_highpart:
142 A1 = R1.L * R0.L (FU);
143 A1 = A1 >> 16;
144 A0 = R0.H * R1.H, A1 += R0.H * R1.L (IS,M);
145 A1 += R1.H * R0.L (IS,M);
146 A1 = A1 >>> 16;
147 R0 = (A0 += A1);
148 RTS;
149 #endif