1 /* Decompose multiword subregs.
2 Copyright (C) 2007, 2008, 2009 Free Software Foundation, Inc.
3 Contributed by Richard Henderson <rth@redhat.com>
4 Ian Lance Taylor <iant@google.com>
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
24 #include "coretypes.h"
31 #include "insn-config.h"
33 #include "basic-block.h"
39 #include "tree-pass.h"
42 #ifdef STACK_GROWS_DOWNWARD
43 # undef STACK_GROWS_DOWNWARD
44 # define STACK_GROWS_DOWNWARD 1
46 # define STACK_GROWS_DOWNWARD 0
50 DEF_VEC_ALLOC_P (bitmap
,heap
);
52 /* Decompose multi-word pseudo-registers into individual
53 pseudo-registers when possible. This is possible when all the uses
54 of a multi-word register are via SUBREG, or are copies of the
55 register to another location. Breaking apart the register permits
56 more CSE and permits better register allocation. */
58 /* Bit N in this bitmap is set if regno N is used in a context in
59 which we can decompose it. */
60 static bitmap decomposable_context
;
62 /* Bit N in this bitmap is set if regno N is used in a context in
63 which it can not be decomposed. */
64 static bitmap non_decomposable_context
;
66 /* Bit N in the bitmap in element M of this array is set if there is a
67 copy from reg M to reg N. */
68 static VEC(bitmap
,heap
) *reg_copy_graph
;
70 /* Return whether X is a simple object which we can take a word_mode
74 simple_move_operand (rtx x
)
76 if (GET_CODE (x
) == SUBREG
)
82 if (GET_CODE (x
) == LABEL_REF
83 || GET_CODE (x
) == SYMBOL_REF
84 || GET_CODE (x
) == HIGH
85 || GET_CODE (x
) == CONST
)
89 && (MEM_VOLATILE_P (x
)
90 || mode_dependent_address_p (XEXP (x
, 0))))
96 /* If INSN is a single set between two objects, return the single set.
97 Such an insn can always be decomposed. INSN should have been
98 passed to recog and extract_insn before this is called. */
101 simple_move (rtx insn
)
105 enum machine_mode mode
;
107 if (recog_data
.n_operands
!= 2)
110 set
= single_set (insn
);
115 if (x
!= recog_data
.operand
[0] && x
!= recog_data
.operand
[1])
117 if (!simple_move_operand (x
))
121 if (x
!= recog_data
.operand
[0] && x
!= recog_data
.operand
[1])
123 /* For the src we can handle ASM_OPERANDS, and it is beneficial for
124 things like x86 rdtsc which returns a DImode value. */
125 if (GET_CODE (x
) != ASM_OPERANDS
126 && !simple_move_operand (x
))
129 /* We try to decompose in integer modes, to avoid generating
130 inefficient code copying between integer and floating point
131 registers. That means that we can't decompose if this is a
132 non-integer mode for which there is no integer mode of the same
134 mode
= GET_MODE (SET_SRC (set
));
135 if (!SCALAR_INT_MODE_P (mode
)
136 && (mode_for_size (GET_MODE_SIZE (mode
) * BITS_PER_UNIT
, MODE_INT
, 0)
140 /* Reject PARTIAL_INT modes. They are used for processor specific
141 purposes and it's probably best not to tamper with them. */
142 if (GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
148 /* If SET is a copy from one multi-word pseudo-register to another,
149 record that in reg_copy_graph. Return whether it is such a
153 find_pseudo_copy (rtx set
)
155 rtx dest
= SET_DEST (set
);
156 rtx src
= SET_SRC (set
);
160 if (!REG_P (dest
) || !REG_P (src
))
165 if (HARD_REGISTER_NUM_P (rd
) || HARD_REGISTER_NUM_P (rs
))
168 if (GET_MODE_SIZE (GET_MODE (dest
)) <= UNITS_PER_WORD
)
171 b
= VEC_index (bitmap
, reg_copy_graph
, rs
);
174 b
= BITMAP_ALLOC (NULL
);
175 VEC_replace (bitmap
, reg_copy_graph
, rs
, b
);
178 bitmap_set_bit (b
, rd
);
183 /* Look through the registers in DECOMPOSABLE_CONTEXT. For each case
184 where they are copied to another register, add the register to
185 which they are copied to DECOMPOSABLE_CONTEXT. Use
186 NON_DECOMPOSABLE_CONTEXT to limit this--we don't bother to track
187 copies of registers which are in NON_DECOMPOSABLE_CONTEXT. */
190 propagate_pseudo_copies (void)
192 bitmap queue
, propagate
;
194 queue
= BITMAP_ALLOC (NULL
);
195 propagate
= BITMAP_ALLOC (NULL
);
197 bitmap_copy (queue
, decomposable_context
);
200 bitmap_iterator iter
;
203 bitmap_clear (propagate
);
205 EXECUTE_IF_SET_IN_BITMAP (queue
, 0, i
, iter
)
207 bitmap b
= VEC_index (bitmap
, reg_copy_graph
, i
);
209 bitmap_ior_and_compl_into (propagate
, b
, non_decomposable_context
);
212 bitmap_and_compl (queue
, propagate
, decomposable_context
);
213 bitmap_ior_into (decomposable_context
, propagate
);
215 while (!bitmap_empty_p (queue
));
218 BITMAP_FREE (propagate
);
221 /* A pointer to one of these values is passed to
222 find_decomposable_subregs via for_each_rtx. */
224 enum classify_move_insn
226 /* Not a simple move from one location to another. */
228 /* A simple move from one pseudo-register to another. */
229 SIMPLE_PSEUDO_REG_MOVE
,
230 /* A simple move involving a non-pseudo-register. */
234 /* This is called via for_each_rtx. If we find a SUBREG which we
235 could use to decompose a pseudo-register, set a bit in
236 DECOMPOSABLE_CONTEXT. If we find an unadorned register which is
237 not a simple pseudo-register copy, DATA will point at the type of
238 move, and we set a bit in DECOMPOSABLE_CONTEXT or
239 NON_DECOMPOSABLE_CONTEXT as appropriate. */
242 find_decomposable_subregs (rtx
*px
, void *data
)
244 enum classify_move_insn
*pcmi
= (enum classify_move_insn
*) data
;
250 if (GET_CODE (x
) == SUBREG
)
252 rtx inner
= SUBREG_REG (x
);
253 unsigned int regno
, outer_size
, inner_size
, outer_words
, inner_words
;
258 regno
= REGNO (inner
);
259 if (HARD_REGISTER_NUM_P (regno
))
262 outer_size
= GET_MODE_SIZE (GET_MODE (x
));
263 inner_size
= GET_MODE_SIZE (GET_MODE (inner
));
264 outer_words
= (outer_size
+ UNITS_PER_WORD
- 1) / UNITS_PER_WORD
;
265 inner_words
= (inner_size
+ UNITS_PER_WORD
- 1) / UNITS_PER_WORD
;
267 /* We only try to decompose single word subregs of multi-word
268 registers. When we find one, we return -1 to avoid iterating
269 over the inner register.
271 ??? This doesn't allow, e.g., DImode subregs of TImode values
272 on 32-bit targets. We would need to record the way the
273 pseudo-register was used, and only decompose if all the uses
274 were the same number and size of pieces. Hopefully this
275 doesn't happen much. */
277 if (outer_words
== 1 && inner_words
> 1)
279 bitmap_set_bit (decomposable_context
, regno
);
283 /* If this is a cast from one mode to another, where the modes
284 have the same size, and they are not tieable, then mark this
285 register as non-decomposable. If we decompose it we are
286 likely to mess up whatever the backend is trying to do. */
288 && outer_size
== inner_size
289 && !MODES_TIEABLE_P (GET_MODE (x
), GET_MODE (inner
)))
291 bitmap_set_bit (non_decomposable_context
, regno
);
299 /* We will see an outer SUBREG before we see the inner REG, so
300 when we see a plain REG here it means a direct reference to
303 If this is not a simple copy from one location to another,
304 then we can not decompose this register. If this is a simple
305 copy from one pseudo-register to another, and the mode is right
306 then we mark the register as decomposable.
307 Otherwise we don't say anything about this register --
308 it could be decomposed, but whether that would be
309 profitable depends upon how it is used elsewhere.
311 We only set bits in the bitmap for multi-word
312 pseudo-registers, since those are the only ones we care about
313 and it keeps the size of the bitmaps down. */
316 if (!HARD_REGISTER_NUM_P (regno
)
317 && GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
)
321 case NOT_SIMPLE_MOVE
:
322 bitmap_set_bit (non_decomposable_context
, regno
);
324 case SIMPLE_PSEUDO_REG_MOVE
:
325 if (MODES_TIEABLE_P (GET_MODE (x
), word_mode
))
326 bitmap_set_bit (decomposable_context
, regno
);
337 enum classify_move_insn cmi_mem
= NOT_SIMPLE_MOVE
;
339 /* Any registers used in a MEM do not participate in a
340 SIMPLE_MOVE or SIMPLE_PSEUDO_REG_MOVE. Do our own recursion
341 here, and return -1 to block the parent's recursion. */
342 for_each_rtx (&XEXP (x
, 0), find_decomposable_subregs
, &cmi_mem
);
349 /* Decompose REGNO into word-sized components. We smash the REG node
350 in place. This ensures that (1) something goes wrong quickly if we
351 fail to make some replacement, and (2) the debug information inside
352 the symbol table is automatically kept up to date. */
355 decompose_register (unsigned int regno
)
358 unsigned int words
, i
;
361 reg
= regno_reg_rtx
[regno
];
363 regno_reg_rtx
[regno
] = NULL_RTX
;
365 words
= GET_MODE_SIZE (GET_MODE (reg
));
366 words
= (words
+ UNITS_PER_WORD
- 1) / UNITS_PER_WORD
;
368 v
= rtvec_alloc (words
);
369 for (i
= 0; i
< words
; ++i
)
370 RTVEC_ELT (v
, i
) = gen_reg_rtx_offset (reg
, word_mode
, i
* UNITS_PER_WORD
);
372 PUT_CODE (reg
, CONCATN
);
377 fprintf (dump_file
, "; Splitting reg %u ->", regno
);
378 for (i
= 0; i
< words
; ++i
)
379 fprintf (dump_file
, " %u", REGNO (XVECEXP (reg
, 0, i
)));
380 fputc ('\n', dump_file
);
384 /* Get a SUBREG of a CONCATN. */
387 simplify_subreg_concatn (enum machine_mode outermode
, rtx op
,
390 unsigned int inner_size
;
391 enum machine_mode innermode
;
393 unsigned int final_offset
;
395 gcc_assert (GET_CODE (op
) == CONCATN
);
396 gcc_assert (byte
% GET_MODE_SIZE (outermode
) == 0);
398 innermode
= GET_MODE (op
);
399 gcc_assert (byte
< GET_MODE_SIZE (innermode
));
400 gcc_assert (GET_MODE_SIZE (outermode
) <= GET_MODE_SIZE (innermode
));
402 inner_size
= GET_MODE_SIZE (innermode
) / XVECLEN (op
, 0);
403 part
= XVECEXP (op
, 0, byte
/ inner_size
);
404 final_offset
= byte
% inner_size
;
405 if (final_offset
+ GET_MODE_SIZE (outermode
) > inner_size
)
408 return simplify_gen_subreg (outermode
, part
, GET_MODE (part
), final_offset
);
411 /* Wrapper around simplify_gen_subreg which handles CONCATN. */
414 simplify_gen_subreg_concatn (enum machine_mode outermode
, rtx op
,
415 enum machine_mode innermode
, unsigned int byte
)
419 /* We have to handle generating a SUBREG of a SUBREG of a CONCATN.
420 If OP is a SUBREG of a CONCATN, then it must be a simple mode
421 change with the same size and offset 0, or it must extract a
422 part. We shouldn't see anything else here. */
423 if (GET_CODE (op
) == SUBREG
&& GET_CODE (SUBREG_REG (op
)) == CONCATN
)
427 if ((GET_MODE_SIZE (GET_MODE (op
))
428 == GET_MODE_SIZE (GET_MODE (SUBREG_REG (op
))))
429 && SUBREG_BYTE (op
) == 0)
430 return simplify_gen_subreg_concatn (outermode
, SUBREG_REG (op
),
431 GET_MODE (SUBREG_REG (op
)), byte
);
433 op2
= simplify_subreg_concatn (GET_MODE (op
), SUBREG_REG (op
),
437 /* We don't handle paradoxical subregs here. */
438 gcc_assert (GET_MODE_SIZE (outermode
)
439 <= GET_MODE_SIZE (GET_MODE (op
)));
440 gcc_assert (GET_MODE_SIZE (GET_MODE (op
))
441 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (op
))));
442 op2
= simplify_subreg_concatn (outermode
, SUBREG_REG (op
),
443 byte
+ SUBREG_BYTE (op
));
444 gcc_assert (op2
!= NULL_RTX
);
449 gcc_assert (op
!= NULL_RTX
);
450 gcc_assert (innermode
== GET_MODE (op
));
453 if (GET_CODE (op
) == CONCATN
)
454 return simplify_subreg_concatn (outermode
, op
, byte
);
456 ret
= simplify_gen_subreg (outermode
, op
, innermode
, byte
);
458 /* If we see an insn like (set (reg:DI) (subreg:DI (reg:SI) 0)) then
459 resolve_simple_move will ask for the high part of the paradoxical
460 subreg, which does not have a value. Just return a zero. */
462 && GET_CODE (op
) == SUBREG
463 && SUBREG_BYTE (op
) == 0
464 && (GET_MODE_SIZE (innermode
)
465 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op
)))))
466 return CONST0_RTX (outermode
);
468 gcc_assert (ret
!= NULL_RTX
);
472 /* Return whether we should resolve X into the registers into which it
476 resolve_reg_p (rtx x
)
478 return GET_CODE (x
) == CONCATN
;
481 /* Return whether X is a SUBREG of a register which we need to
485 resolve_subreg_p (rtx x
)
487 if (GET_CODE (x
) != SUBREG
)
489 return resolve_reg_p (SUBREG_REG (x
));
492 /* This is called via for_each_rtx. Look for SUBREGs which need to be
496 resolve_subreg_use (rtx
*px
, void *data
)
498 rtx insn
= (rtx
) data
;
504 if (resolve_subreg_p (x
))
506 x
= simplify_subreg_concatn (GET_MODE (x
), SUBREG_REG (x
),
509 /* It is possible for a note to contain a reference which we can
510 decompose. In this case, return 1 to the caller to indicate
511 that the note must be removed. */
518 validate_change (insn
, px
, x
, 1);
522 if (resolve_reg_p (x
))
524 /* Return 1 to the caller to indicate that we found a direct
525 reference to a register which is being decomposed. This can
526 happen inside notes, multiword shift or zero-extend
534 /* This is called via for_each_rtx. Look for SUBREGs which can be
535 decomposed and decomposed REGs that need copying. */
538 adjust_decomposed_uses (rtx
*px
, void *data ATTRIBUTE_UNUSED
)
545 if (resolve_subreg_p (x
))
547 x
= simplify_subreg_concatn (GET_MODE (x
), SUBREG_REG (x
),
556 if (resolve_reg_p (x
))
562 /* We are deleting INSN. Move any EH_REGION notes to INSNS. */
565 move_eh_region_note (rtx insn
, rtx insns
)
569 note
= find_reg_note (insn
, REG_EH_REGION
, NULL_RTX
);
570 if (note
== NULL_RTX
)
573 gcc_assert (CALL_P (insn
)
574 || (flag_non_call_exceptions
&& may_trap_p (PATTERN (insn
))));
576 for (p
= insns
; p
!= NULL_RTX
; p
= NEXT_INSN (p
))
579 || (flag_non_call_exceptions
581 && may_trap_p (PATTERN (p
))))
582 add_reg_note (p
, REG_EH_REGION
, XEXP (note
, 0));
586 /* Resolve any decomposed registers which appear in register notes on
590 resolve_reg_notes (rtx insn
)
594 note
= find_reg_equal_equiv_note (insn
);
597 int old_count
= num_validated_changes ();
598 if (for_each_rtx (&XEXP (note
, 0), resolve_subreg_use
, NULL
))
599 remove_note (insn
, note
);
601 if (old_count
!= num_validated_changes ())
602 df_notes_rescan (insn
);
605 pnote
= ®_NOTES (insn
);
606 while (*pnote
!= NULL_RTX
)
611 switch (REG_NOTE_KIND (note
))
615 if (resolve_reg_p (XEXP (note
, 0)))
624 *pnote
= XEXP (note
, 1);
626 pnote
= &XEXP (note
, 1);
630 /* Return whether X can be decomposed into subwords. */
633 can_decompose_p (rtx x
)
637 unsigned int regno
= REGNO (x
);
639 if (HARD_REGISTER_NUM_P (regno
))
640 return (validate_subreg (word_mode
, GET_MODE (x
), x
, UNITS_PER_WORD
)
641 && HARD_REGNO_MODE_OK (regno
, word_mode
));
643 return !bitmap_bit_p (non_decomposable_context
, regno
);
649 /* Decompose the registers used in a simple move SET within INSN. If
650 we don't change anything, return INSN, otherwise return the start
651 of the sequence of moves. */
654 resolve_simple_move (rtx set
, rtx insn
)
656 rtx src
, dest
, real_dest
, insns
;
657 enum machine_mode orig_mode
, dest_mode
;
662 dest
= SET_DEST (set
);
663 orig_mode
= GET_MODE (dest
);
665 words
= (GET_MODE_SIZE (orig_mode
) + UNITS_PER_WORD
- 1) / UNITS_PER_WORD
;
671 /* We have to handle copying from a SUBREG of a decomposed reg where
672 the SUBREG is larger than word size. Rather than assume that we
673 can take a word_mode SUBREG of the destination, we copy to a new
674 register and then copy that to the destination. */
676 real_dest
= NULL_RTX
;
678 if (GET_CODE (src
) == SUBREG
679 && resolve_reg_p (SUBREG_REG (src
))
680 && (SUBREG_BYTE (src
) != 0
681 || (GET_MODE_SIZE (orig_mode
)
682 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
))))))
685 dest
= gen_reg_rtx (orig_mode
);
686 if (REG_P (real_dest
))
687 REG_ATTRS (dest
) = REG_ATTRS (real_dest
);
690 /* Similarly if we are copying to a SUBREG of a decomposed reg where
691 the SUBREG is larger than word size. */
693 if (GET_CODE (dest
) == SUBREG
694 && resolve_reg_p (SUBREG_REG (dest
))
695 && (SUBREG_BYTE (dest
) != 0
696 || (GET_MODE_SIZE (orig_mode
)
697 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))))
699 rtx reg
, minsn
, smove
;
701 reg
= gen_reg_rtx (orig_mode
);
702 minsn
= emit_move_insn (reg
, src
);
703 smove
= single_set (minsn
);
704 gcc_assert (smove
!= NULL_RTX
);
705 resolve_simple_move (smove
, minsn
);
709 /* If we didn't have any big SUBREGS of decomposed registers, and
710 neither side of the move is a register we are decomposing, then
711 we don't have to do anything here. */
713 if (src
== SET_SRC (set
)
714 && dest
== SET_DEST (set
)
715 && !resolve_reg_p (src
)
716 && !resolve_subreg_p (src
)
717 && !resolve_reg_p (dest
)
718 && !resolve_subreg_p (dest
))
724 /* It's possible for the code to use a subreg of a decomposed
725 register while forming an address. We need to handle that before
726 passing the address to emit_move_insn. We pass NULL_RTX as the
727 insn parameter to resolve_subreg_use because we can not validate
729 if (MEM_P (src
) || MEM_P (dest
))
734 for_each_rtx (&XEXP (src
, 0), resolve_subreg_use
, NULL_RTX
);
736 for_each_rtx (&XEXP (dest
, 0), resolve_subreg_use
, NULL_RTX
);
737 acg
= apply_change_group ();
741 /* If SRC is a register which we can't decompose, or has side
742 effects, we need to move via a temporary register. */
744 if (!can_decompose_p (src
)
745 || side_effects_p (src
)
746 || GET_CODE (src
) == ASM_OPERANDS
)
750 reg
= gen_reg_rtx (orig_mode
);
751 emit_move_insn (reg
, src
);
755 /* If DEST is a register which we can't decompose, or has side
756 effects, we need to first move to a temporary register. We
757 handle the common case of pushing an operand directly. We also
758 go through a temporary register if it holds a floating point
759 value. This gives us better code on systems which can't move
760 data easily between integer and floating point registers. */
762 dest_mode
= orig_mode
;
763 pushing
= push_operand (dest
, dest_mode
);
764 if (!can_decompose_p (dest
)
765 || (side_effects_p (dest
) && !pushing
)
766 || (!SCALAR_INT_MODE_P (dest_mode
)
767 && !resolve_reg_p (dest
)
768 && !resolve_subreg_p (dest
)))
770 if (real_dest
== NULL_RTX
)
772 if (!SCALAR_INT_MODE_P (dest_mode
))
774 dest_mode
= mode_for_size (GET_MODE_SIZE (dest_mode
) * BITS_PER_UNIT
,
776 gcc_assert (dest_mode
!= BLKmode
);
778 dest
= gen_reg_rtx (dest_mode
);
779 if (REG_P (real_dest
))
780 REG_ATTRS (dest
) = REG_ATTRS (real_dest
);
785 unsigned int i
, j
, jinc
;
787 gcc_assert (GET_MODE_SIZE (orig_mode
) % UNITS_PER_WORD
== 0);
788 gcc_assert (GET_CODE (XEXP (dest
, 0)) != PRE_MODIFY
);
789 gcc_assert (GET_CODE (XEXP (dest
, 0)) != POST_MODIFY
);
791 if (WORDS_BIG_ENDIAN
== STACK_GROWS_DOWNWARD
)
802 for (i
= 0; i
< words
; ++i
, j
+= jinc
)
806 temp
= copy_rtx (XEXP (dest
, 0));
807 temp
= adjust_automodify_address_nv (dest
, word_mode
, temp
,
809 emit_move_insn (temp
,
810 simplify_gen_subreg_concatn (word_mode
, src
,
812 j
* UNITS_PER_WORD
));
819 if (REG_P (dest
) && !HARD_REGISTER_NUM_P (REGNO (dest
)))
822 for (i
= 0; i
< words
; ++i
)
823 emit_move_insn (simplify_gen_subreg_concatn (word_mode
, dest
,
826 simplify_gen_subreg_concatn (word_mode
, src
,
828 i
* UNITS_PER_WORD
));
831 if (real_dest
!= NULL_RTX
)
833 rtx mdest
, minsn
, smove
;
835 if (dest_mode
== orig_mode
)
838 mdest
= simplify_gen_subreg (orig_mode
, dest
, GET_MODE (dest
), 0);
839 minsn
= emit_move_insn (real_dest
, mdest
);
841 smove
= single_set (minsn
);
842 gcc_assert (smove
!= NULL_RTX
);
844 resolve_simple_move (smove
, minsn
);
847 insns
= get_insns ();
850 move_eh_region_note (insn
, insns
);
852 emit_insn_before (insns
, insn
);
859 /* Change a CLOBBER of a decomposed register into a CLOBBER of the
860 component registers. Return whether we changed something. */
863 resolve_clobber (rtx pat
, rtx insn
)
866 enum machine_mode orig_mode
;
867 unsigned int words
, i
;
871 if (!resolve_reg_p (reg
) && !resolve_subreg_p (reg
))
874 orig_mode
= GET_MODE (reg
);
875 words
= GET_MODE_SIZE (orig_mode
);
876 words
= (words
+ UNITS_PER_WORD
- 1) / UNITS_PER_WORD
;
878 ret
= validate_change (NULL_RTX
, &XEXP (pat
, 0),
879 simplify_gen_subreg_concatn (word_mode
, reg
,
882 df_insn_rescan (insn
);
883 gcc_assert (ret
!= 0);
885 for (i
= words
- 1; i
> 0; --i
)
889 x
= simplify_gen_subreg_concatn (word_mode
, reg
, orig_mode
,
891 x
= gen_rtx_CLOBBER (VOIDmode
, x
);
892 emit_insn_after (x
, insn
);
895 resolve_reg_notes (insn
);
900 /* A USE of a decomposed register is no longer meaningful. Return
901 whether we changed something. */
904 resolve_use (rtx pat
, rtx insn
)
906 if (resolve_reg_p (XEXP (pat
, 0)) || resolve_subreg_p (XEXP (pat
, 0)))
912 resolve_reg_notes (insn
);
917 /* A VAR_LOCATION can be simplified. */
920 resolve_debug (rtx insn
)
922 for_each_rtx (&PATTERN (insn
), adjust_decomposed_uses
, NULL_RTX
);
924 df_insn_rescan (insn
);
926 resolve_reg_notes (insn
);
929 /* Checks if INSN is a decomposable multiword-shift or zero-extend and
930 sets the decomposable_context bitmap accordingly. A non-zero value
931 is returned if a decomposable insn has been found. */
934 find_decomposable_shift_zext (rtx insn
)
940 set
= single_set (insn
);
945 if (GET_CODE (op
) != ASHIFT
946 && GET_CODE (op
) != LSHIFTRT
947 && GET_CODE (op
) != ZERO_EXTEND
)
950 op_operand
= XEXP (op
, 0);
951 if (!REG_P (SET_DEST (set
)) || !REG_P (op_operand
)
952 || HARD_REGISTER_NUM_P (REGNO (SET_DEST (set
)))
953 || HARD_REGISTER_NUM_P (REGNO (op_operand
))
954 || !SCALAR_INT_MODE_P (GET_MODE (op
)))
957 if (GET_CODE (op
) == ZERO_EXTEND
)
959 if (GET_MODE (op_operand
) != word_mode
960 || GET_MODE_BITSIZE (GET_MODE (op
)) != 2 * BITS_PER_WORD
)
963 else /* left or right shift */
965 if (!CONST_INT_P (XEXP (op
, 1))
966 || INTVAL (XEXP (op
, 1)) < BITS_PER_WORD
967 || GET_MODE_BITSIZE (GET_MODE (op_operand
)) != 2 * BITS_PER_WORD
)
971 bitmap_set_bit (decomposable_context
, REGNO (SET_DEST (set
)));
973 if (GET_CODE (op
) != ZERO_EXTEND
)
974 bitmap_set_bit (decomposable_context
, REGNO (op_operand
));
979 /* Decompose a more than word wide shift (in INSN) of a multiword
980 pseudo or a multiword zero-extend of a wordmode pseudo into a move
981 and 'set to zero' insn. Return a pointer to the new insn when a
982 replacement was done. */
985 resolve_shift_zext (rtx insn
)
991 rtx src_reg
, dest_reg
, dest_zero
;
992 int src_reg_num
, dest_reg_num
, offset1
, offset2
, src_offset
;
994 set
= single_set (insn
);
999 if (GET_CODE (op
) != ASHIFT
1000 && GET_CODE (op
) != LSHIFTRT
1001 && GET_CODE (op
) != ZERO_EXTEND
)
1004 op_operand
= XEXP (op
, 0);
1006 if (!resolve_reg_p (SET_DEST (set
)) && !resolve_reg_p (op_operand
))
1009 /* src_reg_num is the number of the word mode register which we
1010 are operating on. For a left shift and a zero_extend on little
1011 endian machines this is register 0. */
1012 src_reg_num
= GET_CODE (op
) == LSHIFTRT
? 1 : 0;
1014 if (WORDS_BIG_ENDIAN
1015 && GET_MODE_SIZE (GET_MODE (op_operand
)) > UNITS_PER_WORD
)
1016 src_reg_num
= 1 - src_reg_num
;
1018 if (GET_CODE (op
) == ZERO_EXTEND
)
1019 dest_reg_num
= WORDS_BIG_ENDIAN
? 1 : 0;
1021 dest_reg_num
= 1 - src_reg_num
;
1023 offset1
= UNITS_PER_WORD
* dest_reg_num
;
1024 offset2
= UNITS_PER_WORD
* (1 - dest_reg_num
);
1025 src_offset
= UNITS_PER_WORD
* src_reg_num
;
1027 if (WORDS_BIG_ENDIAN
!= BYTES_BIG_ENDIAN
)
1029 offset1
+= UNITS_PER_WORD
- 1;
1030 offset2
+= UNITS_PER_WORD
- 1;
1031 src_offset
+= UNITS_PER_WORD
- 1;
1036 dest_reg
= simplify_gen_subreg_concatn (word_mode
, SET_DEST (set
),
1037 GET_MODE (SET_DEST (set
)),
1039 dest_zero
= simplify_gen_subreg_concatn (word_mode
, SET_DEST (set
),
1040 GET_MODE (SET_DEST (set
)),
1042 src_reg
= simplify_gen_subreg_concatn (word_mode
, op_operand
,
1043 GET_MODE (op_operand
),
1045 if (GET_CODE (op
) != ZERO_EXTEND
)
1047 int shift_count
= INTVAL (XEXP (op
, 1));
1048 if (shift_count
> BITS_PER_WORD
)
1049 src_reg
= expand_shift (GET_CODE (op
) == ASHIFT
?
1050 LSHIFT_EXPR
: RSHIFT_EXPR
,
1052 build_int_cst (NULL_TREE
,
1053 shift_count
- BITS_PER_WORD
),
1057 if (dest_reg
!= src_reg
)
1058 emit_move_insn (dest_reg
, src_reg
);
1059 emit_move_insn (dest_zero
, CONST0_RTX (word_mode
));
1060 insns
= get_insns ();
1064 emit_insn_before (insns
, insn
);
1069 fprintf (dump_file
, "; Replacing insn: %d with insns: ", INSN_UID (insn
));
1070 for (in
= insns
; in
!= insn
; in
= NEXT_INSN (in
))
1071 fprintf (dump_file
, "%d ", INSN_UID (in
));
1072 fprintf (dump_file
, "\n");
1079 /* Look for registers which are always accessed via word-sized SUBREGs
1080 or via copies. Decompose these registers into several word-sized
1081 pseudo-registers. */
1084 decompose_multiword_subregs (void)
1090 df_set_flags (DF_DEFER_INSN_RESCAN
);
1092 max
= max_reg_num ();
1094 /* First see if there are any multi-word pseudo-registers. If there
1095 aren't, there is nothing we can do. This should speed up this
1096 pass in the normal case, since it should be faster than scanning
1101 for (i
= FIRST_PSEUDO_REGISTER
; i
< max
; ++i
)
1103 if (regno_reg_rtx
[i
] != NULL
1104 && GET_MODE_SIZE (GET_MODE (regno_reg_rtx
[i
])) > UNITS_PER_WORD
)
1111 /* FIXME: When the dataflow branch is merged, we can change this
1112 code to look for each multi-word pseudo-register and to find each
1113 insn which sets or uses that register. That should be faster
1114 than scanning all the insns. */
1116 decomposable_context
= BITMAP_ALLOC (NULL
);
1117 non_decomposable_context
= BITMAP_ALLOC (NULL
);
1119 reg_copy_graph
= VEC_alloc (bitmap
, heap
, max
);
1120 VEC_safe_grow (bitmap
, heap
, reg_copy_graph
, max
);
1121 memset (VEC_address (bitmap
, reg_copy_graph
), 0, sizeof (bitmap
) * max
);
1127 FOR_BB_INSNS (bb
, insn
)
1130 enum classify_move_insn cmi
;
1134 || GET_CODE (PATTERN (insn
)) == CLOBBER
1135 || GET_CODE (PATTERN (insn
)) == USE
)
1138 if (find_decomposable_shift_zext (insn
))
1141 recog_memoized (insn
);
1142 extract_insn (insn
);
1144 set
= simple_move (insn
);
1147 cmi
= NOT_SIMPLE_MOVE
;
1150 if (find_pseudo_copy (set
))
1151 cmi
= SIMPLE_PSEUDO_REG_MOVE
;
1156 n
= recog_data
.n_operands
;
1157 for (i
= 0; i
< n
; ++i
)
1159 for_each_rtx (&recog_data
.operand
[i
],
1160 find_decomposable_subregs
,
1163 /* We handle ASM_OPERANDS as a special case to support
1164 things like x86 rdtsc which returns a DImode value.
1165 We can decompose the output, which will certainly be
1166 operand 0, but not the inputs. */
1168 if (cmi
== SIMPLE_MOVE
1169 && GET_CODE (SET_SRC (set
)) == ASM_OPERANDS
)
1171 gcc_assert (i
== 0);
1172 cmi
= NOT_SIMPLE_MOVE
;
1178 bitmap_and_compl_into (decomposable_context
, non_decomposable_context
);
1179 if (!bitmap_empty_p (decomposable_context
))
1183 sbitmap_iterator sbi
;
1184 bitmap_iterator iter
;
1187 propagate_pseudo_copies ();
1189 sub_blocks
= sbitmap_alloc (last_basic_block
);
1190 sbitmap_zero (sub_blocks
);
1192 EXECUTE_IF_SET_IN_BITMAP (decomposable_context
, 0, regno
, iter
)
1193 decompose_register (regno
);
1199 FOR_BB_INSNS (bb
, insn
)
1206 next
= NEXT_INSN (insn
);
1208 pat
= PATTERN (insn
);
1209 if (GET_CODE (pat
) == CLOBBER
)
1210 resolve_clobber (pat
, insn
);
1211 else if (GET_CODE (pat
) == USE
)
1212 resolve_use (pat
, insn
);
1213 else if (DEBUG_INSN_P (insn
))
1214 resolve_debug (insn
);
1220 recog_memoized (insn
);
1221 extract_insn (insn
);
1223 set
= simple_move (insn
);
1226 rtx orig_insn
= insn
;
1227 bool cfi
= control_flow_insn_p (insn
);
1229 /* We can end up splitting loads to multi-word pseudos
1230 into separate loads to machine word size pseudos.
1231 When this happens, we first had one load that can
1232 throw, and after resolve_simple_move we'll have a
1233 bunch of loads (at least two). All those loads may
1234 trap if we can have non-call exceptions, so they
1235 all will end the current basic block. We split the
1236 block after the outer loop over all insns, but we
1237 make sure here that we will be able to split the
1238 basic block and still produce the correct control
1239 flow graph for it. */
1241 || (flag_non_call_exceptions
1242 && can_throw_internal (insn
)));
1244 insn
= resolve_simple_move (set
, insn
);
1245 if (insn
!= orig_insn
)
1247 recog_memoized (insn
);
1248 extract_insn (insn
);
1251 SET_BIT (sub_blocks
, bb
->index
);
1256 rtx decomposed_shift
;
1258 decomposed_shift
= resolve_shift_zext (insn
);
1259 if (decomposed_shift
!= NULL_RTX
)
1261 insn
= decomposed_shift
;
1262 recog_memoized (insn
);
1263 extract_insn (insn
);
1267 for (i
= recog_data
.n_operands
- 1; i
>= 0; --i
)
1268 for_each_rtx (recog_data
.operand_loc
[i
],
1272 resolve_reg_notes (insn
);
1274 if (num_validated_changes () > 0)
1276 for (i
= recog_data
.n_dups
- 1; i
>= 0; --i
)
1278 rtx
*pl
= recog_data
.dup_loc
[i
];
1279 int dup_num
= recog_data
.dup_num
[i
];
1280 rtx
*px
= recog_data
.operand_loc
[dup_num
];
1282 validate_unshare_change (insn
, pl
, *px
, 1);
1285 i
= apply_change_group ();
1292 /* If we had insns to split that caused control flow insns in the middle
1293 of a basic block, split those blocks now. Note that we only handle
1294 the case where splitting a load has caused multiple possibly trapping
1296 EXECUTE_IF_SET_IN_SBITMAP (sub_blocks
, 0, i
, sbi
)
1301 bb
= BASIC_BLOCK (i
);
1302 insn
= BB_HEAD (bb
);
1307 if (control_flow_insn_p (insn
))
1309 /* Split the block after insn. There will be a fallthru
1310 edge, which is OK so we keep it. We have to create the
1311 exception edges ourselves. */
1312 fallthru
= split_block (bb
, insn
);
1313 rtl_make_eh_edge (NULL
, bb
, BB_END (bb
));
1314 bb
= fallthru
->dest
;
1315 insn
= BB_HEAD (bb
);
1318 insn
= NEXT_INSN (insn
);
1322 sbitmap_free (sub_blocks
);
1329 for (i
= 0; VEC_iterate (bitmap
, reg_copy_graph
, i
, b
); ++i
)
1334 VEC_free (bitmap
, heap
, reg_copy_graph
);
1336 BITMAP_FREE (decomposable_context
);
1337 BITMAP_FREE (non_decomposable_context
);
1340 /* Gate function for lower subreg pass. */
1343 gate_handle_lower_subreg (void)
1345 return flag_split_wide_types
!= 0;
1348 /* Implement first lower subreg pass. */
1351 rest_of_handle_lower_subreg (void)
1353 decompose_multiword_subregs ();
1357 /* Implement second lower subreg pass. */
1360 rest_of_handle_lower_subreg2 (void)
1362 decompose_multiword_subregs ();
1366 struct rtl_opt_pass pass_lower_subreg
=
1370 "subreg1", /* name */
1371 gate_handle_lower_subreg
, /* gate */
1372 rest_of_handle_lower_subreg
, /* execute */
1375 0, /* static_pass_number */
1376 TV_LOWER_SUBREG
, /* tv_id */
1377 0, /* properties_required */
1378 0, /* properties_provided */
1379 0, /* properties_destroyed */
1380 0, /* todo_flags_start */
1383 TODO_verify_flow
/* todo_flags_finish */
1387 struct rtl_opt_pass pass_lower_subreg2
=
1391 "subreg2", /* name */
1392 gate_handle_lower_subreg
, /* gate */
1393 rest_of_handle_lower_subreg2
, /* execute */
1396 0, /* static_pass_number */
1397 TV_LOWER_SUBREG
, /* tv_id */
1398 0, /* properties_required */
1399 0, /* properties_provided */
1400 0, /* properties_destroyed */
1401 0, /* todo_flags_start */
1402 TODO_df_finish
| TODO_verify_rtl_sharing
|
1405 TODO_verify_flow
/* todo_flags_finish */