RISC-V: Add testcases for unsigned imm vec SAT_SUB form1mastertrunk
[official-gcc.git] / libgcc / config / arc / ieee-754 / arc600 / 
treeb6f28d0636ee19260e062c02da1b4077be2c4639
drwxr-xr-x   ..
-rw-r--r-- 5136 divsf3.S
-rw-r--r-- 3744 mulsf3.S