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2021-10-25	Jim Wilson	RISC-V: Implement instruction patterns for ZBB extension. Kito Cheng <kito.cheng@sifive.com> Co-authored-by: Kito Cheng <kito.cheng@sifive.com>	commit \| commitdiff \| tree
2021-10-25	Kito Cheng	RISC-V: Cost model for zba extension.	commit \| commitdiff \| tree
2021-10-25	Jim Wilson	RISC-V: Implement instruction patterns for ZBA extension. Kito Cheng <kito.cheng@sifive.com> 2021-10-25 Kito Cheng <kito.cheng@sifive.com> Co-authored-by: Kito Cheng <kito.cheng@sifive.com>	commit \| commitdiff \| tree
2021-10-25	Kito Cheng	RISC-V: Minimal support of bitmanip extension 2021-10-25 Kito Cheng <kito.cheng@sifive.com>	commit \| commitdiff \| tree
2021-10-11	Kito Cheng	[PR/target 100316] Allow constant address for __builtin___cl...	commit \| commitdiff \| tree
2021-08-16	Kito Cheng	RISC-V: Allow multi-lib build with different code model	commit \| commitdiff \| tree
2021-07-21	Kito Cheng	Revert "RISC-V: Detect python and pick best one for...	commit \| commitdiff \| tree
2021-07-20	Kito Cheng	RISC-V: Detect python and pick best one for calling...	commit \| commitdiff \| tree
2021-07-13	Kito Cheng	docs: Add 'S' to Machine Constraints for RISC-V	commit \| commitdiff \| tree
2021-06-22	Jojo R	RISC-V: Add tune info for T-HEAD C906.	commit \| commitdiff \| tree
2021-06-22	Kito Cheng	testuite: Add pthread check to dg-module-cmi for omp...	commit \| commitdiff \| tree
2021-05-25	Kito Cheng	RISC-V: Pass -mno-relax to assembler	commit \| commitdiff \| tree
2021-05-19	Kito Cheng	testuite: Check pthread for omp module testing	commit \| commitdiff \| tree
2021-05-19	Geng Qi	RISC-V: Properly parse the letter 'p' in '-march'.	commit \| commitdiff \| tree
2021-03-23	Marcus Comstedt	RISC-V: Fix riscv_subword() for big endian	commit \| commitdiff \| tree
2021-03-23	Marcus Comstedt	RISC-V: Fix matches against subreg with a bytenum of...	commit \| commitdiff \| tree
2021-03-23	Marcus Comstedt	RISC-V: Update shift-shift-5.c testcase for big endian	commit \| commitdiff \| tree
2021-03-23	Marcus Comstedt	RISC-V: Fix trampoline generation on big endian	commit \| commitdiff \| tree
2021-03-23	Marcus Comstedt	RISC-V: Update soft-fp config for big-endian	commit \| commitdiff \| tree
2021-03-23	Marcus Comstedt	RISC-V: Add riscv{32,64}be with big endian as default	commit \| commitdiff \| tree
2021-03-23	Marcus Comstedt	RISC-V: Support -mlittle-endian and -mbig-endian	commit \| commitdiff \| tree
2021-03-22	Kito Cheng	PR target/99702: Check RTL type before get value	commit \| commitdiff \| tree
2021-03-18	Sinan Lin	PR target/99314: Fix integer signedness issue for cpymem... Kito Cheng <kito.cheng@sifive.com>	commit \| commitdiff \| tree
2021-02-23	Kito Cheng	config.sub, config.guess : Import upstream 2021-01-25.	commit \| commitdiff \| tree
2021-02-05	Kito Cheng	PR target/98878 - Incorrect multilib list for riscv...	commit \| commitdiff \| tree
2021-02-02	Kito Cheng	PR target/98743: Fix ICE in convert_move for RISC-V	commit \| commitdiff \| tree
2021-02-01	Xing GUO	RISC-V: Fix gcc.target/riscv/attribute-18.c	commit \| commitdiff \| tree
2021-01-28	Xing GUO	RISC-V: Fix -march option parsing when extension exists.	commit \| commitdiff \| tree
2021-01-19	Geng Qi	RISC-V: The 'multilib-generator' enhancement.	commit \| commitdiff \| tree
2021-01-08	Kito Cheng	Fix array-quals-1.c for RISC-V	commit \| commitdiff \| tree
2021-01-08	Kito Cheng	RISC-V: Implement new style of architecture extension...	commit \| commitdiff \| tree
2021-01-08	Kito Cheng	RISC-V: Move class riscv_subset_list and riscv_subset_t...	commit \| commitdiff \| tree
2020-12-24	Kito Cheng	RISC-V: Fix python3 compatibility for multilib-generator	commit \| commitdiff \| tree
2020-12-10	Simon Cook	RISC-V: Explicitly call python when using multilib...	commit \| commitdiff \| tree
2020-12-08	Kito Cheng	PR target/98152: Checking python is available before...	commit \| commitdiff \| tree
2020-12-03	Kito Cheng	RISC-V: Canonicalize --with-arch	commit \| commitdiff \| tree
2020-12-01	Kito Cheng	RISC-V: Drop some commited accidentally code.	commit \| commitdiff \| tree
2020-11-30	Kito Cheng	RISC-V: Always define MULTILIB_DEFAULTS	commit \| commitdiff \| tree
2020-11-30	Kito Cheng	Fix print_multilib_info when default arguments appear...	commit \| commitdiff \| tree
2020-11-18	Kito Cheng	RISC-V: Support version controling for ISA standard...	commit \| commitdiff \| tree
2020-11-18	Kito Cheng	RISC-V: Support zicsr and zifencei extension for -march.	commit \| commitdiff \| tree
2020-11-18	Kito Cheng	RISC-V: Handle implied extension in canonical ordering.	commit \| commitdiff \| tree
2020-11-06	Kito Cheng	RISC-V: Mark non-export symbol static and const in...	commit \| commitdiff \| tree
2020-11-06	Kito Cheng	PR target/96307: Fix KASAN option checking.	commit \| commitdiff \| tree
2020-11-02	Kito Cheng	RISC-V: Check multiletter extension has more than 1...	commit \| commitdiff \| tree
2020-11-02	Kito Cheng	RISC-V: Add configure option: --with-multilib-generator...	commit \| commitdiff \| tree
2020-10-27	Kito Cheng	RISC-V: Refine riscv_parse_arch_string	commit \| commitdiff \| tree
2020-10-22	Kito Cheng	RISC-V: Extend syntax for the multilib-generator	commit \| commitdiff \| tree
2020-10-16	Kito Cheng	RISC-V: Handle implied extension in multilib-generator	commit \| commitdiff \| tree
2020-10-15	Kito Cheng	RISC-V: Add support for -mcpu option.	commit \| commitdiff \| tree
2020-10-14	Kito Cheng	PR target/96759 - Handle global variable assignment...	commit \| commitdiff \| tree
2020-09-29	Kito Cheng	RISC-V: Define __riscv_cmodel_medany for PIC mode.	commit \| commitdiff \| tree
2020-07-30	Cooper Qu	RISC-V: Add support for TLS stack protector canary...	commit \| commitdiff \| tree
2020-07-23	Kito Cheng	PR target/96260 - KASAN should work even back-end not...	commit \| commitdiff \| tree
2020-07-21	Kito Cheng	testsuite: Add signal checking for signal related testcase...	commit \| commitdiff \| tree
2020-07-09	Kito Cheng	RISC-V: Implement __builtin_thread_pointer	commit \| commitdiff \| tree
2020-07-09	Kito Cheng	RISC-V: Disable remove unneeded save-restore call optimizati...	commit \| commitdiff \| tree
2020-07-02	Kito Cheng	RISC-V: Handle multi-letter extension for multilib...	commit \| commitdiff \| tree
2020-07-01	Kito Cheng	RISC-V: Preserve arch version info during normalizing...	commit \| commitdiff \| tree
2020-06-22	Kito Cheng	RISC-V: Normalize arch string in driver time	commit \| commitdiff \| tree
2020-06-22	Kito Cheng	RISC-V: Fix compilation failed for frflags builtin...	commit \| commitdiff \| tree
2020-06-16	Kito Cheng	RISC-V: Fix ICE on riscv_gpr_save_operation_p [PR95683]	commit \| commitdiff \| tree
2020-06-15	Kito Cheng	RISC-V: Suppress warning for signed and unsigned integer...	commit \| commitdiff \| tree
2020-06-11	Kito Cheng	RISC-V: Unify the output asm pattern between gpr_save...	commit \| commitdiff \| tree
2020-06-11	Kito Cheng	RISC-V: Describe correct USEs for gpr_save pattern...	commit \| commitdiff \| tree
2020-06-02	Kito Cheng	testsuite: Disable colorization for ubsan test	commit \| commitdiff \| tree
2020-05-20	Kito Cheng	Fix alignment for local variable [PR90811]	commit \| commitdiff \| tree
2020-05-19	Kito Cheng	RISC-V: Handle implied extension for -march parser.	commit \| commitdiff \| tree
2020-05-19	Kito Cheng	RISC-V: Update march parser	commit \| commitdiff \| tree
2020-05-11	Kito Cheng	testsuite: Require gnu-tm support for pr94856.C	commit \| commitdiff \| tree
2020-03-11	Kito Cheng	RISC-V: Fix testsuite regression due to recent IRA... Kito Cheng <kito.cheng@sifive.com>	commit \| commitdiff \| tree
2020-03-06	Kito Cheng	RISC-V: Fix testsuite regression due to recent IRA...	commit \| commitdiff \| tree
2020-03-06	Kito Cheng	re PR tree-optimization/90883 (Generated code is worse...	commit \| commitdiff \| tree
2020-03-04	Kito Cheng	PR target/93995 ICE in patch_jump_insn, at cfgrtl.c...	commit \| commitdiff \| tree
2020-02-24	Kito Cheng	RISC-V: Adjust floating point code gen for LTGT compare Kito Cheng <kito.cheng@sifive.com>	commit \| commitdiff \| tree
2020-02-19	Kito Cheng	RISC-V: Using fmv.x.w/fmv.w.x rather than fmv.x.s/fmv.s.x Kito Cheng <kito.cheng@sifive.com>	commit \| commitdiff \| tree
2020-01-21	Kito Cheng	RISC-V: Disallow regrenme if the TO register never...	commit \| commitdiff \| tree
2019-08-26	Kito Cheng	RISC-V: Add testcase for testing li pseudo instruction	commit \| commitdiff \| tree
2019-08-19	Kito Cheng	PR target/91441 - Turn off -fsanitize=kernel-address...	commit \| commitdiff \| tree
2019-08-07	Kito Cheng	RISC-V: Handle g extension in multilib-generator	commit \| commitdiff \| tree
2019-08-06	Kito Cheng	RISC-V: Handle extensions combination correctly in...	commit \| commitdiff \| tree
2019-08-05	Kito Cheng	RISC-V: Promote type correctly for libcalls	commit \| commitdiff \| tree
2019-08-02	Kito Cheng	Check -shared is available for pr87906_0.C	commit \| commitdiff \| tree
2019-08-01	Kito Cheng	RISC-V: Fix testcase on rv64	commit \| commitdiff \| tree
2019-07-08	Kito Cheng	MAINTAINERS (Write After Approval): Remove myself,... 2019-07-08 Kito Cheng <kito.cheng@sifive.com>	commit \| commitdiff \| tree
2019-07-08	Kito Cheng	MAINTAINERS (Write After Approval): Fix the list sorted... 2019-07-08 Kito Cheng <kito.cheng@sifive.com>	commit \| commitdiff \| tree
2019-07-08	Kito Cheng	Add myself to MAINTAINERS (Write After Approval)	commit \| commitdiff \| tree

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