[AArch64] Logical vector shift right conformance
commitbed34e8314ab4f7439bcda61eb221ae13833200d
authorjgreenhalgh <jgreenhalgh@138bc75d-0d04-0410-961f-82ee72b054a4>
Mon, 24 Mar 2014 12:05:38 +0000 (24 12:05 +0000)
committerjgreenhalgh <jgreenhalgh@138bc75d-0d04-0410-961f-82ee72b054a4>
Mon, 24 Mar 2014 12:05:38 +0000 (24 12:05 +0000)
tree0536898809d3385d86f90859795ab748be327a4f
parentd040c0373b530e352f4f644a9ce46ea8dabfe7e1
[AArch64] Logical vector shift right conformance

gcc/

* config/aarch64/aarch64-simd-builtins.def (lshr): DI mode excluded.
(lshr_simd): DI mode added.
* config/aarch64/aarch64-simd.md (aarch64_lshr_simddi): New pattern.
(aarch64_ushr_simddi): Likewise.
* config/aarch64/aarch64.md (UNSPEC_USHR64): New unspec.
* config/aarch64/arm_neon.h (vshr_n_u64): Intrinsic fixed.
(vshrd_n_u64): Likewise.

gcc/testsuite/

* gcc.target/aarch64/ushr64_1.c: New testcase.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@208789 138bc75d-0d04-0410-961f-82ee72b054a4
gcc/ChangeLog
gcc/config/aarch64/aarch64-builtins.c
gcc/config/aarch64/aarch64-simd-builtins.def
gcc/config/aarch64/aarch64-simd.md
gcc/config/aarch64/aarch64.md
gcc/config/aarch64/arm_neon.h
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/aarch64/ushr64_1.c [new file with mode: 0644]