| commit | 8e2b35399ce3e069841909deb96cacca6b85c0c6 | |
| author | meissner <meissner@138bc75d-0d04-0410-961f-82ee72b054a4> | |
| Sun, 16 Feb 2014 03:08:03 +0000 (16 03:08 +0000) | ||
| committer | meissner <meissner@138bc75d-0d04-0410-961f-82ee72b054a4> | |
| Sun, 16 Feb 2014 03:08:03 +0000 (16 03:08 +0000) | ||
| tree | 5a7b025b5dbad02e3ef46e1cc6e43dbe2ac61941 | treesnapshot (tar.gz zip) |
| parent | 1f1c5345b4f8418b2ac013ab312da61d643156e2 | commitdiff |
[gcc]
2014-02-15 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/60203
* config/rs6000/rs6000.md (rreg): Add TFmode, TDmode constraints.
(mov<mode>_internal, TFmode/TDmode): Split TFmode/TDmode moves
into 64-bit and 32-bit moves. On 64-bit moves, add support for
using direct move instructions on ISA 2.07. Also adjust
instruction length for 64-bit.
(mov<mode>_64bit, TFmode/TDmode): Likewise.
(mov<mode>_32bit, TFmode/TDmode): Likewise.
[gcc/testsuite]
2014-02-15 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/60203
* gcc.target/powerpc/pr60203.c: New testsuite.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@207808 138bc75d-0d04-0410-961f-82ee72b054a4
2014-02-15 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/60203
* config/rs6000/rs6000.md (rreg): Add TFmode, TDmode constraints.
(mov<mode>_internal, TFmode/TDmode): Split TFmode/TDmode moves
into 64-bit and 32-bit moves. On 64-bit moves, add support for
using direct move instructions on ISA 2.07. Also adjust
instruction length for 64-bit.
(mov<mode>_64bit, TFmode/TDmode): Likewise.
(mov<mode>_32bit, TFmode/TDmode): Likewise.
[gcc/testsuite]
2014-02-15 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/60203
* gcc.target/powerpc/pr60203.c: New testsuite.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@207808 138bc75d-0d04-0410-961f-82ee72b054a4