* include/bits/basic_string.h (getline): Qualify call to prevent ADL
[official-gcc.git] / gcc / reorg.c
blob242d7754f3eb05ed1bb7e1482ea64db372c34547
1 /* Perform instruction reorganizations for delay slot filling.
2 Copyright (C) 1992-2014 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu).
4 Hacked by Michael Tiemann (tiemann@cygnus.com).
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 /* Instruction reorganization pass.
24 This pass runs after register allocation and final jump
25 optimization. It should be the last pass to run before peephole.
26 It serves primarily to fill delay slots of insns, typically branch
27 and call insns. Other insns typically involve more complicated
28 interactions of data dependencies and resource constraints, and
29 are better handled by scheduling before register allocation (by the
30 function `schedule_insns').
32 The Branch Penalty is the number of extra cycles that are needed to
33 execute a branch insn. On an ideal machine, branches take a single
34 cycle, and the Branch Penalty is 0. Several RISC machines approach
35 branch delays differently:
37 The MIPS has a single branch delay slot. Most insns
38 (except other branches) can be used to fill this slot. When the
39 slot is filled, two insns execute in two cycles, reducing the
40 branch penalty to zero.
42 The SPARC always has a branch delay slot, but its effects can be
43 annulled when the branch is not taken. This means that failing to
44 find other sources of insns, we can hoist an insn from the branch
45 target that would only be safe to execute knowing that the branch
46 is taken.
48 The HP-PA always has a branch delay slot. For unconditional branches
49 its effects can be annulled when the branch is taken. The effects
50 of the delay slot in a conditional branch can be nullified for forward
51 taken branches, or for untaken backward branches. This means
52 we can hoist insns from the fall-through path for forward branches or
53 steal insns from the target of backward branches.
55 The TMS320C3x and C4x have three branch delay slots. When the three
56 slots are filled, the branch penalty is zero. Most insns can fill the
57 delay slots except jump insns.
59 Three techniques for filling delay slots have been implemented so far:
61 (1) `fill_simple_delay_slots' is the simplest, most efficient way
62 to fill delay slots. This pass first looks for insns which come
63 from before the branch and which are safe to execute after the
64 branch. Then it searches after the insn requiring delay slots or,
65 in the case of a branch, for insns that are after the point at
66 which the branch merges into the fallthrough code, if such a point
67 exists. When such insns are found, the branch penalty decreases
68 and no code expansion takes place.
70 (2) `fill_eager_delay_slots' is more complicated: it is used for
71 scheduling conditional jumps, or for scheduling jumps which cannot
72 be filled using (1). A machine need not have annulled jumps to use
73 this strategy, but it helps (by keeping more options open).
74 `fill_eager_delay_slots' tries to guess the direction the branch
75 will go; if it guesses right 100% of the time, it can reduce the
76 branch penalty as much as `fill_simple_delay_slots' does. If it
77 guesses wrong 100% of the time, it might as well schedule nops. When
78 `fill_eager_delay_slots' takes insns from the fall-through path of
79 the jump, usually there is no code expansion; when it takes insns
80 from the branch target, there is code expansion if it is not the
81 only way to reach that target.
83 (3) `relax_delay_slots' uses a set of rules to simplify code that
84 has been reorganized by (1) and (2). It finds cases where
85 conditional test can be eliminated, jumps can be threaded, extra
86 insns can be eliminated, etc. It is the job of (1) and (2) to do a
87 good job of scheduling locally; `relax_delay_slots' takes care of
88 making the various individual schedules work well together. It is
89 especially tuned to handle the control flow interactions of branch
90 insns. It does nothing for insns with delay slots that do not
91 branch.
93 On machines that use CC0, we are very conservative. We will not make
94 a copy of an insn involving CC0 since we want to maintain a 1-1
95 correspondence between the insn that sets and uses CC0. The insns are
96 allowed to be separated by placing an insn that sets CC0 (but not an insn
97 that uses CC0; we could do this, but it doesn't seem worthwhile) in a
98 delay slot. In that case, we point each insn at the other with REG_CC_USER
99 and REG_CC_SETTER notes. Note that these restrictions affect very few
100 machines because most RISC machines with delay slots will not use CC0
101 (the RT is the only known exception at this point). */
103 #include "config.h"
104 #include "system.h"
105 #include "coretypes.h"
106 #include "tm.h"
107 #include "diagnostic-core.h"
108 #include "rtl.h"
109 #include "tm_p.h"
110 #include "expr.h"
111 #include "function.h"
112 #include "insn-config.h"
113 #include "conditions.h"
114 #include "hard-reg-set.h"
115 #include "basic-block.h"
116 #include "regs.h"
117 #include "recog.h"
118 #include "flags.h"
119 #include "obstack.h"
120 #include "insn-attr.h"
121 #include "resource.h"
122 #include "except.h"
123 #include "params.h"
124 #include "target.h"
125 #include "tree-pass.h"
126 #include "emit-rtl.h"
128 #ifdef DELAY_SLOTS
130 #ifndef ANNUL_IFTRUE_SLOTS
131 #define eligible_for_annul_true(INSN, SLOTS, TRIAL, FLAGS) 0
132 #endif
133 #ifndef ANNUL_IFFALSE_SLOTS
134 #define eligible_for_annul_false(INSN, SLOTS, TRIAL, FLAGS) 0
135 #endif
138 /* First, some functions that were used before GCC got a control flow graph.
139 These functions are now only used here in reorg.c, and have therefore
140 been moved here to avoid inadvertent misuse elsewhere in the compiler. */
142 /* Return the last label to mark the same position as LABEL. Return LABEL
143 itself if it is null or any return rtx. */
145 static rtx
146 skip_consecutive_labels (rtx label)
148 rtx insn;
150 if (label && ANY_RETURN_P (label))
151 return label;
153 for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn))
154 if (LABEL_P (insn))
155 label = insn;
157 return label;
160 #ifdef HAVE_cc0
161 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
162 and REG_CC_USER notes so we can find it. */
164 static void
165 link_cc0_insns (rtx insn)
167 rtx user = next_nonnote_insn (insn);
169 if (NONJUMP_INSN_P (user) && GET_CODE (PATTERN (user)) == SEQUENCE)
170 user = XVECEXP (PATTERN (user), 0, 0);
172 add_reg_note (user, REG_CC_SETTER, insn);
173 add_reg_note (insn, REG_CC_USER, user);
175 #endif
177 /* Insns which have delay slots that have not yet been filled. */
179 static struct obstack unfilled_slots_obstack;
180 static rtx *unfilled_firstobj;
182 /* Define macros to refer to the first and last slot containing unfilled
183 insns. These are used because the list may move and its address
184 should be recomputed at each use. */
186 #define unfilled_slots_base \
187 ((rtx *) obstack_base (&unfilled_slots_obstack))
189 #define unfilled_slots_next \
190 ((rtx *) obstack_next_free (&unfilled_slots_obstack))
192 /* Points to the label before the end of the function, or before a
193 return insn. */
194 static rtx function_return_label;
195 /* Likewise for a simple_return. */
196 static rtx function_simple_return_label;
198 /* Mapping between INSN_UID's and position in the code since INSN_UID's do
199 not always monotonically increase. */
200 static int *uid_to_ruid;
202 /* Highest valid index in `uid_to_ruid'. */
203 static int max_uid;
205 static int stop_search_p (rtx, int);
206 static int resource_conflicts_p (struct resources *, struct resources *);
207 static int insn_references_resource_p (rtx, struct resources *, bool);
208 static int insn_sets_resource_p (rtx, struct resources *, bool);
209 static rtx find_end_label (rtx);
210 static rtx emit_delay_sequence (rtx, rtx, int);
211 static rtx add_to_delay_list (rtx, rtx);
212 static rtx delete_from_delay_slot (rtx);
213 static void delete_scheduled_jump (rtx);
214 static void note_delay_statistics (int, int);
215 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
216 static rtx optimize_skip (rtx);
217 #endif
218 static int get_jump_flags (rtx, rtx);
219 static int mostly_true_jump (rtx);
220 static rtx get_branch_condition (rtx, rtx);
221 static int condition_dominates_p (rtx, rtx);
222 static int redirect_with_delay_slots_safe_p (rtx, rtx, rtx);
223 static int redirect_with_delay_list_safe_p (rtx, rtx, rtx);
224 static int check_annul_list_true_false (int, rtx);
225 static rtx steal_delay_list_from_target (rtx, rtx, rtx, rtx,
226 struct resources *,
227 struct resources *,
228 struct resources *,
229 int, int *, int *, rtx *);
230 static rtx steal_delay_list_from_fallthrough (rtx, rtx, rtx, rtx,
231 struct resources *,
232 struct resources *,
233 struct resources *,
234 int, int *, int *);
235 static void try_merge_delay_insns (rtx, rtx);
236 static rtx redundant_insn (rtx, rtx, rtx);
237 static int own_thread_p (rtx, rtx, int);
238 static void update_block (rtx, rtx);
239 static int reorg_redirect_jump (rtx, rtx);
240 static void update_reg_dead_notes (rtx, rtx);
241 static void fix_reg_dead_note (rtx, rtx);
242 static void update_reg_unused_notes (rtx, rtx);
243 static void fill_simple_delay_slots (int);
244 static rtx fill_slots_from_thread (rtx, rtx, rtx, rtx,
245 int, int, int, int,
246 int *, rtx);
247 static void fill_eager_delay_slots (void);
248 static void relax_delay_slots (rtx);
249 static void make_return_insns (rtx);
251 /* A wrapper around next_active_insn which takes care to return ret_rtx
252 unchanged. */
254 static rtx
255 first_active_target_insn (rtx insn)
257 if (ANY_RETURN_P (insn))
258 return insn;
259 return next_active_insn (insn);
262 /* Return true iff INSN is a simplejump, or any kind of return insn. */
264 static bool
265 simplejump_or_return_p (rtx insn)
267 return (JUMP_P (insn)
268 && (simplejump_p (insn) || ANY_RETURN_P (PATTERN (insn))));
271 /* Return TRUE if this insn should stop the search for insn to fill delay
272 slots. LABELS_P indicates that labels should terminate the search.
273 In all cases, jumps terminate the search. */
275 static int
276 stop_search_p (rtx insn, int labels_p)
278 if (insn == 0)
279 return 1;
281 /* If the insn can throw an exception that is caught within the function,
282 it may effectively perform a jump from the viewpoint of the function.
283 Therefore act like for a jump. */
284 if (can_throw_internal (insn))
285 return 1;
287 switch (GET_CODE (insn))
289 case NOTE:
290 case CALL_INSN:
291 return 0;
293 case CODE_LABEL:
294 return labels_p;
296 case JUMP_INSN:
297 case BARRIER:
298 return 1;
300 case INSN:
301 /* OK unless it contains a delay slot or is an `asm' insn of some type.
302 We don't know anything about these. */
303 return (GET_CODE (PATTERN (insn)) == SEQUENCE
304 || GET_CODE (PATTERN (insn)) == ASM_INPUT
305 || asm_noperands (PATTERN (insn)) >= 0);
307 default:
308 gcc_unreachable ();
312 /* Return TRUE if any resources are marked in both RES1 and RES2 or if either
313 resource set contains a volatile memory reference. Otherwise, return FALSE. */
315 static int
316 resource_conflicts_p (struct resources *res1, struct resources *res2)
318 if ((res1->cc && res2->cc) || (res1->memory && res2->memory)
319 || res1->volatil || res2->volatil)
320 return 1;
322 return hard_reg_set_intersect_p (res1->regs, res2->regs);
325 /* Return TRUE if any resource marked in RES, a `struct resources', is
326 referenced by INSN. If INCLUDE_DELAYED_EFFECTS is set, return if the called
327 routine is using those resources.
329 We compute this by computing all the resources referenced by INSN and
330 seeing if this conflicts with RES. It might be faster to directly check
331 ourselves, and this is the way it used to work, but it means duplicating
332 a large block of complex code. */
334 static int
335 insn_references_resource_p (rtx insn, struct resources *res,
336 bool include_delayed_effects)
338 struct resources insn_res;
340 CLEAR_RESOURCE (&insn_res);
341 mark_referenced_resources (insn, &insn_res, include_delayed_effects);
342 return resource_conflicts_p (&insn_res, res);
345 /* Return TRUE if INSN modifies resources that are marked in RES.
346 INCLUDE_DELAYED_EFFECTS is set if the actions of that routine should be
347 included. CC0 is only modified if it is explicitly set; see comments
348 in front of mark_set_resources for details. */
350 static int
351 insn_sets_resource_p (rtx insn, struct resources *res,
352 bool include_delayed_effects)
354 struct resources insn_sets;
356 CLEAR_RESOURCE (&insn_sets);
357 mark_set_resources (insn, &insn_sets, 0,
358 (include_delayed_effects
359 ? MARK_SRC_DEST_CALL
360 : MARK_SRC_DEST));
361 return resource_conflicts_p (&insn_sets, res);
364 /* Find a label at the end of the function or before a RETURN. If there
365 is none, try to make one. If that fails, returns 0.
367 The property of such a label is that it is placed just before the
368 epilogue or a bare RETURN insn, so that another bare RETURN can be
369 turned into a jump to the label unconditionally. In particular, the
370 label cannot be placed before a RETURN insn with a filled delay slot.
372 ??? There may be a problem with the current implementation. Suppose
373 we start with a bare RETURN insn and call find_end_label. It may set
374 function_return_label just before the RETURN. Suppose the machinery
375 is able to fill the delay slot of the RETURN insn afterwards. Then
376 function_return_label is no longer valid according to the property
377 described above and find_end_label will still return it unmodified.
378 Note that this is probably mitigated by the following observation:
379 once function_return_label is made, it is very likely the target of
380 a jump, so filling the delay slot of the RETURN will be much more
381 difficult.
382 KIND is either simple_return_rtx or ret_rtx, indicating which type of
383 return we're looking for. */
385 static rtx
386 find_end_label (rtx kind)
388 rtx insn;
389 rtx *plabel;
391 if (kind == ret_rtx)
392 plabel = &function_return_label;
393 else
395 gcc_assert (kind == simple_return_rtx);
396 plabel = &function_simple_return_label;
399 /* If we found one previously, return it. */
400 if (*plabel)
401 return *plabel;
403 /* Otherwise, see if there is a label at the end of the function. If there
404 is, it must be that RETURN insns aren't needed, so that is our return
405 label and we don't have to do anything else. */
407 insn = get_last_insn ();
408 while (NOTE_P (insn)
409 || (NONJUMP_INSN_P (insn)
410 && (GET_CODE (PATTERN (insn)) == USE
411 || GET_CODE (PATTERN (insn)) == CLOBBER)))
412 insn = PREV_INSN (insn);
414 /* When a target threads its epilogue we might already have a
415 suitable return insn. If so put a label before it for the
416 function_return_label. */
417 if (BARRIER_P (insn)
418 && JUMP_P (PREV_INSN (insn))
419 && PATTERN (PREV_INSN (insn)) == kind)
421 rtx temp = PREV_INSN (PREV_INSN (insn));
422 rtx label = gen_label_rtx ();
423 LABEL_NUSES (label) = 0;
425 /* Put the label before any USE insns that may precede the RETURN
426 insn. */
427 while (GET_CODE (temp) == USE)
428 temp = PREV_INSN (temp);
430 emit_label_after (label, temp);
431 *plabel = label;
434 else if (LABEL_P (insn))
435 *plabel = insn;
436 else
438 rtx label = gen_label_rtx ();
439 LABEL_NUSES (label) = 0;
440 /* If the basic block reorder pass moves the return insn to
441 some other place try to locate it again and put our
442 function_return_label there. */
443 while (insn && ! (JUMP_P (insn) && (PATTERN (insn) == kind)))
444 insn = PREV_INSN (insn);
445 if (insn)
447 insn = PREV_INSN (insn);
449 /* Put the label before any USE insns that may precede the
450 RETURN insn. */
451 while (GET_CODE (insn) == USE)
452 insn = PREV_INSN (insn);
454 emit_label_after (label, insn);
456 else
458 #ifdef HAVE_epilogue
459 if (HAVE_epilogue
460 #ifdef HAVE_return
461 && ! HAVE_return
462 #endif
464 /* The RETURN insn has its delay slot filled so we cannot
465 emit the label just before it. Since we already have
466 an epilogue and cannot emit a new RETURN, we cannot
467 emit the label at all. */
468 return NULL_RTX;
469 #endif /* HAVE_epilogue */
471 /* Otherwise, make a new label and emit a RETURN and BARRIER,
472 if needed. */
473 emit_label (label);
474 #ifdef HAVE_return
475 if (HAVE_return)
477 /* The return we make may have delay slots too. */
478 rtx insn = gen_return ();
479 insn = emit_jump_insn (insn);
480 set_return_jump_label (insn);
481 emit_barrier ();
482 if (num_delay_slots (insn) > 0)
483 obstack_ptr_grow (&unfilled_slots_obstack, insn);
485 #endif
487 *plabel = label;
490 /* Show one additional use for this label so it won't go away until
491 we are done. */
492 ++LABEL_NUSES (*plabel);
494 return *plabel;
497 /* Put INSN and LIST together in a SEQUENCE rtx of LENGTH, and replace
498 the pattern of INSN with the SEQUENCE.
500 Returns the SEQUENCE that replaces INSN. */
502 static rtx
503 emit_delay_sequence (rtx insn, rtx list, int length)
505 /* Allocate the rtvec to hold the insns and the SEQUENCE. */
506 rtvec seqv = rtvec_alloc (length + 1);
507 rtx seq = gen_rtx_SEQUENCE (VOIDmode, seqv);
508 rtx seq_insn = make_insn_raw (seq);
510 /* If DELAY_INSN has a location, use it for SEQ_INSN. If DELAY_INSN does
511 not have a location, but one of the delayed insns does, we pick up a
512 location from there later. */
513 INSN_LOCATION (seq_insn) = INSN_LOCATION (insn);
515 /* Unlink INSN from the insn chain, so that we can put it into
516 the SEQUENCE. Remember where we want to emit SEQUENCE in AFTER. */
517 rtx after = PREV_INSN (insn);
518 remove_insn (insn);
519 NEXT_INSN (insn) = PREV_INSN (insn) = NULL;
521 /* Build our SEQUENCE and rebuild the insn chain. */
522 int i = 1;
523 start_sequence ();
524 XVECEXP (seq, 0, 0) = emit_insn (insn);
525 for (rtx li = list; li; li = XEXP (li, 1), i++)
527 rtx tem = XEXP (li, 0);
528 rtx note, next;
530 /* Show that this copy of the insn isn't deleted. */
531 INSN_DELETED_P (tem) = 0;
533 /* Unlink insn from its original place, and re-emit it into
534 the sequence. */
535 NEXT_INSN (tem) = PREV_INSN (tem) = NULL;
536 XVECEXP (seq, 0, i) = emit_insn (tem);
538 /* SPARC assembler, for instance, emit warning when debug info is output
539 into the delay slot. */
540 if (INSN_LOCATION (tem) && !INSN_LOCATION (seq_insn))
541 INSN_LOCATION (seq_insn) = INSN_LOCATION (tem);
542 INSN_LOCATION (tem) = 0;
544 for (note = REG_NOTES (tem); note; note = next)
546 next = XEXP (note, 1);
547 switch (REG_NOTE_KIND (note))
549 case REG_DEAD:
550 /* Remove any REG_DEAD notes because we can't rely on them now
551 that the insn has been moved. */
552 remove_note (tem, note);
553 break;
555 case REG_LABEL_OPERAND:
556 case REG_LABEL_TARGET:
557 /* Keep the label reference count up to date. */
558 if (LABEL_P (XEXP (note, 0)))
559 LABEL_NUSES (XEXP (note, 0)) ++;
560 break;
562 default:
563 break;
567 end_sequence ();
568 gcc_assert (i == length + 1);
570 /* Splice our SEQUENCE into the insn stream where INSN used to be. */
571 add_insn_after (seq_insn, after, NULL);
573 return seq_insn;
576 /* Add INSN to DELAY_LIST and return the head of the new list. The list must
577 be in the order in which the insns are to be executed. */
579 static rtx
580 add_to_delay_list (rtx insn, rtx delay_list)
582 /* If we have an empty list, just make a new list element. If
583 INSN has its block number recorded, clear it since we may
584 be moving the insn to a new block. */
586 if (delay_list == 0)
588 clear_hashed_info_for_insn (insn);
589 return gen_rtx_INSN_LIST (VOIDmode, insn, NULL_RTX);
592 /* Otherwise this must be an INSN_LIST. Add INSN to the end of the
593 list. */
594 XEXP (delay_list, 1) = add_to_delay_list (insn, XEXP (delay_list, 1));
596 return delay_list;
599 /* Delete INSN from the delay slot of the insn that it is in, which may
600 produce an insn with no delay slots. Return the new insn. */
602 static rtx
603 delete_from_delay_slot (rtx insn)
605 rtx trial, seq_insn, seq, prev;
606 rtx delay_list = 0;
607 int i;
608 int had_barrier = 0;
610 /* We first must find the insn containing the SEQUENCE with INSN in its
611 delay slot. Do this by finding an insn, TRIAL, where
612 PREV_INSN (NEXT_INSN (TRIAL)) != TRIAL. */
614 for (trial = insn;
615 PREV_INSN (NEXT_INSN (trial)) == trial;
616 trial = NEXT_INSN (trial))
619 seq_insn = PREV_INSN (NEXT_INSN (trial));
620 seq = PATTERN (seq_insn);
622 if (NEXT_INSN (seq_insn) && BARRIER_P (NEXT_INSN (seq_insn)))
623 had_barrier = 1;
625 /* Create a delay list consisting of all the insns other than the one
626 we are deleting (unless we were the only one). */
627 if (XVECLEN (seq, 0) > 2)
628 for (i = 1; i < XVECLEN (seq, 0); i++)
629 if (XVECEXP (seq, 0, i) != insn)
630 delay_list = add_to_delay_list (XVECEXP (seq, 0, i), delay_list);
632 /* Delete the old SEQUENCE, re-emit the insn that used to have the delay
633 list, and rebuild the delay list if non-empty. */
634 prev = PREV_INSN (seq_insn);
635 trial = XVECEXP (seq, 0, 0);
636 delete_related_insns (seq_insn);
637 add_insn_after (trial, prev, NULL);
639 /* If there was a barrier after the old SEQUENCE, remit it. */
640 if (had_barrier)
641 emit_barrier_after (trial);
643 /* If there are any delay insns, remit them. Otherwise clear the
644 annul flag. */
645 if (delay_list)
646 trial = emit_delay_sequence (trial, delay_list, XVECLEN (seq, 0) - 2);
647 else if (JUMP_P (trial))
648 INSN_ANNULLED_BRANCH_P (trial) = 0;
650 INSN_FROM_TARGET_P (insn) = 0;
652 /* Show we need to fill this insn again. */
653 obstack_ptr_grow (&unfilled_slots_obstack, trial);
655 return trial;
658 /* Delete INSN, a JUMP_INSN. If it is a conditional jump, we must track down
659 the insn that sets CC0 for it and delete it too. */
661 static void
662 delete_scheduled_jump (rtx insn)
664 /* Delete the insn that sets cc0 for us. On machines without cc0, we could
665 delete the insn that sets the condition code, but it is hard to find it.
666 Since this case is rare anyway, don't bother trying; there would likely
667 be other insns that became dead anyway, which we wouldn't know to
668 delete. */
670 #ifdef HAVE_cc0
671 if (reg_mentioned_p (cc0_rtx, insn))
673 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
675 /* If a reg-note was found, it points to an insn to set CC0. This
676 insn is in the delay list of some other insn. So delete it from
677 the delay list it was in. */
678 if (note)
680 if (! FIND_REG_INC_NOTE (XEXP (note, 0), NULL_RTX)
681 && sets_cc0_p (PATTERN (XEXP (note, 0))) == 1)
682 delete_from_delay_slot (XEXP (note, 0));
684 else
686 /* The insn setting CC0 is our previous insn, but it may be in
687 a delay slot. It will be the last insn in the delay slot, if
688 it is. */
689 rtx trial = previous_insn (insn);
690 if (NOTE_P (trial))
691 trial = prev_nonnote_insn (trial);
692 if (sets_cc0_p (PATTERN (trial)) != 1
693 || FIND_REG_INC_NOTE (trial, NULL_RTX))
694 return;
695 if (PREV_INSN (NEXT_INSN (trial)) == trial)
696 delete_related_insns (trial);
697 else
698 delete_from_delay_slot (trial);
701 #endif
703 delete_related_insns (insn);
706 /* Counters for delay-slot filling. */
708 #define NUM_REORG_FUNCTIONS 2
709 #define MAX_DELAY_HISTOGRAM 3
710 #define MAX_REORG_PASSES 2
712 static int num_insns_needing_delays[NUM_REORG_FUNCTIONS][MAX_REORG_PASSES];
714 static int num_filled_delays[NUM_REORG_FUNCTIONS][MAX_DELAY_HISTOGRAM+1][MAX_REORG_PASSES];
716 static int reorg_pass_number;
718 static void
719 note_delay_statistics (int slots_filled, int index)
721 num_insns_needing_delays[index][reorg_pass_number]++;
722 if (slots_filled > MAX_DELAY_HISTOGRAM)
723 slots_filled = MAX_DELAY_HISTOGRAM;
724 num_filled_delays[index][slots_filled][reorg_pass_number]++;
727 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
729 /* Optimize the following cases:
731 1. When a conditional branch skips over only one instruction,
732 use an annulling branch and put that insn in the delay slot.
733 Use either a branch that annuls when the condition if true or
734 invert the test with a branch that annuls when the condition is
735 false. This saves insns, since otherwise we must copy an insn
736 from the L1 target.
738 (orig) (skip) (otherwise)
739 Bcc.n L1 Bcc',a L1 Bcc,a L1'
740 insn insn insn2
741 L1: L1: L1:
742 insn2 insn2 insn2
743 insn3 insn3 L1':
744 insn3
746 2. When a conditional branch skips over only one instruction,
747 and after that, it unconditionally branches somewhere else,
748 perform the similar optimization. This saves executing the
749 second branch in the case where the inverted condition is true.
751 Bcc.n L1 Bcc',a L2
752 insn insn
753 L1: L1:
754 Bra L2 Bra L2
756 INSN is a JUMP_INSN.
758 This should be expanded to skip over N insns, where N is the number
759 of delay slots required. */
761 static rtx
762 optimize_skip (rtx insn)
764 rtx trial = next_nonnote_insn (insn);
765 rtx next_trial = next_active_insn (trial);
766 rtx delay_list = 0;
767 int flags;
769 flags = get_jump_flags (insn, JUMP_LABEL (insn));
771 if (trial == 0
772 || !NONJUMP_INSN_P (trial)
773 || GET_CODE (PATTERN (trial)) == SEQUENCE
774 || recog_memoized (trial) < 0
775 || (! eligible_for_annul_false (insn, 0, trial, flags)
776 && ! eligible_for_annul_true (insn, 0, trial, flags))
777 || can_throw_internal (trial))
778 return 0;
780 /* There are two cases where we are just executing one insn (we assume
781 here that a branch requires only one insn; this should be generalized
782 at some point): Where the branch goes around a single insn or where
783 we have one insn followed by a branch to the same label we branch to.
784 In both of these cases, inverting the jump and annulling the delay
785 slot give the same effect in fewer insns. */
786 if (next_trial == next_active_insn (JUMP_LABEL (insn))
787 || (next_trial != 0
788 && simplejump_or_return_p (next_trial)
789 && JUMP_LABEL (insn) == JUMP_LABEL (next_trial)))
791 if (eligible_for_annul_false (insn, 0, trial, flags))
793 if (invert_jump (insn, JUMP_LABEL (insn), 1))
794 INSN_FROM_TARGET_P (trial) = 1;
795 else if (! eligible_for_annul_true (insn, 0, trial, flags))
796 return 0;
799 delay_list = add_to_delay_list (trial, NULL_RTX);
800 next_trial = next_active_insn (trial);
801 update_block (trial, trial);
802 delete_related_insns (trial);
804 /* Also, if we are targeting an unconditional
805 branch, thread our jump to the target of that branch. Don't
806 change this into a RETURN here, because it may not accept what
807 we have in the delay slot. We'll fix this up later. */
808 if (next_trial && simplejump_or_return_p (next_trial))
810 rtx target_label = JUMP_LABEL (next_trial);
811 if (ANY_RETURN_P (target_label))
812 target_label = find_end_label (target_label);
814 if (target_label)
816 /* Recompute the flags based on TARGET_LABEL since threading
817 the jump to TARGET_LABEL may change the direction of the
818 jump (which may change the circumstances in which the
819 delay slot is nullified). */
820 flags = get_jump_flags (insn, target_label);
821 if (eligible_for_annul_true (insn, 0, trial, flags))
822 reorg_redirect_jump (insn, target_label);
826 INSN_ANNULLED_BRANCH_P (insn) = 1;
829 return delay_list;
831 #endif
833 /* Encode and return branch direction and prediction information for
834 INSN assuming it will jump to LABEL.
836 Non conditional branches return no direction information and
837 are predicted as very likely taken. */
839 static int
840 get_jump_flags (rtx insn, rtx label)
842 int flags;
844 /* get_jump_flags can be passed any insn with delay slots, these may
845 be INSNs, CALL_INSNs, or JUMP_INSNs. Only JUMP_INSNs have branch
846 direction information, and only if they are conditional jumps.
848 If LABEL is a return, then there is no way to determine the branch
849 direction. */
850 if (JUMP_P (insn)
851 && (condjump_p (insn) || condjump_in_parallel_p (insn))
852 && !ANY_RETURN_P (label)
853 && INSN_UID (insn) <= max_uid
854 && INSN_UID (label) <= max_uid)
855 flags
856 = (uid_to_ruid[INSN_UID (label)] > uid_to_ruid[INSN_UID (insn)])
857 ? ATTR_FLAG_forward : ATTR_FLAG_backward;
858 /* No valid direction information. */
859 else
860 flags = 0;
862 return flags;
865 /* Return truth value of the statement that this branch
866 is mostly taken. If we think that the branch is extremely likely
867 to be taken, we return 2. If the branch is slightly more likely to be
868 taken, return 1. If the branch is slightly less likely to be taken,
869 return 0 and if the branch is highly unlikely to be taken, return -1. */
871 static int
872 mostly_true_jump (rtx jump_insn)
874 /* If branch probabilities are available, then use that number since it
875 always gives a correct answer. */
876 rtx note = find_reg_note (jump_insn, REG_BR_PROB, 0);
877 if (note)
879 int prob = XINT (note, 0);
881 if (prob >= REG_BR_PROB_BASE * 9 / 10)
882 return 2;
883 else if (prob >= REG_BR_PROB_BASE / 2)
884 return 1;
885 else if (prob >= REG_BR_PROB_BASE / 10)
886 return 0;
887 else
888 return -1;
891 /* If there is no note, assume branches are not taken.
892 This should be rare. */
893 return 0;
896 /* Return the condition under which INSN will branch to TARGET. If TARGET
897 is zero, return the condition under which INSN will return. If INSN is
898 an unconditional branch, return const_true_rtx. If INSN isn't a simple
899 type of jump, or it doesn't go to TARGET, return 0. */
901 static rtx
902 get_branch_condition (rtx insn, rtx target)
904 rtx pat = PATTERN (insn);
905 rtx src;
907 if (condjump_in_parallel_p (insn))
908 pat = XVECEXP (pat, 0, 0);
910 if (ANY_RETURN_P (pat) && pat == target)
911 return const_true_rtx;
913 if (GET_CODE (pat) != SET || SET_DEST (pat) != pc_rtx)
914 return 0;
916 src = SET_SRC (pat);
917 if (GET_CODE (src) == LABEL_REF && XEXP (src, 0) == target)
918 return const_true_rtx;
920 else if (GET_CODE (src) == IF_THEN_ELSE
921 && XEXP (src, 2) == pc_rtx
922 && ((GET_CODE (XEXP (src, 1)) == LABEL_REF
923 && XEXP (XEXP (src, 1), 0) == target)
924 || (ANY_RETURN_P (XEXP (src, 1)) && XEXP (src, 1) == target)))
925 return XEXP (src, 0);
927 else if (GET_CODE (src) == IF_THEN_ELSE
928 && XEXP (src, 1) == pc_rtx
929 && ((GET_CODE (XEXP (src, 2)) == LABEL_REF
930 && XEXP (XEXP (src, 2), 0) == target)
931 || (ANY_RETURN_P (XEXP (src, 2)) && XEXP (src, 2) == target)))
933 enum rtx_code rev;
934 rev = reversed_comparison_code (XEXP (src, 0), insn);
935 if (rev != UNKNOWN)
936 return gen_rtx_fmt_ee (rev, GET_MODE (XEXP (src, 0)),
937 XEXP (XEXP (src, 0), 0),
938 XEXP (XEXP (src, 0), 1));
941 return 0;
944 /* Return nonzero if CONDITION is more strict than the condition of
945 INSN, i.e., if INSN will always branch if CONDITION is true. */
947 static int
948 condition_dominates_p (rtx condition, rtx insn)
950 rtx other_condition = get_branch_condition (insn, JUMP_LABEL (insn));
951 enum rtx_code code = GET_CODE (condition);
952 enum rtx_code other_code;
954 if (rtx_equal_p (condition, other_condition)
955 || other_condition == const_true_rtx)
956 return 1;
958 else if (condition == const_true_rtx || other_condition == 0)
959 return 0;
961 other_code = GET_CODE (other_condition);
962 if (GET_RTX_LENGTH (code) != 2 || GET_RTX_LENGTH (other_code) != 2
963 || ! rtx_equal_p (XEXP (condition, 0), XEXP (other_condition, 0))
964 || ! rtx_equal_p (XEXP (condition, 1), XEXP (other_condition, 1)))
965 return 0;
967 return comparison_dominates_p (code, other_code);
970 /* Return nonzero if redirecting JUMP to NEWLABEL does not invalidate
971 any insns already in the delay slot of JUMP. */
973 static int
974 redirect_with_delay_slots_safe_p (rtx jump, rtx newlabel, rtx seq)
976 int flags, i;
977 rtx pat = PATTERN (seq);
979 /* Make sure all the delay slots of this jump would still
980 be valid after threading the jump. If they are still
981 valid, then return nonzero. */
983 flags = get_jump_flags (jump, newlabel);
984 for (i = 1; i < XVECLEN (pat, 0); i++)
985 if (! (
986 #ifdef ANNUL_IFFALSE_SLOTS
987 (INSN_ANNULLED_BRANCH_P (jump)
988 && INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
989 ? eligible_for_annul_false (jump, i - 1,
990 XVECEXP (pat, 0, i), flags) :
991 #endif
992 #ifdef ANNUL_IFTRUE_SLOTS
993 (INSN_ANNULLED_BRANCH_P (jump)
994 && ! INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
995 ? eligible_for_annul_true (jump, i - 1,
996 XVECEXP (pat, 0, i), flags) :
997 #endif
998 eligible_for_delay (jump, i - 1, XVECEXP (pat, 0, i), flags)))
999 break;
1001 return (i == XVECLEN (pat, 0));
1004 /* Return nonzero if redirecting JUMP to NEWLABEL does not invalidate
1005 any insns we wish to place in the delay slot of JUMP. */
1007 static int
1008 redirect_with_delay_list_safe_p (rtx jump, rtx newlabel, rtx delay_list)
1010 int flags, i;
1011 rtx li;
1013 /* Make sure all the insns in DELAY_LIST would still be
1014 valid after threading the jump. If they are still
1015 valid, then return nonzero. */
1017 flags = get_jump_flags (jump, newlabel);
1018 for (li = delay_list, i = 0; li; li = XEXP (li, 1), i++)
1019 if (! (
1020 #ifdef ANNUL_IFFALSE_SLOTS
1021 (INSN_ANNULLED_BRANCH_P (jump)
1022 && INSN_FROM_TARGET_P (XEXP (li, 0)))
1023 ? eligible_for_annul_false (jump, i, XEXP (li, 0), flags) :
1024 #endif
1025 #ifdef ANNUL_IFTRUE_SLOTS
1026 (INSN_ANNULLED_BRANCH_P (jump)
1027 && ! INSN_FROM_TARGET_P (XEXP (li, 0)))
1028 ? eligible_for_annul_true (jump, i, XEXP (li, 0), flags) :
1029 #endif
1030 eligible_for_delay (jump, i, XEXP (li, 0), flags)))
1031 break;
1033 return (li == NULL);
1036 /* DELAY_LIST is a list of insns that have already been placed into delay
1037 slots. See if all of them have the same annulling status as ANNUL_TRUE_P.
1038 If not, return 0; otherwise return 1. */
1040 static int
1041 check_annul_list_true_false (int annul_true_p, rtx delay_list)
1043 rtx temp;
1045 if (delay_list)
1047 for (temp = delay_list; temp; temp = XEXP (temp, 1))
1049 rtx trial = XEXP (temp, 0);
1051 if ((annul_true_p && INSN_FROM_TARGET_P (trial))
1052 || (!annul_true_p && !INSN_FROM_TARGET_P (trial)))
1053 return 0;
1057 return 1;
1060 /* INSN branches to an insn whose pattern SEQ is a SEQUENCE. Given that
1061 the condition tested by INSN is CONDITION and the resources shown in
1062 OTHER_NEEDED are needed after INSN, see whether INSN can take all the insns
1063 from SEQ's delay list, in addition to whatever insns it may execute
1064 (in DELAY_LIST). SETS and NEEDED are denote resources already set and
1065 needed while searching for delay slot insns. Return the concatenated
1066 delay list if possible, otherwise, return 0.
1068 SLOTS_TO_FILL is the total number of slots required by INSN, and
1069 PSLOTS_FILLED points to the number filled so far (also the number of
1070 insns in DELAY_LIST). It is updated with the number that have been
1071 filled from the SEQUENCE, if any.
1073 PANNUL_P points to a nonzero value if we already know that we need
1074 to annul INSN. If this routine determines that annulling is needed,
1075 it may set that value nonzero.
1077 PNEW_THREAD points to a location that is to receive the place at which
1078 execution should continue. */
1080 static rtx
1081 steal_delay_list_from_target (rtx insn, rtx condition, rtx seq,
1082 rtx delay_list, struct resources *sets,
1083 struct resources *needed,
1084 struct resources *other_needed,
1085 int slots_to_fill, int *pslots_filled,
1086 int *pannul_p, rtx *pnew_thread)
1088 rtx temp;
1089 int slots_remaining = slots_to_fill - *pslots_filled;
1090 int total_slots_filled = *pslots_filled;
1091 rtx new_delay_list = 0;
1092 int must_annul = *pannul_p;
1093 int used_annul = 0;
1094 int i;
1095 struct resources cc_set;
1096 bool *redundant;
1098 /* We can't do anything if there are more delay slots in SEQ than we
1099 can handle, or if we don't know that it will be a taken branch.
1100 We know that it will be a taken branch if it is either an unconditional
1101 branch or a conditional branch with a stricter branch condition.
1103 Also, exit if the branch has more than one set, since then it is computing
1104 other results that can't be ignored, e.g. the HPPA mov&branch instruction.
1105 ??? It may be possible to move other sets into INSN in addition to
1106 moving the instructions in the delay slots.
1108 We can not steal the delay list if one of the instructions in the
1109 current delay_list modifies the condition codes and the jump in the
1110 sequence is a conditional jump. We can not do this because we can
1111 not change the direction of the jump because the condition codes
1112 will effect the direction of the jump in the sequence. */
1114 CLEAR_RESOURCE (&cc_set);
1115 for (temp = delay_list; temp; temp = XEXP (temp, 1))
1117 rtx trial = XEXP (temp, 0);
1119 mark_set_resources (trial, &cc_set, 0, MARK_SRC_DEST_CALL);
1120 if (insn_references_resource_p (XVECEXP (seq , 0, 0), &cc_set, false))
1121 return delay_list;
1124 if (XVECLEN (seq, 0) - 1 > slots_remaining
1125 || ! condition_dominates_p (condition, XVECEXP (seq, 0, 0))
1126 || ! single_set (XVECEXP (seq, 0, 0)))
1127 return delay_list;
1129 #ifdef MD_CAN_REDIRECT_BRANCH
1130 /* On some targets, branches with delay slots can have a limited
1131 displacement. Give the back end a chance to tell us we can't do
1132 this. */
1133 if (! MD_CAN_REDIRECT_BRANCH (insn, XVECEXP (seq, 0, 0)))
1134 return delay_list;
1135 #endif
1137 redundant = XALLOCAVEC (bool, XVECLEN (seq, 0));
1138 for (i = 1; i < XVECLEN (seq, 0); i++)
1140 rtx trial = XVECEXP (seq, 0, i);
1141 int flags;
1143 if (insn_references_resource_p (trial, sets, false)
1144 || insn_sets_resource_p (trial, needed, false)
1145 || insn_sets_resource_p (trial, sets, false)
1146 #ifdef HAVE_cc0
1147 /* If TRIAL sets CC0, we can't copy it, so we can't steal this
1148 delay list. */
1149 || find_reg_note (trial, REG_CC_USER, NULL_RTX)
1150 #endif
1151 /* If TRIAL is from the fallthrough code of an annulled branch insn
1152 in SEQ, we cannot use it. */
1153 || (INSN_ANNULLED_BRANCH_P (XVECEXP (seq, 0, 0))
1154 && ! INSN_FROM_TARGET_P (trial)))
1155 return delay_list;
1157 /* If this insn was already done (usually in a previous delay slot),
1158 pretend we put it in our delay slot. */
1159 redundant[i] = redundant_insn (trial, insn, new_delay_list);
1160 if (redundant[i])
1161 continue;
1163 /* We will end up re-vectoring this branch, so compute flags
1164 based on jumping to the new label. */
1165 flags = get_jump_flags (insn, JUMP_LABEL (XVECEXP (seq, 0, 0)));
1167 if (! must_annul
1168 && ((condition == const_true_rtx
1169 || (! insn_sets_resource_p (trial, other_needed, false)
1170 && ! may_trap_or_fault_p (PATTERN (trial)))))
1171 ? eligible_for_delay (insn, total_slots_filled, trial, flags)
1172 : (must_annul || (delay_list == NULL && new_delay_list == NULL))
1173 && (must_annul = 1,
1174 check_annul_list_true_false (0, delay_list)
1175 && check_annul_list_true_false (0, new_delay_list)
1176 && eligible_for_annul_false (insn, total_slots_filled,
1177 trial, flags)))
1179 if (must_annul)
1180 used_annul = 1;
1181 temp = copy_delay_slot_insn (trial);
1182 INSN_FROM_TARGET_P (temp) = 1;
1183 new_delay_list = add_to_delay_list (temp, new_delay_list);
1184 total_slots_filled++;
1186 if (--slots_remaining == 0)
1187 break;
1189 else
1190 return delay_list;
1193 /* Record the effect of the instructions that were redundant and which
1194 we therefore decided not to copy. */
1195 for (i = 1; i < XVECLEN (seq, 0); i++)
1196 if (redundant[i])
1197 update_block (XVECEXP (seq, 0, i), insn);
1199 /* Show the place to which we will be branching. */
1200 *pnew_thread = first_active_target_insn (JUMP_LABEL (XVECEXP (seq, 0, 0)));
1202 /* Add any new insns to the delay list and update the count of the
1203 number of slots filled. */
1204 *pslots_filled = total_slots_filled;
1205 if (used_annul)
1206 *pannul_p = 1;
1208 if (delay_list == 0)
1209 return new_delay_list;
1211 for (temp = new_delay_list; temp; temp = XEXP (temp, 1))
1212 delay_list = add_to_delay_list (XEXP (temp, 0), delay_list);
1214 return delay_list;
1217 /* Similar to steal_delay_list_from_target except that SEQ is on the
1218 fallthrough path of INSN. Here we only do something if the delay insn
1219 of SEQ is an unconditional branch. In that case we steal its delay slot
1220 for INSN since unconditional branches are much easier to fill. */
1222 static rtx
1223 steal_delay_list_from_fallthrough (rtx insn, rtx condition, rtx seq,
1224 rtx delay_list, struct resources *sets,
1225 struct resources *needed,
1226 struct resources *other_needed,
1227 int slots_to_fill, int *pslots_filled,
1228 int *pannul_p)
1230 int i;
1231 int flags;
1232 int must_annul = *pannul_p;
1233 int used_annul = 0;
1235 flags = get_jump_flags (insn, JUMP_LABEL (insn));
1237 /* We can't do anything if SEQ's delay insn isn't an
1238 unconditional branch. */
1240 if (! simplejump_or_return_p (XVECEXP (seq, 0, 0)))
1241 return delay_list;
1243 for (i = 1; i < XVECLEN (seq, 0); i++)
1245 rtx trial = XVECEXP (seq, 0, i);
1247 /* If TRIAL sets CC0, stealing it will move it too far from the use
1248 of CC0. */
1249 if (insn_references_resource_p (trial, sets, false)
1250 || insn_sets_resource_p (trial, needed, false)
1251 || insn_sets_resource_p (trial, sets, false)
1252 #ifdef HAVE_cc0
1253 || sets_cc0_p (PATTERN (trial))
1254 #endif
1257 break;
1259 /* If this insn was already done, we don't need it. */
1260 if (redundant_insn (trial, insn, delay_list))
1262 update_block (trial, insn);
1263 delete_from_delay_slot (trial);
1264 continue;
1267 if (! must_annul
1268 && ((condition == const_true_rtx
1269 || (! insn_sets_resource_p (trial, other_needed, false)
1270 && ! may_trap_or_fault_p (PATTERN (trial)))))
1271 ? eligible_for_delay (insn, *pslots_filled, trial, flags)
1272 : (must_annul || delay_list == NULL) && (must_annul = 1,
1273 check_annul_list_true_false (1, delay_list)
1274 && eligible_for_annul_true (insn, *pslots_filled, trial, flags)))
1276 if (must_annul)
1277 used_annul = 1;
1278 delete_from_delay_slot (trial);
1279 delay_list = add_to_delay_list (trial, delay_list);
1281 if (++(*pslots_filled) == slots_to_fill)
1282 break;
1284 else
1285 break;
1288 if (used_annul)
1289 *pannul_p = 1;
1290 return delay_list;
1293 /* Try merging insns starting at THREAD which match exactly the insns in
1294 INSN's delay list.
1296 If all insns were matched and the insn was previously annulling, the
1297 annul bit will be cleared.
1299 For each insn that is merged, if the branch is or will be non-annulling,
1300 we delete the merged insn. */
1302 static void
1303 try_merge_delay_insns (rtx insn, rtx thread)
1305 rtx trial, next_trial;
1306 rtx delay_insn = XVECEXP (PATTERN (insn), 0, 0);
1307 int annul_p = JUMP_P (delay_insn) && INSN_ANNULLED_BRANCH_P (delay_insn);
1308 int slot_number = 1;
1309 int num_slots = XVECLEN (PATTERN (insn), 0);
1310 rtx next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1311 struct resources set, needed;
1312 rtx merged_insns = 0;
1313 int i;
1314 int flags;
1316 flags = get_jump_flags (delay_insn, JUMP_LABEL (delay_insn));
1318 CLEAR_RESOURCE (&needed);
1319 CLEAR_RESOURCE (&set);
1321 /* If this is not an annulling branch, take into account anything needed in
1322 INSN's delay slot. This prevents two increments from being incorrectly
1323 folded into one. If we are annulling, this would be the correct
1324 thing to do. (The alternative, looking at things set in NEXT_TO_MATCH
1325 will essentially disable this optimization. This method is somewhat of
1326 a kludge, but I don't see a better way.) */
1327 if (! annul_p)
1328 for (i = 1 ; i < num_slots; i++)
1329 if (XVECEXP (PATTERN (insn), 0, i))
1330 mark_referenced_resources (XVECEXP (PATTERN (insn), 0, i), &needed,
1331 true);
1333 for (trial = thread; !stop_search_p (trial, 1); trial = next_trial)
1335 rtx pat = PATTERN (trial);
1336 rtx oldtrial = trial;
1338 next_trial = next_nonnote_insn (trial);
1340 /* TRIAL must be a CALL_INSN or INSN. Skip USE and CLOBBER. */
1341 if (NONJUMP_INSN_P (trial)
1342 && (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER))
1343 continue;
1345 if (GET_CODE (next_to_match) == GET_CODE (trial)
1346 #ifdef HAVE_cc0
1347 /* We can't share an insn that sets cc0. */
1348 && ! sets_cc0_p (pat)
1349 #endif
1350 && ! insn_references_resource_p (trial, &set, true)
1351 && ! insn_sets_resource_p (trial, &set, true)
1352 && ! insn_sets_resource_p (trial, &needed, true)
1353 && (trial = try_split (pat, trial, 0)) != 0
1354 /* Update next_trial, in case try_split succeeded. */
1355 && (next_trial = next_nonnote_insn (trial))
1356 /* Likewise THREAD. */
1357 && (thread = oldtrial == thread ? trial : thread)
1358 && rtx_equal_p (PATTERN (next_to_match), PATTERN (trial))
1359 /* Have to test this condition if annul condition is different
1360 from (and less restrictive than) non-annulling one. */
1361 && eligible_for_delay (delay_insn, slot_number - 1, trial, flags))
1364 if (! annul_p)
1366 update_block (trial, thread);
1367 if (trial == thread)
1368 thread = next_active_insn (thread);
1370 delete_related_insns (trial);
1371 INSN_FROM_TARGET_P (next_to_match) = 0;
1373 else
1374 merged_insns = gen_rtx_INSN_LIST (VOIDmode, trial, merged_insns);
1376 if (++slot_number == num_slots)
1377 break;
1379 next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1382 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
1383 mark_referenced_resources (trial, &needed, true);
1386 /* See if we stopped on a filled insn. If we did, try to see if its
1387 delay slots match. */
1388 if (slot_number != num_slots
1389 && trial && NONJUMP_INSN_P (trial)
1390 && GET_CODE (PATTERN (trial)) == SEQUENCE
1391 && !(JUMP_P (XVECEXP (PATTERN (trial), 0, 0))
1392 && INSN_ANNULLED_BRANCH_P (XVECEXP (PATTERN (trial), 0, 0))))
1394 rtx pat = PATTERN (trial);
1395 rtx filled_insn = XVECEXP (pat, 0, 0);
1397 /* Account for resources set/needed by the filled insn. */
1398 mark_set_resources (filled_insn, &set, 0, MARK_SRC_DEST_CALL);
1399 mark_referenced_resources (filled_insn, &needed, true);
1401 for (i = 1; i < XVECLEN (pat, 0); i++)
1403 rtx dtrial = XVECEXP (pat, 0, i);
1405 if (! insn_references_resource_p (dtrial, &set, true)
1406 && ! insn_sets_resource_p (dtrial, &set, true)
1407 && ! insn_sets_resource_p (dtrial, &needed, true)
1408 #ifdef HAVE_cc0
1409 && ! sets_cc0_p (PATTERN (dtrial))
1410 #endif
1411 && rtx_equal_p (PATTERN (next_to_match), PATTERN (dtrial))
1412 && eligible_for_delay (delay_insn, slot_number - 1, dtrial, flags))
1414 if (! annul_p)
1416 rtx new_rtx;
1418 update_block (dtrial, thread);
1419 new_rtx = delete_from_delay_slot (dtrial);
1420 if (INSN_DELETED_P (thread))
1421 thread = new_rtx;
1422 INSN_FROM_TARGET_P (next_to_match) = 0;
1424 else
1425 merged_insns = gen_rtx_INSN_LIST (SImode, dtrial,
1426 merged_insns);
1428 if (++slot_number == num_slots)
1429 break;
1431 next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1433 else
1435 /* Keep track of the set/referenced resources for the delay
1436 slots of any trial insns we encounter. */
1437 mark_set_resources (dtrial, &set, 0, MARK_SRC_DEST_CALL);
1438 mark_referenced_resources (dtrial, &needed, true);
1443 /* If all insns in the delay slot have been matched and we were previously
1444 annulling the branch, we need not any more. In that case delete all the
1445 merged insns. Also clear the INSN_FROM_TARGET_P bit of each insn in
1446 the delay list so that we know that it isn't only being used at the
1447 target. */
1448 if (slot_number == num_slots && annul_p)
1450 for (; merged_insns; merged_insns = XEXP (merged_insns, 1))
1452 if (GET_MODE (merged_insns) == SImode)
1454 rtx new_rtx;
1456 update_block (XEXP (merged_insns, 0), thread);
1457 new_rtx = delete_from_delay_slot (XEXP (merged_insns, 0));
1458 if (INSN_DELETED_P (thread))
1459 thread = new_rtx;
1461 else
1463 update_block (XEXP (merged_insns, 0), thread);
1464 delete_related_insns (XEXP (merged_insns, 0));
1468 INSN_ANNULLED_BRANCH_P (delay_insn) = 0;
1470 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
1471 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i)) = 0;
1475 /* See if INSN is redundant with an insn in front of TARGET. Often this
1476 is called when INSN is a candidate for a delay slot of TARGET.
1477 DELAY_LIST are insns that will be placed in delay slots of TARGET in front
1478 of INSN. Often INSN will be redundant with an insn in a delay slot of
1479 some previous insn. This happens when we have a series of branches to the
1480 same label; in that case the first insn at the target might want to go
1481 into each of the delay slots.
1483 If we are not careful, this routine can take up a significant fraction
1484 of the total compilation time (4%), but only wins rarely. Hence we
1485 speed this routine up by making two passes. The first pass goes back
1486 until it hits a label and sees if it finds an insn with an identical
1487 pattern. Only in this (relatively rare) event does it check for
1488 data conflicts.
1490 We do not split insns we encounter. This could cause us not to find a
1491 redundant insn, but the cost of splitting seems greater than the possible
1492 gain in rare cases. */
1494 static rtx
1495 redundant_insn (rtx insn, rtx target, rtx delay_list)
1497 rtx target_main = target;
1498 rtx ipat = PATTERN (insn);
1499 rtx trial, pat;
1500 struct resources needed, set;
1501 int i;
1502 unsigned insns_to_search;
1504 /* If INSN has any REG_UNUSED notes, it can't match anything since we
1505 are allowed to not actually assign to such a register. */
1506 if (find_reg_note (insn, REG_UNUSED, NULL_RTX) != 0)
1507 return 0;
1509 /* Scan backwards looking for a match. */
1510 for (trial = PREV_INSN (target),
1511 insns_to_search = MAX_DELAY_SLOT_INSN_SEARCH;
1512 trial && insns_to_search > 0;
1513 trial = PREV_INSN (trial))
1515 /* (use (insn))s can come immediately after a barrier if the
1516 label that used to precede them has been deleted as dead.
1517 See delete_related_insns. */
1518 if (LABEL_P (trial) || BARRIER_P (trial))
1519 return 0;
1521 if (!INSN_P (trial))
1522 continue;
1523 --insns_to_search;
1525 pat = PATTERN (trial);
1526 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
1527 continue;
1529 if (GET_CODE (pat) == SEQUENCE)
1531 /* Stop for a CALL and its delay slots because it is difficult to
1532 track its resource needs correctly. */
1533 if (CALL_P (XVECEXP (pat, 0, 0)))
1534 return 0;
1536 /* Stop for an INSN or JUMP_INSN with delayed effects and its delay
1537 slots because it is difficult to track its resource needs
1538 correctly. */
1540 #ifdef INSN_SETS_ARE_DELAYED
1541 if (INSN_SETS_ARE_DELAYED (XVECEXP (pat, 0, 0)))
1542 return 0;
1543 #endif
1545 #ifdef INSN_REFERENCES_ARE_DELAYED
1546 if (INSN_REFERENCES_ARE_DELAYED (XVECEXP (pat, 0, 0)))
1547 return 0;
1548 #endif
1550 /* See if any of the insns in the delay slot match, updating
1551 resource requirements as we go. */
1552 for (i = XVECLEN (pat, 0) - 1; i > 0; i--)
1553 if (GET_CODE (XVECEXP (pat, 0, i)) == GET_CODE (insn)
1554 && rtx_equal_p (PATTERN (XVECEXP (pat, 0, i)), ipat)
1555 && ! find_reg_note (XVECEXP (pat, 0, i), REG_UNUSED, NULL_RTX))
1556 break;
1558 /* If found a match, exit this loop early. */
1559 if (i > 0)
1560 break;
1563 else if (GET_CODE (trial) == GET_CODE (insn) && rtx_equal_p (pat, ipat)
1564 && ! find_reg_note (trial, REG_UNUSED, NULL_RTX))
1565 break;
1568 /* If we didn't find an insn that matches, return 0. */
1569 if (trial == 0)
1570 return 0;
1572 /* See what resources this insn sets and needs. If they overlap, or
1573 if this insn references CC0, it can't be redundant. */
1575 CLEAR_RESOURCE (&needed);
1576 CLEAR_RESOURCE (&set);
1577 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
1578 mark_referenced_resources (insn, &needed, true);
1580 /* If TARGET is a SEQUENCE, get the main insn. */
1581 if (NONJUMP_INSN_P (target) && GET_CODE (PATTERN (target)) == SEQUENCE)
1582 target_main = XVECEXP (PATTERN (target), 0, 0);
1584 if (resource_conflicts_p (&needed, &set)
1585 #ifdef HAVE_cc0
1586 || reg_mentioned_p (cc0_rtx, ipat)
1587 #endif
1588 /* The insn requiring the delay may not set anything needed or set by
1589 INSN. */
1590 || insn_sets_resource_p (target_main, &needed, true)
1591 || insn_sets_resource_p (target_main, &set, true))
1592 return 0;
1594 /* Insns we pass may not set either NEEDED or SET, so merge them for
1595 simpler tests. */
1596 needed.memory |= set.memory;
1597 IOR_HARD_REG_SET (needed.regs, set.regs);
1599 /* This insn isn't redundant if it conflicts with an insn that either is
1600 or will be in a delay slot of TARGET. */
1602 while (delay_list)
1604 if (insn_sets_resource_p (XEXP (delay_list, 0), &needed, true))
1605 return 0;
1606 delay_list = XEXP (delay_list, 1);
1609 if (NONJUMP_INSN_P (target) && GET_CODE (PATTERN (target)) == SEQUENCE)
1610 for (i = 1; i < XVECLEN (PATTERN (target), 0); i++)
1611 if (insn_sets_resource_p (XVECEXP (PATTERN (target), 0, i), &needed,
1612 true))
1613 return 0;
1615 /* Scan backwards until we reach a label or an insn that uses something
1616 INSN sets or sets something insn uses or sets. */
1618 for (trial = PREV_INSN (target),
1619 insns_to_search = MAX_DELAY_SLOT_INSN_SEARCH;
1620 trial && !LABEL_P (trial) && insns_to_search > 0;
1621 trial = PREV_INSN (trial))
1623 if (!INSN_P (trial))
1624 continue;
1625 --insns_to_search;
1627 pat = PATTERN (trial);
1628 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
1629 continue;
1631 if (GET_CODE (pat) == SEQUENCE)
1633 bool annul_p = false;
1634 rtx control = XVECEXP (pat, 0, 0);
1636 /* If this is a CALL_INSN and its delay slots, it is hard to track
1637 the resource needs properly, so give up. */
1638 if (CALL_P (control))
1639 return 0;
1641 /* If this is an INSN or JUMP_INSN with delayed effects, it
1642 is hard to track the resource needs properly, so give up. */
1644 #ifdef INSN_SETS_ARE_DELAYED
1645 if (INSN_SETS_ARE_DELAYED (control))
1646 return 0;
1647 #endif
1649 #ifdef INSN_REFERENCES_ARE_DELAYED
1650 if (INSN_REFERENCES_ARE_DELAYED (control))
1651 return 0;
1652 #endif
1654 if (JUMP_P (control))
1655 annul_p = INSN_ANNULLED_BRANCH_P (control);
1657 /* See if any of the insns in the delay slot match, updating
1658 resource requirements as we go. */
1659 for (i = XVECLEN (pat, 0) - 1; i > 0; i--)
1661 rtx candidate = XVECEXP (pat, 0, i);
1663 /* If an insn will be annulled if the branch is false, it isn't
1664 considered as a possible duplicate insn. */
1665 if (rtx_equal_p (PATTERN (candidate), ipat)
1666 && ! (annul_p && INSN_FROM_TARGET_P (candidate)))
1668 /* Show that this insn will be used in the sequel. */
1669 INSN_FROM_TARGET_P (candidate) = 0;
1670 return candidate;
1673 /* Unless this is an annulled insn from the target of a branch,
1674 we must stop if it sets anything needed or set by INSN. */
1675 if ((!annul_p || !INSN_FROM_TARGET_P (candidate))
1676 && insn_sets_resource_p (candidate, &needed, true))
1677 return 0;
1680 /* If the insn requiring the delay slot conflicts with INSN, we
1681 must stop. */
1682 if (insn_sets_resource_p (control, &needed, true))
1683 return 0;
1685 else
1687 /* See if TRIAL is the same as INSN. */
1688 pat = PATTERN (trial);
1689 if (rtx_equal_p (pat, ipat))
1690 return trial;
1692 /* Can't go any further if TRIAL conflicts with INSN. */
1693 if (insn_sets_resource_p (trial, &needed, true))
1694 return 0;
1698 return 0;
1701 /* Return 1 if THREAD can only be executed in one way. If LABEL is nonzero,
1702 it is the target of the branch insn being scanned. If ALLOW_FALLTHROUGH
1703 is nonzero, we are allowed to fall into this thread; otherwise, we are
1704 not.
1706 If LABEL is used more than one or we pass a label other than LABEL before
1707 finding an active insn, we do not own this thread. */
1709 static int
1710 own_thread_p (rtx thread, rtx label, int allow_fallthrough)
1712 rtx active_insn;
1713 rtx insn;
1715 /* We don't own the function end. */
1716 if (thread == 0 || ANY_RETURN_P (thread))
1717 return 0;
1719 /* Get the first active insn, or THREAD, if it is an active insn. */
1720 active_insn = next_active_insn (PREV_INSN (thread));
1722 for (insn = thread; insn != active_insn; insn = NEXT_INSN (insn))
1723 if (LABEL_P (insn)
1724 && (insn != label || LABEL_NUSES (insn) != 1))
1725 return 0;
1727 if (allow_fallthrough)
1728 return 1;
1730 /* Ensure that we reach a BARRIER before any insn or label. */
1731 for (insn = prev_nonnote_insn (thread);
1732 insn == 0 || !BARRIER_P (insn);
1733 insn = prev_nonnote_insn (insn))
1734 if (insn == 0
1735 || LABEL_P (insn)
1736 || (NONJUMP_INSN_P (insn)
1737 && GET_CODE (PATTERN (insn)) != USE
1738 && GET_CODE (PATTERN (insn)) != CLOBBER))
1739 return 0;
1741 return 1;
1744 /* Called when INSN is being moved from a location near the target of a jump.
1745 We leave a marker of the form (use (INSN)) immediately in front
1746 of WHERE for mark_target_live_regs. These markers will be deleted when
1747 reorg finishes.
1749 We used to try to update the live status of registers if WHERE is at
1750 the start of a basic block, but that can't work since we may remove a
1751 BARRIER in relax_delay_slots. */
1753 static void
1754 update_block (rtx insn, rtx where)
1756 /* Ignore if this was in a delay slot and it came from the target of
1757 a branch. */
1758 if (INSN_FROM_TARGET_P (insn))
1759 return;
1761 emit_insn_before (gen_rtx_USE (VOIDmode, insn), where);
1763 /* INSN might be making a value live in a block where it didn't use to
1764 be. So recompute liveness information for this block. */
1766 incr_ticks_for_insn (insn);
1769 /* Similar to REDIRECT_JUMP except that we update the BB_TICKS entry for
1770 the basic block containing the jump. */
1772 static int
1773 reorg_redirect_jump (rtx jump, rtx nlabel)
1775 incr_ticks_for_insn (jump);
1776 return redirect_jump (jump, nlabel, 1);
1779 /* Called when INSN is being moved forward into a delay slot of DELAYED_INSN.
1780 We check every instruction between INSN and DELAYED_INSN for REG_DEAD notes
1781 that reference values used in INSN. If we find one, then we move the
1782 REG_DEAD note to INSN.
1784 This is needed to handle the case where a later insn (after INSN) has a
1785 REG_DEAD note for a register used by INSN, and this later insn subsequently
1786 gets moved before a CODE_LABEL because it is a redundant insn. In this
1787 case, mark_target_live_regs may be confused into thinking the register
1788 is dead because it sees a REG_DEAD note immediately before a CODE_LABEL. */
1790 static void
1791 update_reg_dead_notes (rtx insn, rtx delayed_insn)
1793 rtx p, link, next;
1795 for (p = next_nonnote_insn (insn); p != delayed_insn;
1796 p = next_nonnote_insn (p))
1797 for (link = REG_NOTES (p); link; link = next)
1799 next = XEXP (link, 1);
1801 if (REG_NOTE_KIND (link) != REG_DEAD
1802 || !REG_P (XEXP (link, 0)))
1803 continue;
1805 if (reg_referenced_p (XEXP (link, 0), PATTERN (insn)))
1807 /* Move the REG_DEAD note from P to INSN. */
1808 remove_note (p, link);
1809 XEXP (link, 1) = REG_NOTES (insn);
1810 REG_NOTES (insn) = link;
1815 /* Called when an insn redundant with start_insn is deleted. If there
1816 is a REG_DEAD note for the target of start_insn between start_insn
1817 and stop_insn, then the REG_DEAD note needs to be deleted since the
1818 value no longer dies there.
1820 If the REG_DEAD note isn't deleted, then mark_target_live_regs may be
1821 confused into thinking the register is dead. */
1823 static void
1824 fix_reg_dead_note (rtx start_insn, rtx stop_insn)
1826 rtx p, link, next;
1828 for (p = next_nonnote_insn (start_insn); p != stop_insn;
1829 p = next_nonnote_insn (p))
1830 for (link = REG_NOTES (p); link; link = next)
1832 next = XEXP (link, 1);
1834 if (REG_NOTE_KIND (link) != REG_DEAD
1835 || !REG_P (XEXP (link, 0)))
1836 continue;
1838 if (reg_set_p (XEXP (link, 0), PATTERN (start_insn)))
1840 remove_note (p, link);
1841 return;
1846 /* Delete any REG_UNUSED notes that exist on INSN but not on REDUNDANT_INSN.
1848 This handles the case of udivmodXi4 instructions which optimize their
1849 output depending on whether any REG_UNUSED notes are present.
1850 we must make sure that INSN calculates as many results as REDUNDANT_INSN
1851 does. */
1853 static void
1854 update_reg_unused_notes (rtx insn, rtx redundant_insn)
1856 rtx link, next;
1858 for (link = REG_NOTES (insn); link; link = next)
1860 next = XEXP (link, 1);
1862 if (REG_NOTE_KIND (link) != REG_UNUSED
1863 || !REG_P (XEXP (link, 0)))
1864 continue;
1866 if (! find_regno_note (redundant_insn, REG_UNUSED,
1867 REGNO (XEXP (link, 0))))
1868 remove_note (insn, link);
1872 static vec <rtx> sibling_labels;
1874 /* Return the label before INSN, or put a new label there. If SIBLING is
1875 non-zero, it is another label associated with the new label (if any),
1876 typically the former target of the jump that will be redirected to
1877 the new label. */
1879 static rtx
1880 get_label_before (rtx insn, rtx sibling)
1882 rtx label;
1884 /* Find an existing label at this point
1885 or make a new one if there is none. */
1886 label = prev_nonnote_insn (insn);
1888 if (label == 0 || !LABEL_P (label))
1890 rtx prev = PREV_INSN (insn);
1892 label = gen_label_rtx ();
1893 emit_label_after (label, prev);
1894 LABEL_NUSES (label) = 0;
1895 if (sibling)
1897 sibling_labels.safe_push (label);
1898 sibling_labels.safe_push (sibling);
1901 return label;
1904 /* Scan a function looking for insns that need a delay slot and find insns to
1905 put into the delay slot.
1907 NON_JUMPS_P is nonzero if we are to only try to fill non-jump insns (such
1908 as calls). We do these first since we don't want jump insns (that are
1909 easier to fill) to get the only insns that could be used for non-jump insns.
1910 When it is zero, only try to fill JUMP_INSNs.
1912 When slots are filled in this manner, the insns (including the
1913 delay_insn) are put together in a SEQUENCE rtx. In this fashion,
1914 it is possible to tell whether a delay slot has really been filled
1915 or not. `final' knows how to deal with this, by communicating
1916 through FINAL_SEQUENCE. */
1918 static void
1919 fill_simple_delay_slots (int non_jumps_p)
1921 rtx insn, pat, trial, next_trial;
1922 int i;
1923 int num_unfilled_slots = unfilled_slots_next - unfilled_slots_base;
1924 struct resources needed, set;
1925 int slots_to_fill, slots_filled;
1926 rtx delay_list;
1928 for (i = 0; i < num_unfilled_slots; i++)
1930 int flags;
1931 /* Get the next insn to fill. If it has already had any slots assigned,
1932 we can't do anything with it. Maybe we'll improve this later. */
1934 insn = unfilled_slots_base[i];
1935 if (insn == 0
1936 || INSN_DELETED_P (insn)
1937 || (NONJUMP_INSN_P (insn)
1938 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1939 || (JUMP_P (insn) && non_jumps_p)
1940 || (!JUMP_P (insn) && ! non_jumps_p))
1941 continue;
1943 /* It may have been that this insn used to need delay slots, but
1944 now doesn't; ignore in that case. This can happen, for example,
1945 on the HP PA RISC, where the number of delay slots depends on
1946 what insns are nearby. */
1947 slots_to_fill = num_delay_slots (insn);
1949 /* Some machine description have defined instructions to have
1950 delay slots only in certain circumstances which may depend on
1951 nearby insns (which change due to reorg's actions).
1953 For example, the PA port normally has delay slots for unconditional
1954 jumps.
1956 However, the PA port claims such jumps do not have a delay slot
1957 if they are immediate successors of certain CALL_INSNs. This
1958 allows the port to favor filling the delay slot of the call with
1959 the unconditional jump. */
1960 if (slots_to_fill == 0)
1961 continue;
1963 /* This insn needs, or can use, some delay slots. SLOTS_TO_FILL
1964 says how many. After initialization, first try optimizing
1966 call _foo call _foo
1967 nop add %o7,.-L1,%o7
1968 b,a L1
1971 If this case applies, the delay slot of the call is filled with
1972 the unconditional jump. This is done first to avoid having the
1973 delay slot of the call filled in the backward scan. Also, since
1974 the unconditional jump is likely to also have a delay slot, that
1975 insn must exist when it is subsequently scanned.
1977 This is tried on each insn with delay slots as some machines
1978 have insns which perform calls, but are not represented as
1979 CALL_INSNs. */
1981 slots_filled = 0;
1982 delay_list = 0;
1984 if (JUMP_P (insn))
1985 flags = get_jump_flags (insn, JUMP_LABEL (insn));
1986 else
1987 flags = get_jump_flags (insn, NULL_RTX);
1989 if ((trial = next_active_insn (insn))
1990 && JUMP_P (trial)
1991 && simplejump_p (trial)
1992 && eligible_for_delay (insn, slots_filled, trial, flags)
1993 && no_labels_between_p (insn, trial)
1994 && ! can_throw_internal (trial))
1996 rtx *tmp;
1997 slots_filled++;
1998 delay_list = add_to_delay_list (trial, delay_list);
2000 /* TRIAL may have had its delay slot filled, then unfilled. When
2001 the delay slot is unfilled, TRIAL is placed back on the unfilled
2002 slots obstack. Unfortunately, it is placed on the end of the
2003 obstack, not in its original location. Therefore, we must search
2004 from entry i + 1 to the end of the unfilled slots obstack to
2005 try and find TRIAL. */
2006 tmp = &unfilled_slots_base[i + 1];
2007 while (*tmp != trial && tmp != unfilled_slots_next)
2008 tmp++;
2010 /* Remove the unconditional jump from consideration for delay slot
2011 filling and unthread it. */
2012 if (*tmp == trial)
2013 *tmp = 0;
2015 rtx next = NEXT_INSN (trial);
2016 rtx prev = PREV_INSN (trial);
2017 if (prev)
2018 NEXT_INSN (prev) = next;
2019 if (next)
2020 PREV_INSN (next) = prev;
2024 /* Now, scan backwards from the insn to search for a potential
2025 delay-slot candidate. Stop searching when a label or jump is hit.
2027 For each candidate, if it is to go into the delay slot (moved
2028 forward in execution sequence), it must not need or set any resources
2029 that were set by later insns and must not set any resources that
2030 are needed for those insns.
2032 The delay slot insn itself sets resources unless it is a call
2033 (in which case the called routine, not the insn itself, is doing
2034 the setting). */
2036 if (slots_filled < slots_to_fill)
2038 CLEAR_RESOURCE (&needed);
2039 CLEAR_RESOURCE (&set);
2040 mark_set_resources (insn, &set, 0, MARK_SRC_DEST);
2041 mark_referenced_resources (insn, &needed, false);
2043 for (trial = prev_nonnote_insn (insn); ! stop_search_p (trial, 1);
2044 trial = next_trial)
2046 next_trial = prev_nonnote_insn (trial);
2048 /* This must be an INSN or CALL_INSN. */
2049 pat = PATTERN (trial);
2051 /* Stand-alone USE and CLOBBER are just for flow. */
2052 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2053 continue;
2055 /* Check for resource conflict first, to avoid unnecessary
2056 splitting. */
2057 if (! insn_references_resource_p (trial, &set, true)
2058 && ! insn_sets_resource_p (trial, &set, true)
2059 && ! insn_sets_resource_p (trial, &needed, true)
2060 #ifdef HAVE_cc0
2061 /* Can't separate set of cc0 from its use. */
2062 && ! (reg_mentioned_p (cc0_rtx, pat) && ! sets_cc0_p (pat))
2063 #endif
2064 && ! can_throw_internal (trial))
2066 trial = try_split (pat, trial, 1);
2067 next_trial = prev_nonnote_insn (trial);
2068 if (eligible_for_delay (insn, slots_filled, trial, flags))
2070 /* In this case, we are searching backward, so if we
2071 find insns to put on the delay list, we want
2072 to put them at the head, rather than the
2073 tail, of the list. */
2075 update_reg_dead_notes (trial, insn);
2076 delay_list = gen_rtx_INSN_LIST (VOIDmode,
2077 trial, delay_list);
2078 update_block (trial, trial);
2079 delete_related_insns (trial);
2080 if (slots_to_fill == ++slots_filled)
2081 break;
2082 continue;
2086 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2087 mark_referenced_resources (trial, &needed, true);
2091 /* If all needed slots haven't been filled, we come here. */
2093 /* Try to optimize case of jumping around a single insn. */
2094 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
2095 if (slots_filled != slots_to_fill
2096 && delay_list == 0
2097 && JUMP_P (insn)
2098 && (condjump_p (insn) || condjump_in_parallel_p (insn))
2099 && !ANY_RETURN_P (JUMP_LABEL (insn)))
2101 delay_list = optimize_skip (insn);
2102 if (delay_list)
2103 slots_filled += 1;
2105 #endif
2107 /* Try to get insns from beyond the insn needing the delay slot.
2108 These insns can neither set or reference resources set in insns being
2109 skipped, cannot set resources in the insn being skipped, and, if this
2110 is a CALL_INSN (or a CALL_INSN is passed), cannot trap (because the
2111 call might not return).
2113 There used to be code which continued past the target label if
2114 we saw all uses of the target label. This code did not work,
2115 because it failed to account for some instructions which were
2116 both annulled and marked as from the target. This can happen as a
2117 result of optimize_skip. Since this code was redundant with
2118 fill_eager_delay_slots anyways, it was just deleted. */
2120 if (slots_filled != slots_to_fill
2121 /* If this instruction could throw an exception which is
2122 caught in the same function, then it's not safe to fill
2123 the delay slot with an instruction from beyond this
2124 point. For example, consider:
2126 int i = 2;
2128 try {
2129 f();
2130 i = 3;
2131 } catch (...) {}
2133 return i;
2135 Even though `i' is a local variable, we must be sure not
2136 to put `i = 3' in the delay slot if `f' might throw an
2137 exception.
2139 Presumably, we should also check to see if we could get
2140 back to this function via `setjmp'. */
2141 && ! can_throw_internal (insn)
2142 && !JUMP_P (insn))
2144 int maybe_never = 0;
2145 rtx pat, trial_delay;
2147 CLEAR_RESOURCE (&needed);
2148 CLEAR_RESOURCE (&set);
2149 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
2150 mark_referenced_resources (insn, &needed, true);
2152 if (CALL_P (insn))
2153 maybe_never = 1;
2155 for (trial = next_nonnote_insn (insn); !stop_search_p (trial, 1);
2156 trial = next_trial)
2158 next_trial = next_nonnote_insn (trial);
2160 /* This must be an INSN or CALL_INSN. */
2161 pat = PATTERN (trial);
2163 /* Stand-alone USE and CLOBBER are just for flow. */
2164 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2165 continue;
2167 /* If this already has filled delay slots, get the insn needing
2168 the delay slots. */
2169 if (GET_CODE (pat) == SEQUENCE)
2170 trial_delay = XVECEXP (pat, 0, 0);
2171 else
2172 trial_delay = trial;
2174 /* Stop our search when seeing a jump. */
2175 if (JUMP_P (trial_delay))
2176 break;
2178 /* See if we have a resource problem before we try to split. */
2179 if (GET_CODE (pat) != SEQUENCE
2180 && ! insn_references_resource_p (trial, &set, true)
2181 && ! insn_sets_resource_p (trial, &set, true)
2182 && ! insn_sets_resource_p (trial, &needed, true)
2183 #ifdef HAVE_cc0
2184 && ! (reg_mentioned_p (cc0_rtx, pat) && ! sets_cc0_p (pat))
2185 #endif
2186 && ! (maybe_never && may_trap_or_fault_p (pat))
2187 && (trial = try_split (pat, trial, 0))
2188 && eligible_for_delay (insn, slots_filled, trial, flags)
2189 && ! can_throw_internal (trial))
2191 next_trial = next_nonnote_insn (trial);
2192 delay_list = add_to_delay_list (trial, delay_list);
2193 #ifdef HAVE_cc0
2194 if (reg_mentioned_p (cc0_rtx, pat))
2195 link_cc0_insns (trial);
2196 #endif
2197 delete_related_insns (trial);
2198 if (slots_to_fill == ++slots_filled)
2199 break;
2200 continue;
2203 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2204 mark_referenced_resources (trial, &needed, true);
2206 /* Ensure we don't put insns between the setting of cc and the
2207 comparison by moving a setting of cc into an earlier delay
2208 slot since these insns could clobber the condition code. */
2209 set.cc = 1;
2211 /* If this is a call, we might not get here. */
2212 if (CALL_P (trial_delay))
2213 maybe_never = 1;
2216 /* If there are slots left to fill and our search was stopped by an
2217 unconditional branch, try the insn at the branch target. We can
2218 redirect the branch if it works.
2220 Don't do this if the insn at the branch target is a branch. */
2221 if (slots_to_fill != slots_filled
2222 && trial
2223 && jump_to_label_p (trial)
2224 && simplejump_p (trial)
2225 && (next_trial = next_active_insn (JUMP_LABEL (trial))) != 0
2226 && ! (NONJUMP_INSN_P (next_trial)
2227 && GET_CODE (PATTERN (next_trial)) == SEQUENCE)
2228 && !JUMP_P (next_trial)
2229 && ! insn_references_resource_p (next_trial, &set, true)
2230 && ! insn_sets_resource_p (next_trial, &set, true)
2231 && ! insn_sets_resource_p (next_trial, &needed, true)
2232 #ifdef HAVE_cc0
2233 && ! reg_mentioned_p (cc0_rtx, PATTERN (next_trial))
2234 #endif
2235 && ! (maybe_never && may_trap_or_fault_p (PATTERN (next_trial)))
2236 && (next_trial = try_split (PATTERN (next_trial), next_trial, 0))
2237 && eligible_for_delay (insn, slots_filled, next_trial, flags)
2238 && ! can_throw_internal (trial))
2240 /* See comment in relax_delay_slots about necessity of using
2241 next_real_insn here. */
2242 rtx new_label = next_real_insn (next_trial);
2244 if (new_label != 0)
2245 new_label = get_label_before (new_label, JUMP_LABEL (trial));
2246 else
2247 new_label = find_end_label (simple_return_rtx);
2249 if (new_label)
2251 delay_list
2252 = add_to_delay_list (copy_delay_slot_insn (next_trial),
2253 delay_list);
2254 slots_filled++;
2255 reorg_redirect_jump (trial, new_label);
2260 /* If this is an unconditional jump, then try to get insns from the
2261 target of the jump. */
2262 if (JUMP_P (insn)
2263 && simplejump_p (insn)
2264 && slots_filled != slots_to_fill)
2265 delay_list
2266 = fill_slots_from_thread (insn, const_true_rtx,
2267 next_active_insn (JUMP_LABEL (insn)),
2268 NULL, 1, 1,
2269 own_thread_p (JUMP_LABEL (insn),
2270 JUMP_LABEL (insn), 0),
2271 slots_to_fill, &slots_filled,
2272 delay_list);
2274 if (delay_list)
2275 unfilled_slots_base[i]
2276 = emit_delay_sequence (insn, delay_list, slots_filled);
2278 if (slots_to_fill == slots_filled)
2279 unfilled_slots_base[i] = 0;
2281 note_delay_statistics (slots_filled, 0);
2285 /* Follow any unconditional jump at LABEL, for the purpose of redirecting JUMP;
2286 return the ultimate label reached by any such chain of jumps.
2287 Return a suitable return rtx if the chain ultimately leads to a
2288 return instruction.
2289 If LABEL is not followed by a jump, return LABEL.
2290 If the chain loops or we can't find end, return LABEL,
2291 since that tells caller to avoid changing the insn.
2292 If the returned label is obtained by following a crossing jump,
2293 set *CROSSING to true, otherwise set it to false. */
2295 static rtx
2296 follow_jumps (rtx label, rtx jump, bool *crossing)
2298 rtx insn;
2299 rtx next;
2300 rtx value = label;
2301 int depth;
2303 *crossing = false;
2304 if (ANY_RETURN_P (label))
2305 return label;
2306 for (depth = 0;
2307 (depth < 10
2308 && (insn = next_active_insn (value)) != 0
2309 && JUMP_P (insn)
2310 && JUMP_LABEL (insn) != NULL_RTX
2311 && ((any_uncondjump_p (insn) && onlyjump_p (insn))
2312 || ANY_RETURN_P (PATTERN (insn)))
2313 && (next = NEXT_INSN (insn))
2314 && BARRIER_P (next));
2315 depth++)
2317 rtx this_label = JUMP_LABEL (insn);
2319 /* If we have found a cycle, make the insn jump to itself. */
2320 if (this_label == label)
2321 return label;
2323 /* Cannot follow returns and cannot look through tablejumps. */
2324 if (ANY_RETURN_P (this_label))
2325 return this_label;
2326 if (NEXT_INSN (this_label)
2327 && JUMP_TABLE_DATA_P (NEXT_INSN (this_label)))
2328 break;
2330 if (!targetm.can_follow_jump (jump, insn))
2331 break;
2332 if (!*crossing)
2333 *crossing = CROSSING_JUMP_P (jump);
2334 value = this_label;
2336 if (depth == 10)
2337 return label;
2338 return value;
2341 /* Try to find insns to place in delay slots.
2343 INSN is the jump needing SLOTS_TO_FILL delay slots. It tests CONDITION
2344 or is an unconditional branch if CONDITION is const_true_rtx.
2345 *PSLOTS_FILLED is updated with the number of slots that we have filled.
2347 THREAD is a flow-of-control, either the insns to be executed if the
2348 branch is true or if the branch is false, THREAD_IF_TRUE says which.
2350 OPPOSITE_THREAD is the thread in the opposite direction. It is used
2351 to see if any potential delay slot insns set things needed there.
2353 LIKELY is nonzero if it is extremely likely that the branch will be
2354 taken and THREAD_IF_TRUE is set. This is used for the branch at the
2355 end of a loop back up to the top.
2357 OWN_THREAD and OWN_OPPOSITE_THREAD are true if we are the only user of the
2358 thread. I.e., it is the fallthrough code of our jump or the target of the
2359 jump when we are the only jump going there.
2361 If OWN_THREAD is false, it must be the "true" thread of a jump. In that
2362 case, we can only take insns from the head of the thread for our delay
2363 slot. We then adjust the jump to point after the insns we have taken. */
2365 static rtx
2366 fill_slots_from_thread (rtx insn, rtx condition, rtx thread,
2367 rtx opposite_thread, int likely, int thread_if_true,
2368 int own_thread, int slots_to_fill,
2369 int *pslots_filled, rtx delay_list)
2371 rtx new_thread;
2372 struct resources opposite_needed, set, needed;
2373 rtx trial;
2374 int lose = 0;
2375 int must_annul = 0;
2376 int flags;
2378 /* Validate our arguments. */
2379 gcc_assert (condition != const_true_rtx || thread_if_true);
2380 gcc_assert (own_thread || thread_if_true);
2382 flags = get_jump_flags (insn, JUMP_LABEL (insn));
2384 /* If our thread is the end of subroutine, we can't get any delay
2385 insns from that. */
2386 if (thread == NULL_RTX || ANY_RETURN_P (thread))
2387 return delay_list;
2389 /* If this is an unconditional branch, nothing is needed at the
2390 opposite thread. Otherwise, compute what is needed there. */
2391 if (condition == const_true_rtx)
2392 CLEAR_RESOURCE (&opposite_needed);
2393 else
2394 mark_target_live_regs (get_insns (), opposite_thread, &opposite_needed);
2396 /* If the insn at THREAD can be split, do it here to avoid having to
2397 update THREAD and NEW_THREAD if it is done in the loop below. Also
2398 initialize NEW_THREAD. */
2400 new_thread = thread = try_split (PATTERN (thread), thread, 0);
2402 /* Scan insns at THREAD. We are looking for an insn that can be removed
2403 from THREAD (it neither sets nor references resources that were set
2404 ahead of it and it doesn't set anything needs by the insns ahead of
2405 it) and that either can be placed in an annulling insn or aren't
2406 needed at OPPOSITE_THREAD. */
2408 CLEAR_RESOURCE (&needed);
2409 CLEAR_RESOURCE (&set);
2411 /* If we do not own this thread, we must stop as soon as we find
2412 something that we can't put in a delay slot, since all we can do
2413 is branch into THREAD at a later point. Therefore, labels stop
2414 the search if this is not the `true' thread. */
2416 for (trial = thread;
2417 ! stop_search_p (trial, ! thread_if_true) && (! lose || own_thread);
2418 trial = next_nonnote_insn (trial))
2420 rtx pat, old_trial;
2422 /* If we have passed a label, we no longer own this thread. */
2423 if (LABEL_P (trial))
2425 own_thread = 0;
2426 continue;
2429 pat = PATTERN (trial);
2430 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2431 continue;
2433 /* If TRIAL conflicts with the insns ahead of it, we lose. Also,
2434 don't separate or copy insns that set and use CC0. */
2435 if (! insn_references_resource_p (trial, &set, true)
2436 && ! insn_sets_resource_p (trial, &set, true)
2437 && ! insn_sets_resource_p (trial, &needed, true)
2438 #ifdef HAVE_cc0
2439 && ! (reg_mentioned_p (cc0_rtx, pat)
2440 && (! own_thread || ! sets_cc0_p (pat)))
2441 #endif
2442 && ! can_throw_internal (trial))
2444 rtx prior_insn;
2446 /* If TRIAL is redundant with some insn before INSN, we don't
2447 actually need to add it to the delay list; we can merely pretend
2448 we did. */
2449 if ((prior_insn = redundant_insn (trial, insn, delay_list)))
2451 fix_reg_dead_note (prior_insn, insn);
2452 if (own_thread)
2454 update_block (trial, thread);
2455 if (trial == thread)
2457 thread = next_active_insn (thread);
2458 if (new_thread == trial)
2459 new_thread = thread;
2462 delete_related_insns (trial);
2464 else
2466 update_reg_unused_notes (prior_insn, trial);
2467 new_thread = next_active_insn (trial);
2470 continue;
2473 /* There are two ways we can win: If TRIAL doesn't set anything
2474 needed at the opposite thread and can't trap, or if it can
2475 go into an annulled delay slot. */
2476 if (!must_annul
2477 && (condition == const_true_rtx
2478 || (! insn_sets_resource_p (trial, &opposite_needed, true)
2479 && ! may_trap_or_fault_p (pat)
2480 && ! RTX_FRAME_RELATED_P (trial))))
2482 old_trial = trial;
2483 trial = try_split (pat, trial, 0);
2484 if (new_thread == old_trial)
2485 new_thread = trial;
2486 if (thread == old_trial)
2487 thread = trial;
2488 pat = PATTERN (trial);
2489 if (eligible_for_delay (insn, *pslots_filled, trial, flags))
2490 goto winner;
2492 else if (0
2493 #ifdef ANNUL_IFTRUE_SLOTS
2494 || ! thread_if_true
2495 #endif
2496 #ifdef ANNUL_IFFALSE_SLOTS
2497 || thread_if_true
2498 #endif
2501 old_trial = trial;
2502 trial = try_split (pat, trial, 0);
2503 if (new_thread == old_trial)
2504 new_thread = trial;
2505 if (thread == old_trial)
2506 thread = trial;
2507 pat = PATTERN (trial);
2508 if ((must_annul || delay_list == NULL) && (thread_if_true
2509 ? check_annul_list_true_false (0, delay_list)
2510 && eligible_for_annul_false (insn, *pslots_filled, trial, flags)
2511 : check_annul_list_true_false (1, delay_list)
2512 && eligible_for_annul_true (insn, *pslots_filled, trial, flags)))
2514 rtx temp;
2516 must_annul = 1;
2517 winner:
2519 #ifdef HAVE_cc0
2520 if (reg_mentioned_p (cc0_rtx, pat))
2521 link_cc0_insns (trial);
2522 #endif
2524 /* If we own this thread, delete the insn. If this is the
2525 destination of a branch, show that a basic block status
2526 may have been updated. In any case, mark the new
2527 starting point of this thread. */
2528 if (own_thread)
2530 rtx note;
2532 update_block (trial, thread);
2533 if (trial == thread)
2535 thread = next_active_insn (thread);
2536 if (new_thread == trial)
2537 new_thread = thread;
2540 /* We are moving this insn, not deleting it. We must
2541 temporarily increment the use count on any referenced
2542 label lest it be deleted by delete_related_insns. */
2543 for (note = REG_NOTES (trial);
2544 note != NULL_RTX;
2545 note = XEXP (note, 1))
2546 if (REG_NOTE_KIND (note) == REG_LABEL_OPERAND
2547 || REG_NOTE_KIND (note) == REG_LABEL_TARGET)
2549 /* REG_LABEL_OPERAND could be
2550 NOTE_INSN_DELETED_LABEL too. */
2551 if (LABEL_P (XEXP (note, 0)))
2552 LABEL_NUSES (XEXP (note, 0))++;
2553 else
2554 gcc_assert (REG_NOTE_KIND (note)
2555 == REG_LABEL_OPERAND);
2557 if (jump_to_label_p (trial))
2558 LABEL_NUSES (JUMP_LABEL (trial))++;
2560 delete_related_insns (trial);
2562 for (note = REG_NOTES (trial);
2563 note != NULL_RTX;
2564 note = XEXP (note, 1))
2565 if (REG_NOTE_KIND (note) == REG_LABEL_OPERAND
2566 || REG_NOTE_KIND (note) == REG_LABEL_TARGET)
2568 /* REG_LABEL_OPERAND could be
2569 NOTE_INSN_DELETED_LABEL too. */
2570 if (LABEL_P (XEXP (note, 0)))
2571 LABEL_NUSES (XEXP (note, 0))--;
2572 else
2573 gcc_assert (REG_NOTE_KIND (note)
2574 == REG_LABEL_OPERAND);
2576 if (jump_to_label_p (trial))
2577 LABEL_NUSES (JUMP_LABEL (trial))--;
2579 else
2580 new_thread = next_active_insn (trial);
2582 temp = own_thread ? trial : copy_delay_slot_insn (trial);
2583 if (thread_if_true)
2584 INSN_FROM_TARGET_P (temp) = 1;
2586 delay_list = add_to_delay_list (temp, delay_list);
2588 if (slots_to_fill == ++(*pslots_filled))
2590 /* Even though we have filled all the slots, we
2591 may be branching to a location that has a
2592 redundant insn. Skip any if so. */
2593 while (new_thread && ! own_thread
2594 && ! insn_sets_resource_p (new_thread, &set, true)
2595 && ! insn_sets_resource_p (new_thread, &needed,
2596 true)
2597 && ! insn_references_resource_p (new_thread,
2598 &set, true)
2599 && (prior_insn
2600 = redundant_insn (new_thread, insn,
2601 delay_list)))
2603 /* We know we do not own the thread, so no need
2604 to call update_block and delete_insn. */
2605 fix_reg_dead_note (prior_insn, insn);
2606 update_reg_unused_notes (prior_insn, new_thread);
2607 new_thread = next_active_insn (new_thread);
2609 break;
2612 continue;
2617 /* This insn can't go into a delay slot. */
2618 lose = 1;
2619 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2620 mark_referenced_resources (trial, &needed, true);
2622 /* Ensure we don't put insns between the setting of cc and the comparison
2623 by moving a setting of cc into an earlier delay slot since these insns
2624 could clobber the condition code. */
2625 set.cc = 1;
2627 /* If this insn is a register-register copy and the next insn has
2628 a use of our destination, change it to use our source. That way,
2629 it will become a candidate for our delay slot the next time
2630 through this loop. This case occurs commonly in loops that
2631 scan a list.
2633 We could check for more complex cases than those tested below,
2634 but it doesn't seem worth it. It might also be a good idea to try
2635 to swap the two insns. That might do better.
2637 We can't do this if the next insn modifies our destination, because
2638 that would make the replacement into the insn invalid. We also can't
2639 do this if it modifies our source, because it might be an earlyclobber
2640 operand. This latter test also prevents updating the contents of
2641 a PRE_INC. We also can't do this if there's overlap of source and
2642 destination. Overlap may happen for larger-than-register-size modes. */
2644 if (NONJUMP_INSN_P (trial) && GET_CODE (pat) == SET
2645 && REG_P (SET_SRC (pat))
2646 && REG_P (SET_DEST (pat))
2647 && !reg_overlap_mentioned_p (SET_DEST (pat), SET_SRC (pat)))
2649 rtx next = next_nonnote_insn (trial);
2651 if (next && NONJUMP_INSN_P (next)
2652 && GET_CODE (PATTERN (next)) != USE
2653 && ! reg_set_p (SET_DEST (pat), next)
2654 && ! reg_set_p (SET_SRC (pat), next)
2655 && reg_referenced_p (SET_DEST (pat), PATTERN (next))
2656 && ! modified_in_p (SET_DEST (pat), next))
2657 validate_replace_rtx (SET_DEST (pat), SET_SRC (pat), next);
2661 /* If we stopped on a branch insn that has delay slots, see if we can
2662 steal some of the insns in those slots. */
2663 if (trial && NONJUMP_INSN_P (trial)
2664 && GET_CODE (PATTERN (trial)) == SEQUENCE
2665 && JUMP_P (XVECEXP (PATTERN (trial), 0, 0)))
2667 /* If this is the `true' thread, we will want to follow the jump,
2668 so we can only do this if we have taken everything up to here. */
2669 if (thread_if_true && trial == new_thread)
2671 delay_list
2672 = steal_delay_list_from_target (insn, condition, PATTERN (trial),
2673 delay_list, &set, &needed,
2674 &opposite_needed, slots_to_fill,
2675 pslots_filled, &must_annul,
2676 &new_thread);
2677 /* If we owned the thread and are told that it branched
2678 elsewhere, make sure we own the thread at the new location. */
2679 if (own_thread && trial != new_thread)
2680 own_thread = own_thread_p (new_thread, new_thread, 0);
2682 else if (! thread_if_true)
2683 delay_list
2684 = steal_delay_list_from_fallthrough (insn, condition,
2685 PATTERN (trial),
2686 delay_list, &set, &needed,
2687 &opposite_needed, slots_to_fill,
2688 pslots_filled, &must_annul);
2691 /* If we haven't found anything for this delay slot and it is very
2692 likely that the branch will be taken, see if the insn at our target
2693 increments or decrements a register with an increment that does not
2694 depend on the destination register. If so, try to place the opposite
2695 arithmetic insn after the jump insn and put the arithmetic insn in the
2696 delay slot. If we can't do this, return. */
2697 if (delay_list == 0 && likely
2698 && new_thread && !ANY_RETURN_P (new_thread)
2699 && NONJUMP_INSN_P (new_thread)
2700 && !RTX_FRAME_RELATED_P (new_thread)
2701 && GET_CODE (PATTERN (new_thread)) != ASM_INPUT
2702 && asm_noperands (PATTERN (new_thread)) < 0)
2704 rtx pat = PATTERN (new_thread);
2705 rtx dest;
2706 rtx src;
2708 trial = new_thread;
2709 pat = PATTERN (trial);
2711 if (!NONJUMP_INSN_P (trial)
2712 || GET_CODE (pat) != SET
2713 || ! eligible_for_delay (insn, 0, trial, flags)
2714 || can_throw_internal (trial))
2715 return 0;
2717 dest = SET_DEST (pat), src = SET_SRC (pat);
2718 if ((GET_CODE (src) == PLUS || GET_CODE (src) == MINUS)
2719 && rtx_equal_p (XEXP (src, 0), dest)
2720 && (!FLOAT_MODE_P (GET_MODE (src))
2721 || flag_unsafe_math_optimizations)
2722 && ! reg_overlap_mentioned_p (dest, XEXP (src, 1))
2723 && ! side_effects_p (pat))
2725 rtx other = XEXP (src, 1);
2726 rtx new_arith;
2727 rtx ninsn;
2729 /* If this is a constant adjustment, use the same code with
2730 the negated constant. Otherwise, reverse the sense of the
2731 arithmetic. */
2732 if (CONST_INT_P (other))
2733 new_arith = gen_rtx_fmt_ee (GET_CODE (src), GET_MODE (src), dest,
2734 negate_rtx (GET_MODE (src), other));
2735 else
2736 new_arith = gen_rtx_fmt_ee (GET_CODE (src) == PLUS ? MINUS : PLUS,
2737 GET_MODE (src), dest, other);
2739 ninsn = emit_insn_after (gen_rtx_SET (VOIDmode, dest, new_arith),
2740 insn);
2742 if (recog_memoized (ninsn) < 0
2743 || (extract_insn (ninsn), ! constrain_operands (1)))
2745 delete_related_insns (ninsn);
2746 return 0;
2749 if (own_thread)
2751 update_block (trial, thread);
2752 if (trial == thread)
2754 thread = next_active_insn (thread);
2755 if (new_thread == trial)
2756 new_thread = thread;
2758 delete_related_insns (trial);
2760 else
2761 new_thread = next_active_insn (trial);
2763 ninsn = own_thread ? trial : copy_delay_slot_insn (trial);
2764 if (thread_if_true)
2765 INSN_FROM_TARGET_P (ninsn) = 1;
2767 delay_list = add_to_delay_list (ninsn, NULL_RTX);
2768 (*pslots_filled)++;
2772 if (delay_list && must_annul)
2773 INSN_ANNULLED_BRANCH_P (insn) = 1;
2775 /* If we are to branch into the middle of this thread, find an appropriate
2776 label or make a new one if none, and redirect INSN to it. If we hit the
2777 end of the function, use the end-of-function label. */
2778 if (new_thread != thread)
2780 rtx label;
2781 bool crossing = false;
2783 gcc_assert (thread_if_true);
2785 if (new_thread && simplejump_or_return_p (new_thread)
2786 && redirect_with_delay_list_safe_p (insn,
2787 JUMP_LABEL (new_thread),
2788 delay_list))
2789 new_thread = follow_jumps (JUMP_LABEL (new_thread), insn, &crossing);
2791 if (ANY_RETURN_P (new_thread))
2792 label = find_end_label (new_thread);
2793 else if (LABEL_P (new_thread))
2794 label = new_thread;
2795 else
2796 label = get_label_before (new_thread, JUMP_LABEL (insn));
2798 if (label)
2800 reorg_redirect_jump (insn, label);
2801 if (crossing)
2802 CROSSING_JUMP_P (insn) = 1;
2806 return delay_list;
2809 /* Make another attempt to find insns to place in delay slots.
2811 We previously looked for insns located in front of the delay insn
2812 and, for non-jump delay insns, located behind the delay insn.
2814 Here only try to schedule jump insns and try to move insns from either
2815 the target or the following insns into the delay slot. If annulling is
2816 supported, we will be likely to do this. Otherwise, we can do this only
2817 if safe. */
2819 static void
2820 fill_eager_delay_slots (void)
2822 rtx insn;
2823 int i;
2824 int num_unfilled_slots = unfilled_slots_next - unfilled_slots_base;
2826 for (i = 0; i < num_unfilled_slots; i++)
2828 rtx condition;
2829 rtx target_label, insn_at_target, fallthrough_insn;
2830 rtx delay_list = 0;
2831 int own_target;
2832 int own_fallthrough;
2833 int prediction, slots_to_fill, slots_filled;
2835 insn = unfilled_slots_base[i];
2836 if (insn == 0
2837 || INSN_DELETED_P (insn)
2838 || !JUMP_P (insn)
2839 || ! (condjump_p (insn) || condjump_in_parallel_p (insn)))
2840 continue;
2842 slots_to_fill = num_delay_slots (insn);
2843 /* Some machine description have defined instructions to have
2844 delay slots only in certain circumstances which may depend on
2845 nearby insns (which change due to reorg's actions).
2847 For example, the PA port normally has delay slots for unconditional
2848 jumps.
2850 However, the PA port claims such jumps do not have a delay slot
2851 if they are immediate successors of certain CALL_INSNs. This
2852 allows the port to favor filling the delay slot of the call with
2853 the unconditional jump. */
2854 if (slots_to_fill == 0)
2855 continue;
2857 slots_filled = 0;
2858 target_label = JUMP_LABEL (insn);
2859 condition = get_branch_condition (insn, target_label);
2861 if (condition == 0)
2862 continue;
2864 /* Get the next active fallthrough and target insns and see if we own
2865 them. Then see whether the branch is likely true. We don't need
2866 to do a lot of this for unconditional branches. */
2868 insn_at_target = first_active_target_insn (target_label);
2869 own_target = own_thread_p (target_label, target_label, 0);
2871 if (condition == const_true_rtx)
2873 own_fallthrough = 0;
2874 fallthrough_insn = 0;
2875 prediction = 2;
2877 else
2879 fallthrough_insn = next_active_insn (insn);
2880 own_fallthrough = own_thread_p (NEXT_INSN (insn), NULL_RTX, 1);
2881 prediction = mostly_true_jump (insn);
2884 /* If this insn is expected to branch, first try to get insns from our
2885 target, then our fallthrough insns. If it is not expected to branch,
2886 try the other order. */
2888 if (prediction > 0)
2890 delay_list
2891 = fill_slots_from_thread (insn, condition, insn_at_target,
2892 fallthrough_insn, prediction == 2, 1,
2893 own_target,
2894 slots_to_fill, &slots_filled, delay_list);
2896 if (delay_list == 0 && own_fallthrough)
2898 /* Even though we didn't find anything for delay slots,
2899 we might have found a redundant insn which we deleted
2900 from the thread that was filled. So we have to recompute
2901 the next insn at the target. */
2902 target_label = JUMP_LABEL (insn);
2903 insn_at_target = first_active_target_insn (target_label);
2905 delay_list
2906 = fill_slots_from_thread (insn, condition, fallthrough_insn,
2907 insn_at_target, 0, 0,
2908 own_fallthrough,
2909 slots_to_fill, &slots_filled,
2910 delay_list);
2913 else
2915 if (own_fallthrough)
2916 delay_list
2917 = fill_slots_from_thread (insn, condition, fallthrough_insn,
2918 insn_at_target, 0, 0,
2919 own_fallthrough,
2920 slots_to_fill, &slots_filled,
2921 delay_list);
2923 if (delay_list == 0)
2924 delay_list
2925 = fill_slots_from_thread (insn, condition, insn_at_target,
2926 next_active_insn (insn), 0, 1,
2927 own_target,
2928 slots_to_fill, &slots_filled,
2929 delay_list);
2932 if (delay_list)
2933 unfilled_slots_base[i]
2934 = emit_delay_sequence (insn, delay_list, slots_filled);
2936 if (slots_to_fill == slots_filled)
2937 unfilled_slots_base[i] = 0;
2939 note_delay_statistics (slots_filled, 1);
2943 static void delete_computation (rtx insn);
2945 /* Recursively delete prior insns that compute the value (used only by INSN
2946 which the caller is deleting) stored in the register mentioned by NOTE
2947 which is a REG_DEAD note associated with INSN. */
2949 static void
2950 delete_prior_computation (rtx note, rtx insn)
2952 rtx our_prev;
2953 rtx reg = XEXP (note, 0);
2955 for (our_prev = prev_nonnote_insn (insn);
2956 our_prev && (NONJUMP_INSN_P (our_prev)
2957 || CALL_P (our_prev));
2958 our_prev = prev_nonnote_insn (our_prev))
2960 rtx pat = PATTERN (our_prev);
2962 /* If we reach a CALL which is not calling a const function
2963 or the callee pops the arguments, then give up. */
2964 if (CALL_P (our_prev)
2965 && (! RTL_CONST_CALL_P (our_prev)
2966 || GET_CODE (pat) != SET || GET_CODE (SET_SRC (pat)) != CALL))
2967 break;
2969 /* If we reach a SEQUENCE, it is too complex to try to
2970 do anything with it, so give up. We can be run during
2971 and after reorg, so SEQUENCE rtl can legitimately show
2972 up here. */
2973 if (GET_CODE (pat) == SEQUENCE)
2974 break;
2976 if (GET_CODE (pat) == USE
2977 && NONJUMP_INSN_P (XEXP (pat, 0)))
2978 /* reorg creates USEs that look like this. We leave them
2979 alone because reorg needs them for its own purposes. */
2980 break;
2982 if (reg_set_p (reg, pat))
2984 if (side_effects_p (pat) && !CALL_P (our_prev))
2985 break;
2987 if (GET_CODE (pat) == PARALLEL)
2989 /* If we find a SET of something else, we can't
2990 delete the insn. */
2992 int i;
2994 for (i = 0; i < XVECLEN (pat, 0); i++)
2996 rtx part = XVECEXP (pat, 0, i);
2998 if (GET_CODE (part) == SET
2999 && SET_DEST (part) != reg)
3000 break;
3003 if (i == XVECLEN (pat, 0))
3004 delete_computation (our_prev);
3006 else if (GET_CODE (pat) == SET
3007 && REG_P (SET_DEST (pat)))
3009 int dest_regno = REGNO (SET_DEST (pat));
3010 int dest_endregno = END_REGNO (SET_DEST (pat));
3011 int regno = REGNO (reg);
3012 int endregno = END_REGNO (reg);
3014 if (dest_regno >= regno
3015 && dest_endregno <= endregno)
3016 delete_computation (our_prev);
3018 /* We may have a multi-word hard register and some, but not
3019 all, of the words of the register are needed in subsequent
3020 insns. Write REG_UNUSED notes for those parts that were not
3021 needed. */
3022 else if (dest_regno <= regno
3023 && dest_endregno >= endregno)
3025 int i;
3027 add_reg_note (our_prev, REG_UNUSED, reg);
3029 for (i = dest_regno; i < dest_endregno; i++)
3030 if (! find_regno_note (our_prev, REG_UNUSED, i))
3031 break;
3033 if (i == dest_endregno)
3034 delete_computation (our_prev);
3038 break;
3041 /* If PAT references the register that dies here, it is an
3042 additional use. Hence any prior SET isn't dead. However, this
3043 insn becomes the new place for the REG_DEAD note. */
3044 if (reg_overlap_mentioned_p (reg, pat))
3046 XEXP (note, 1) = REG_NOTES (our_prev);
3047 REG_NOTES (our_prev) = note;
3048 break;
3053 /* Delete INSN and recursively delete insns that compute values used only
3054 by INSN. This uses the REG_DEAD notes computed during flow analysis.
3056 Look at all our REG_DEAD notes. If a previous insn does nothing other
3057 than set a register that dies in this insn, we can delete that insn
3058 as well.
3060 On machines with CC0, if CC0 is used in this insn, we may be able to
3061 delete the insn that set it. */
3063 static void
3064 delete_computation (rtx insn)
3066 rtx note, next;
3068 #ifdef HAVE_cc0
3069 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
3071 rtx prev = prev_nonnote_insn (insn);
3072 /* We assume that at this stage
3073 CC's are always set explicitly
3074 and always immediately before the jump that
3075 will use them. So if the previous insn
3076 exists to set the CC's, delete it
3077 (unless it performs auto-increments, etc.). */
3078 if (prev && NONJUMP_INSN_P (prev)
3079 && sets_cc0_p (PATTERN (prev)))
3081 if (sets_cc0_p (PATTERN (prev)) > 0
3082 && ! side_effects_p (PATTERN (prev)))
3083 delete_computation (prev);
3084 else
3085 /* Otherwise, show that cc0 won't be used. */
3086 add_reg_note (prev, REG_UNUSED, cc0_rtx);
3089 #endif
3091 for (note = REG_NOTES (insn); note; note = next)
3093 next = XEXP (note, 1);
3095 if (REG_NOTE_KIND (note) != REG_DEAD
3096 /* Verify that the REG_NOTE is legitimate. */
3097 || !REG_P (XEXP (note, 0)))
3098 continue;
3100 delete_prior_computation (note, insn);
3103 delete_related_insns (insn);
3106 /* If all INSN does is set the pc, delete it,
3107 and delete the insn that set the condition codes for it
3108 if that's what the previous thing was. */
3110 static void
3111 delete_jump (rtx insn)
3113 rtx set = single_set (insn);
3115 if (set && GET_CODE (SET_DEST (set)) == PC)
3116 delete_computation (insn);
3119 static rtx
3120 label_before_next_insn (rtx x, rtx scan_limit)
3122 rtx insn = next_active_insn (x);
3123 while (insn)
3125 insn = PREV_INSN (insn);
3126 if (insn == scan_limit || insn == NULL_RTX)
3127 return NULL_RTX;
3128 if (LABEL_P (insn))
3129 break;
3131 return insn;
3135 /* Once we have tried two ways to fill a delay slot, make a pass over the
3136 code to try to improve the results and to do such things as more jump
3137 threading. */
3139 static void
3140 relax_delay_slots (rtx first)
3142 rtx insn, next, pat;
3143 rtx trial, delay_insn, target_label;
3145 /* Look at every JUMP_INSN and see if we can improve it. */
3146 for (insn = first; insn; insn = next)
3148 rtx other;
3149 bool crossing;
3151 next = next_active_insn (insn);
3153 /* If this is a jump insn, see if it now jumps to a jump, jumps to
3154 the next insn, or jumps to a label that is not the last of a
3155 group of consecutive labels. */
3156 if (JUMP_P (insn)
3157 && (condjump_p (insn) || condjump_in_parallel_p (insn))
3158 && !ANY_RETURN_P (target_label = JUMP_LABEL (insn)))
3160 target_label
3161 = skip_consecutive_labels (follow_jumps (target_label, insn,
3162 &crossing));
3163 if (ANY_RETURN_P (target_label))
3164 target_label = find_end_label (target_label);
3166 if (target_label && next_active_insn (target_label) == next
3167 && ! condjump_in_parallel_p (insn))
3169 delete_jump (insn);
3170 continue;
3173 if (target_label && target_label != JUMP_LABEL (insn))
3175 reorg_redirect_jump (insn, target_label);
3176 if (crossing)
3177 CROSSING_JUMP_P (insn) = 1;
3180 /* See if this jump conditionally branches around an unconditional
3181 jump. If so, invert this jump and point it to the target of the
3182 second jump. */
3183 if (next && simplejump_or_return_p (next)
3184 && any_condjump_p (insn)
3185 && target_label
3186 && next_active_insn (target_label) == next_active_insn (next)
3187 && no_labels_between_p (insn, next))
3189 rtx label = JUMP_LABEL (next);
3191 /* Be careful how we do this to avoid deleting code or
3192 labels that are momentarily dead. See similar optimization
3193 in jump.c.
3195 We also need to ensure we properly handle the case when
3196 invert_jump fails. */
3198 ++LABEL_NUSES (target_label);
3199 if (!ANY_RETURN_P (label))
3200 ++LABEL_NUSES (label);
3202 if (invert_jump (insn, label, 1))
3204 delete_related_insns (next);
3205 next = insn;
3208 if (!ANY_RETURN_P (label))
3209 --LABEL_NUSES (label);
3211 if (--LABEL_NUSES (target_label) == 0)
3212 delete_related_insns (target_label);
3214 continue;
3218 /* If this is an unconditional jump and the previous insn is a
3219 conditional jump, try reversing the condition of the previous
3220 insn and swapping our targets. The next pass might be able to
3221 fill the slots.
3223 Don't do this if we expect the conditional branch to be true, because
3224 we would then be making the more common case longer. */
3226 if (simplejump_or_return_p (insn)
3227 && (other = prev_active_insn (insn)) != 0
3228 && any_condjump_p (other)
3229 && no_labels_between_p (other, insn)
3230 && 0 > mostly_true_jump (other))
3232 rtx other_target = JUMP_LABEL (other);
3233 target_label = JUMP_LABEL (insn);
3235 if (invert_jump (other, target_label, 0))
3236 reorg_redirect_jump (insn, other_target);
3239 /* Now look only at cases where we have a filled delay slot. */
3240 if (!NONJUMP_INSN_P (insn) || GET_CODE (PATTERN (insn)) != SEQUENCE)
3241 continue;
3243 pat = PATTERN (insn);
3244 delay_insn = XVECEXP (pat, 0, 0);
3246 /* See if the first insn in the delay slot is redundant with some
3247 previous insn. Remove it from the delay slot if so; then set up
3248 to reprocess this insn. */
3249 if (redundant_insn (XVECEXP (pat, 0, 1), delay_insn, 0))
3251 update_block (XVECEXP (pat, 0, 1), insn);
3252 delete_from_delay_slot (XVECEXP (pat, 0, 1));
3253 next = prev_active_insn (next);
3254 continue;
3257 /* See if we have a RETURN insn with a filled delay slot followed
3258 by a RETURN insn with an unfilled a delay slot. If so, we can delete
3259 the first RETURN (but not its delay insn). This gives the same
3260 effect in fewer instructions.
3262 Only do so if optimizing for size since this results in slower, but
3263 smaller code. */
3264 if (optimize_function_for_size_p (cfun)
3265 && ANY_RETURN_P (PATTERN (delay_insn))
3266 && next
3267 && JUMP_P (next)
3268 && PATTERN (next) == PATTERN (delay_insn))
3270 rtx after;
3271 int i;
3273 /* Delete the RETURN and just execute the delay list insns.
3275 We do this by deleting the INSN containing the SEQUENCE, then
3276 re-emitting the insns separately, and then deleting the RETURN.
3277 This allows the count of the jump target to be properly
3278 decremented.
3280 Note that we need to change the INSN_UID of the re-emitted insns
3281 since it is used to hash the insns for mark_target_live_regs and
3282 the re-emitted insns will no longer be wrapped up in a SEQUENCE.
3284 Clear the from target bit, since these insns are no longer
3285 in delay slots. */
3286 for (i = 0; i < XVECLEN (pat, 0); i++)
3287 INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)) = 0;
3289 trial = PREV_INSN (insn);
3290 delete_related_insns (insn);
3291 gcc_assert (GET_CODE (pat) == SEQUENCE);
3292 add_insn_after (delay_insn, trial, NULL);
3293 after = delay_insn;
3294 for (i = 1; i < XVECLEN (pat, 0); i++)
3295 after = emit_copy_of_insn_after (XVECEXP (pat, 0, i), after);
3296 delete_scheduled_jump (delay_insn);
3297 continue;
3300 /* Now look only at the cases where we have a filled JUMP_INSN. */
3301 if (!JUMP_P (delay_insn)
3302 || !(condjump_p (delay_insn) || condjump_in_parallel_p (delay_insn)))
3303 continue;
3305 target_label = JUMP_LABEL (delay_insn);
3306 if (target_label && ANY_RETURN_P (target_label))
3307 continue;
3309 /* If this jump goes to another unconditional jump, thread it, but
3310 don't convert a jump into a RETURN here. */
3311 trial = skip_consecutive_labels (follow_jumps (target_label, delay_insn,
3312 &crossing));
3313 if (ANY_RETURN_P (trial))
3314 trial = find_end_label (trial);
3316 if (trial && trial != target_label
3317 && redirect_with_delay_slots_safe_p (delay_insn, trial, insn))
3319 reorg_redirect_jump (delay_insn, trial);
3320 target_label = trial;
3321 if (crossing)
3322 CROSSING_JUMP_P (insn) = 1;
3325 /* If the first insn at TARGET_LABEL is redundant with a previous
3326 insn, redirect the jump to the following insn and process again.
3327 We use next_real_insn instead of next_active_insn so we
3328 don't skip USE-markers, or we'll end up with incorrect
3329 liveness info. */
3330 trial = next_real_insn (target_label);
3331 if (trial && GET_CODE (PATTERN (trial)) != SEQUENCE
3332 && redundant_insn (trial, insn, 0)
3333 && ! can_throw_internal (trial))
3335 /* Figure out where to emit the special USE insn so we don't
3336 later incorrectly compute register live/death info. */
3337 rtx tmp = next_active_insn (trial);
3338 if (tmp == 0)
3339 tmp = find_end_label (simple_return_rtx);
3341 if (tmp)
3343 /* Insert the special USE insn and update dataflow info. */
3344 update_block (trial, tmp);
3346 /* Now emit a label before the special USE insn, and
3347 redirect our jump to the new label. */
3348 target_label = get_label_before (PREV_INSN (tmp), target_label);
3349 reorg_redirect_jump (delay_insn, target_label);
3350 next = insn;
3351 continue;
3355 /* Similarly, if it is an unconditional jump with one insn in its
3356 delay list and that insn is redundant, thread the jump. */
3357 if (trial && GET_CODE (PATTERN (trial)) == SEQUENCE
3358 && XVECLEN (PATTERN (trial), 0) == 2
3359 && JUMP_P (XVECEXP (PATTERN (trial), 0, 0))
3360 && simplejump_or_return_p (XVECEXP (PATTERN (trial), 0, 0))
3361 && redundant_insn (XVECEXP (PATTERN (trial), 0, 1), insn, 0))
3363 target_label = JUMP_LABEL (XVECEXP (PATTERN (trial), 0, 0));
3364 if (ANY_RETURN_P (target_label))
3365 target_label = find_end_label (target_label);
3367 if (target_label
3368 && redirect_with_delay_slots_safe_p (delay_insn, target_label,
3369 insn))
3371 update_block (XVECEXP (PATTERN (trial), 0, 1), insn);
3372 reorg_redirect_jump (delay_insn, target_label);
3373 next = insn;
3374 continue;
3378 /* See if we have a simple (conditional) jump that is useless. */
3379 if (! INSN_ANNULLED_BRANCH_P (delay_insn)
3380 && ! condjump_in_parallel_p (delay_insn)
3381 && prev_active_insn (target_label) == insn
3382 && ! BARRIER_P (prev_nonnote_insn (target_label))
3383 #ifdef HAVE_cc0
3384 /* If the last insn in the delay slot sets CC0 for some insn,
3385 various code assumes that it is in a delay slot. We could
3386 put it back where it belonged and delete the register notes,
3387 but it doesn't seem worthwhile in this uncommon case. */
3388 && ! find_reg_note (XVECEXP (pat, 0, XVECLEN (pat, 0) - 1),
3389 REG_CC_USER, NULL_RTX)
3390 #endif
3393 rtx after;
3394 int i;
3396 /* All this insn does is execute its delay list and jump to the
3397 following insn. So delete the jump and just execute the delay
3398 list insns.
3400 We do this by deleting the INSN containing the SEQUENCE, then
3401 re-emitting the insns separately, and then deleting the jump.
3402 This allows the count of the jump target to be properly
3403 decremented.
3405 Note that we need to change the INSN_UID of the re-emitted insns
3406 since it is used to hash the insns for mark_target_live_regs and
3407 the re-emitted insns will no longer be wrapped up in a SEQUENCE.
3409 Clear the from target bit, since these insns are no longer
3410 in delay slots. */
3411 for (i = 0; i < XVECLEN (pat, 0); i++)
3412 INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)) = 0;
3414 trial = PREV_INSN (insn);
3415 delete_related_insns (insn);
3416 gcc_assert (GET_CODE (pat) == SEQUENCE);
3417 add_insn_after (delay_insn, trial, NULL);
3418 after = delay_insn;
3419 for (i = 1; i < XVECLEN (pat, 0); i++)
3420 after = emit_copy_of_insn_after (XVECEXP (pat, 0, i), after);
3421 delete_scheduled_jump (delay_insn);
3422 continue;
3425 /* See if this is an unconditional jump around a single insn which is
3426 identical to the one in its delay slot. In this case, we can just
3427 delete the branch and the insn in its delay slot. */
3428 if (next && NONJUMP_INSN_P (next)
3429 && label_before_next_insn (next, insn) == target_label
3430 && simplejump_p (insn)
3431 && XVECLEN (pat, 0) == 2
3432 && rtx_equal_p (PATTERN (next), PATTERN (XVECEXP (pat, 0, 1))))
3434 delete_related_insns (insn);
3435 continue;
3438 /* See if this jump (with its delay slots) conditionally branches
3439 around an unconditional jump (without delay slots). If so, invert
3440 this jump and point it to the target of the second jump. We cannot
3441 do this for annulled jumps, though. Again, don't convert a jump to
3442 a RETURN here. */
3443 if (! INSN_ANNULLED_BRANCH_P (delay_insn)
3444 && any_condjump_p (delay_insn)
3445 && next && simplejump_or_return_p (next)
3446 && next_active_insn (target_label) == next_active_insn (next)
3447 && no_labels_between_p (insn, next))
3449 rtx label = JUMP_LABEL (next);
3450 rtx old_label = JUMP_LABEL (delay_insn);
3452 if (ANY_RETURN_P (label))
3453 label = find_end_label (label);
3455 /* find_end_label can generate a new label. Check this first. */
3456 if (label
3457 && no_labels_between_p (insn, next)
3458 && redirect_with_delay_slots_safe_p (delay_insn, label, insn))
3460 /* Be careful how we do this to avoid deleting code or labels
3461 that are momentarily dead. See similar optimization in
3462 jump.c */
3463 if (old_label)
3464 ++LABEL_NUSES (old_label);
3466 if (invert_jump (delay_insn, label, 1))
3468 int i;
3470 /* Must update the INSN_FROM_TARGET_P bits now that
3471 the branch is reversed, so that mark_target_live_regs
3472 will handle the delay slot insn correctly. */
3473 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
3475 rtx slot = XVECEXP (PATTERN (insn), 0, i);
3476 INSN_FROM_TARGET_P (slot) = ! INSN_FROM_TARGET_P (slot);
3479 delete_related_insns (next);
3480 next = insn;
3483 if (old_label && --LABEL_NUSES (old_label) == 0)
3484 delete_related_insns (old_label);
3485 continue;
3489 /* If we own the thread opposite the way this insn branches, see if we
3490 can merge its delay slots with following insns. */
3491 if (INSN_FROM_TARGET_P (XVECEXP (pat, 0, 1))
3492 && own_thread_p (NEXT_INSN (insn), 0, 1))
3493 try_merge_delay_insns (insn, next);
3494 else if (! INSN_FROM_TARGET_P (XVECEXP (pat, 0, 1))
3495 && own_thread_p (target_label, target_label, 0))
3496 try_merge_delay_insns (insn, next_active_insn (target_label));
3498 /* If we get here, we haven't deleted INSN. But we may have deleted
3499 NEXT, so recompute it. */
3500 next = next_active_insn (insn);
3505 /* Look for filled jumps to the end of function label. We can try to convert
3506 them into RETURN insns if the insns in the delay slot are valid for the
3507 RETURN as well. */
3509 static void
3510 make_return_insns (rtx first)
3512 rtx insn, jump_insn, pat;
3513 rtx real_return_label = function_return_label;
3514 rtx real_simple_return_label = function_simple_return_label;
3515 int slots, i;
3517 /* See if there is a RETURN insn in the function other than the one we
3518 made for END_OF_FUNCTION_LABEL. If so, set up anything we can't change
3519 into a RETURN to jump to it. */
3520 for (insn = first; insn; insn = NEXT_INSN (insn))
3521 if (JUMP_P (insn) && ANY_RETURN_P (PATTERN (insn)))
3523 rtx t = get_label_before (insn, NULL_RTX);
3524 if (PATTERN (insn) == ret_rtx)
3525 real_return_label = t;
3526 else
3527 real_simple_return_label = t;
3528 break;
3531 /* Show an extra usage of REAL_RETURN_LABEL so it won't go away if it
3532 was equal to END_OF_FUNCTION_LABEL. */
3533 if (real_return_label)
3534 LABEL_NUSES (real_return_label)++;
3535 if (real_simple_return_label)
3536 LABEL_NUSES (real_simple_return_label)++;
3538 /* Clear the list of insns to fill so we can use it. */
3539 obstack_free (&unfilled_slots_obstack, unfilled_firstobj);
3541 for (insn = first; insn; insn = NEXT_INSN (insn))
3543 int flags;
3544 rtx kind, real_label;
3546 /* Only look at filled JUMP_INSNs that go to the end of function
3547 label. */
3548 if (!NONJUMP_INSN_P (insn)
3549 || GET_CODE (PATTERN (insn)) != SEQUENCE
3550 || !jump_to_label_p (XVECEXP (PATTERN (insn), 0, 0)))
3551 continue;
3553 if (JUMP_LABEL (XVECEXP (PATTERN (insn), 0, 0)) == function_return_label)
3555 kind = ret_rtx;
3556 real_label = real_return_label;
3558 else if (JUMP_LABEL (XVECEXP (PATTERN (insn), 0, 0))
3559 == function_simple_return_label)
3561 kind = simple_return_rtx;
3562 real_label = real_simple_return_label;
3564 else
3565 continue;
3567 pat = PATTERN (insn);
3568 jump_insn = XVECEXP (pat, 0, 0);
3570 /* If we can't make the jump into a RETURN, try to redirect it to the best
3571 RETURN and go on to the next insn. */
3572 if (!reorg_redirect_jump (jump_insn, kind))
3574 /* Make sure redirecting the jump will not invalidate the delay
3575 slot insns. */
3576 if (redirect_with_delay_slots_safe_p (jump_insn, real_label, insn))
3577 reorg_redirect_jump (jump_insn, real_label);
3578 continue;
3581 /* See if this RETURN can accept the insns current in its delay slot.
3582 It can if it has more or an equal number of slots and the contents
3583 of each is valid. */
3585 flags = get_jump_flags (jump_insn, JUMP_LABEL (jump_insn));
3586 slots = num_delay_slots (jump_insn);
3587 if (slots >= XVECLEN (pat, 0) - 1)
3589 for (i = 1; i < XVECLEN (pat, 0); i++)
3590 if (! (
3591 #ifdef ANNUL_IFFALSE_SLOTS
3592 (INSN_ANNULLED_BRANCH_P (jump_insn)
3593 && INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
3594 ? eligible_for_annul_false (jump_insn, i - 1,
3595 XVECEXP (pat, 0, i), flags) :
3596 #endif
3597 #ifdef ANNUL_IFTRUE_SLOTS
3598 (INSN_ANNULLED_BRANCH_P (jump_insn)
3599 && ! INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
3600 ? eligible_for_annul_true (jump_insn, i - 1,
3601 XVECEXP (pat, 0, i), flags) :
3602 #endif
3603 eligible_for_delay (jump_insn, i - 1,
3604 XVECEXP (pat, 0, i), flags)))
3605 break;
3607 else
3608 i = 0;
3610 if (i == XVECLEN (pat, 0))
3611 continue;
3613 /* We have to do something with this insn. If it is an unconditional
3614 RETURN, delete the SEQUENCE and output the individual insns,
3615 followed by the RETURN. Then set things up so we try to find
3616 insns for its delay slots, if it needs some. */
3617 if (ANY_RETURN_P (PATTERN (jump_insn)))
3619 rtx prev = PREV_INSN (insn);
3621 delete_related_insns (insn);
3622 for (i = 1; i < XVECLEN (pat, 0); i++)
3623 prev = emit_insn_after (PATTERN (XVECEXP (pat, 0, i)), prev);
3625 insn = emit_jump_insn_after (PATTERN (jump_insn), prev);
3626 emit_barrier_after (insn);
3628 if (slots)
3629 obstack_ptr_grow (&unfilled_slots_obstack, insn);
3631 else
3632 /* It is probably more efficient to keep this with its current
3633 delay slot as a branch to a RETURN. */
3634 reorg_redirect_jump (jump_insn, real_label);
3637 /* Now delete REAL_RETURN_LABEL if we never used it. Then try to fill any
3638 new delay slots we have created. */
3639 if (real_return_label != NULL_RTX && --LABEL_NUSES (real_return_label) == 0)
3640 delete_related_insns (real_return_label);
3641 if (real_simple_return_label != NULL_RTX
3642 && --LABEL_NUSES (real_simple_return_label) == 0)
3643 delete_related_insns (real_simple_return_label);
3645 fill_simple_delay_slots (1);
3646 fill_simple_delay_slots (0);
3649 /* Try to find insns to place in delay slots. */
3651 static void
3652 dbr_schedule (rtx first)
3654 rtx insn, next, epilogue_insn = 0;
3655 int i;
3656 bool need_return_insns;
3658 /* If the current function has no insns other than the prologue and
3659 epilogue, then do not try to fill any delay slots. */
3660 if (n_basic_blocks_for_fn (cfun) == NUM_FIXED_BLOCKS)
3661 return;
3663 /* Find the highest INSN_UID and allocate and initialize our map from
3664 INSN_UID's to position in code. */
3665 for (max_uid = 0, insn = first; insn; insn = NEXT_INSN (insn))
3667 if (INSN_UID (insn) > max_uid)
3668 max_uid = INSN_UID (insn);
3669 if (NOTE_P (insn)
3670 && NOTE_KIND (insn) == NOTE_INSN_EPILOGUE_BEG)
3671 epilogue_insn = insn;
3674 uid_to_ruid = XNEWVEC (int, max_uid + 1);
3675 for (i = 0, insn = first; insn; i++, insn = NEXT_INSN (insn))
3676 uid_to_ruid[INSN_UID (insn)] = i;
3678 /* Initialize the list of insns that need filling. */
3679 if (unfilled_firstobj == 0)
3681 gcc_obstack_init (&unfilled_slots_obstack);
3682 unfilled_firstobj = XOBNEWVAR (&unfilled_slots_obstack, rtx, 0);
3685 for (insn = next_active_insn (first); insn; insn = next_active_insn (insn))
3687 rtx target;
3689 /* Skip vector tables. We can't get attributes for them. */
3690 if (JUMP_TABLE_DATA_P (insn))
3691 continue;
3693 if (JUMP_P (insn))
3694 INSN_ANNULLED_BRANCH_P (insn) = 0;
3695 INSN_FROM_TARGET_P (insn) = 0;
3697 if (num_delay_slots (insn) > 0)
3698 obstack_ptr_grow (&unfilled_slots_obstack, insn);
3700 /* Ensure all jumps go to the last of a set of consecutive labels. */
3701 if (JUMP_P (insn)
3702 && (condjump_p (insn) || condjump_in_parallel_p (insn))
3703 && !ANY_RETURN_P (JUMP_LABEL (insn))
3704 && ((target = skip_consecutive_labels (JUMP_LABEL (insn)))
3705 != JUMP_LABEL (insn)))
3706 redirect_jump (insn, target, 1);
3709 init_resource_info (epilogue_insn);
3711 /* Show we haven't computed an end-of-function label yet. */
3712 function_return_label = function_simple_return_label = NULL_RTX;
3714 /* Initialize the statistics for this function. */
3715 memset (num_insns_needing_delays, 0, sizeof num_insns_needing_delays);
3716 memset (num_filled_delays, 0, sizeof num_filled_delays);
3718 /* Now do the delay slot filling. Try everything twice in case earlier
3719 changes make more slots fillable. */
3721 for (reorg_pass_number = 0;
3722 reorg_pass_number < MAX_REORG_PASSES;
3723 reorg_pass_number++)
3725 fill_simple_delay_slots (1);
3726 fill_simple_delay_slots (0);
3727 fill_eager_delay_slots ();
3728 relax_delay_slots (first);
3731 /* If we made an end of function label, indicate that it is now
3732 safe to delete it by undoing our prior adjustment to LABEL_NUSES.
3733 If it is now unused, delete it. */
3734 if (function_return_label && --LABEL_NUSES (function_return_label) == 0)
3735 delete_related_insns (function_return_label);
3736 if (function_simple_return_label
3737 && --LABEL_NUSES (function_simple_return_label) == 0)
3738 delete_related_insns (function_simple_return_label);
3740 need_return_insns = false;
3741 #ifdef HAVE_return
3742 need_return_insns |= HAVE_return && function_return_label != 0;
3743 #endif
3744 #ifdef HAVE_simple_return
3745 need_return_insns |= HAVE_simple_return && function_simple_return_label != 0;
3746 #endif
3747 if (need_return_insns)
3748 make_return_insns (first);
3750 /* Delete any USE insns made by update_block; subsequent passes don't need
3751 them or know how to deal with them. */
3752 for (insn = first; insn; insn = next)
3754 next = NEXT_INSN (insn);
3756 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == USE
3757 && INSN_P (XEXP (PATTERN (insn), 0)))
3758 next = delete_related_insns (insn);
3761 obstack_free (&unfilled_slots_obstack, unfilled_firstobj);
3763 /* It is not clear why the line below is needed, but it does seem to be. */
3764 unfilled_firstobj = XOBNEWVAR (&unfilled_slots_obstack, rtx, 0);
3766 if (dump_file)
3768 int i, j, need_comma;
3769 int total_delay_slots[MAX_DELAY_HISTOGRAM + 1];
3770 int total_annul_slots[MAX_DELAY_HISTOGRAM + 1];
3772 for (reorg_pass_number = 0;
3773 reorg_pass_number < MAX_REORG_PASSES;
3774 reorg_pass_number++)
3776 fprintf (dump_file, ";; Reorg pass #%d:\n", reorg_pass_number + 1);
3777 for (i = 0; i < NUM_REORG_FUNCTIONS; i++)
3779 need_comma = 0;
3780 fprintf (dump_file, ";; Reorg function #%d\n", i);
3782 fprintf (dump_file, ";; %d insns needing delay slots\n;; ",
3783 num_insns_needing_delays[i][reorg_pass_number]);
3785 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3786 if (num_filled_delays[i][j][reorg_pass_number])
3788 if (need_comma)
3789 fprintf (dump_file, ", ");
3790 need_comma = 1;
3791 fprintf (dump_file, "%d got %d delays",
3792 num_filled_delays[i][j][reorg_pass_number], j);
3794 fprintf (dump_file, "\n");
3797 memset (total_delay_slots, 0, sizeof total_delay_slots);
3798 memset (total_annul_slots, 0, sizeof total_annul_slots);
3799 for (insn = first; insn; insn = NEXT_INSN (insn))
3801 if (! INSN_DELETED_P (insn)
3802 && NONJUMP_INSN_P (insn)
3803 && GET_CODE (PATTERN (insn)) != USE
3804 && GET_CODE (PATTERN (insn)) != CLOBBER)
3806 if (GET_CODE (PATTERN (insn)) == SEQUENCE)
3808 rtx control;
3809 j = XVECLEN (PATTERN (insn), 0) - 1;
3810 if (j > MAX_DELAY_HISTOGRAM)
3811 j = MAX_DELAY_HISTOGRAM;
3812 control = XVECEXP (PATTERN (insn), 0, 0);
3813 if (JUMP_P (control) && INSN_ANNULLED_BRANCH_P (control))
3814 total_annul_slots[j]++;
3815 else
3816 total_delay_slots[j]++;
3818 else if (num_delay_slots (insn) > 0)
3819 total_delay_slots[0]++;
3822 fprintf (dump_file, ";; Reorg totals: ");
3823 need_comma = 0;
3824 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3826 if (total_delay_slots[j])
3828 if (need_comma)
3829 fprintf (dump_file, ", ");
3830 need_comma = 1;
3831 fprintf (dump_file, "%d got %d delays", total_delay_slots[j], j);
3834 fprintf (dump_file, "\n");
3835 #if defined (ANNUL_IFTRUE_SLOTS) || defined (ANNUL_IFFALSE_SLOTS)
3836 fprintf (dump_file, ";; Reorg annuls: ");
3837 need_comma = 0;
3838 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3840 if (total_annul_slots[j])
3842 if (need_comma)
3843 fprintf (dump_file, ", ");
3844 need_comma = 1;
3845 fprintf (dump_file, "%d got %d delays", total_annul_slots[j], j);
3848 fprintf (dump_file, "\n");
3849 #endif
3850 fprintf (dump_file, "\n");
3853 if (!sibling_labels.is_empty ())
3855 update_alignments (sibling_labels);
3856 sibling_labels.release ();
3859 free_resource_info ();
3860 free (uid_to_ruid);
3861 crtl->dbr_scheduled_p = true;
3863 #endif /* DELAY_SLOTS */
3865 /* Run delay slot optimization. */
3866 static unsigned int
3867 rest_of_handle_delay_slots (void)
3869 #ifdef DELAY_SLOTS
3870 dbr_schedule (get_insns ());
3871 #endif
3872 return 0;
3875 namespace {
3877 const pass_data pass_data_delay_slots =
3879 RTL_PASS, /* type */
3880 "dbr", /* name */
3881 OPTGROUP_NONE, /* optinfo_flags */
3882 TV_DBR_SCHED, /* tv_id */
3883 0, /* properties_required */
3884 0, /* properties_provided */
3885 0, /* properties_destroyed */
3886 0, /* todo_flags_start */
3887 0, /* todo_flags_finish */
3890 class pass_delay_slots : public rtl_opt_pass
3892 public:
3893 pass_delay_slots (gcc::context *ctxt)
3894 : rtl_opt_pass (pass_data_delay_slots, ctxt)
3897 /* opt_pass methods: */
3898 virtual bool gate (function *);
3899 virtual unsigned int execute (function *)
3901 return rest_of_handle_delay_slots ();
3904 }; // class pass_delay_slots
3906 bool
3907 pass_delay_slots::gate (function *)
3909 #ifdef DELAY_SLOTS
3910 /* At -O0 dataflow info isn't updated after RA. */
3911 return optimize > 0 && flag_delayed_branch && !crtl->dbr_scheduled_p;
3912 #else
3913 return 0;
3914 #endif
3917 } // anon namespace
3919 rtl_opt_pass *
3920 make_pass_delay_slots (gcc::context *ctxt)
3922 return new pass_delay_slots (ctxt);
3925 /* Machine dependent reorg pass. */
3927 namespace {
3929 const pass_data pass_data_machine_reorg =
3931 RTL_PASS, /* type */
3932 "mach", /* name */
3933 OPTGROUP_NONE, /* optinfo_flags */
3934 TV_MACH_DEP, /* tv_id */
3935 0, /* properties_required */
3936 0, /* properties_provided */
3937 0, /* properties_destroyed */
3938 0, /* todo_flags_start */
3939 0, /* todo_flags_finish */
3942 class pass_machine_reorg : public rtl_opt_pass
3944 public:
3945 pass_machine_reorg (gcc::context *ctxt)
3946 : rtl_opt_pass (pass_data_machine_reorg, ctxt)
3949 /* opt_pass methods: */
3950 virtual bool gate (function *)
3952 return targetm.machine_dependent_reorg != 0;
3955 virtual unsigned int execute (function *)
3957 targetm.machine_dependent_reorg ();
3958 return 0;
3961 }; // class pass_machine_reorg
3963 } // anon namespace
3965 rtl_opt_pass *
3966 make_pass_machine_reorg (gcc::context *ctxt)
3968 return new pass_machine_reorg (ctxt);